Make verilator like our source
Signed-off-by: Sergiusz 'q3k' Bazański <q3k@q3k.org>master
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4c6fbc8378
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7b562944ca
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@ -22,6 +22,7 @@
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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/* verilator lint_off UNUSED */
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module qm_decode(
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/// datapath
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// from Fetch
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@ -29,7 +30,7 @@ module qm_decode(
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// backtraced from decode
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input wire [4:0] di_WA,
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input wire di_WE,
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input wire [31:0] di_WD
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input wire [31:0] di_WD,
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output wire [31:0] do_RSVal,
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output wire [31:0] do_RTVal,
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@ -21,7 +21,7 @@
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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//
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/* verilator lint_off UNUSED */
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module qm_icache(
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input wire [31:0] address,
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@ -39,7 +39,7 @@ module qm_regfile(
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reg [31:0] rf [31:0];
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always @(wd3) begin
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if (we3 && wa != 0) begin
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if (we3 && wa3 != 0) begin
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rf[wa3] = wd3;
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end
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end
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@ -33,20 +33,19 @@ void test_decode(void)
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Vqm_decode *decode = new Vqm_decode;
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// set r5 to 666 and r4 to 0xdeadbeef
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decode->dbg_wa = 5;
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decode->dbg_wd = 666;
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decode->dbg_we = 1;
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decode->di_WA = 5;
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decode->di_WD = 666;
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decode->di_WE = 1;
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decode->eval();
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decode->dbg_wa = 4;
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decode->dbg_wd = 0xdeadbeef;
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decode->di_WA = 4;
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decode->di_WD = 0xdeadbeef;
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decode->eval();
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decode->dbg_we = 0;
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decode->di_WE = 0;
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decode->di_IR = 0x20a40539;
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decode->eval();
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std::cout << std::hex << decode->do_IR << std::endl;
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std::cout << std::hex << decode->do_A << std::endl;
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std::cout << std::hex << decode->do_B << std::endl;
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std::cout << std::hex << decode->do_RSVal << std::endl;
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std::cout << std::hex << decode->do_RTVal << std::endl;
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std::cout << std::dec << decode->do_Imm << std::endl;
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}
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