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2014-02-20 13:37:31 +01:00
.gitignore All ALU tests pass 2014-01-04 14:07:57 +01:00
COPYING First commit - some instructions implemented 2014-01-04 00:35:11 +01:00
cpu.v Ugly SDL based emulator, key support, still buggy 2014-02-20 13:37:31 +01:00
emu.cpp Ugly SDL based emulator, key support, still buggy 2014-02-20 13:37:31 +01:00
Makefile Ugly SDL based emulator, key support, still buggy 2014-02-20 13:37:31 +01:00
README Working tests 2014-01-04 13:56:21 +01:00
si.ch8 Ugly SDL based emulator, key support, still buggy 2014-02-20 13:37:31 +01:00
test_main.cpp More instruction tests 2014-01-04 14:57:14 +01:00

A WIP Chip8 Verilog CPU.

May, in the future, contain other components (VGA, SRAM, PS2 and SD card) in order to synthesize this as a console on a Spartan devboard or something.

To run tests:
    make test