 q3k
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e13713e483
|
qf100: fix build hierarchy
|
2022-03-20 19:27:52 +01:00 |
|
q3k
|
97e3d18aa6
|
systems/qf100: smaller flash cache
|
2022-03-20 19:27:38 +01:00 |
|
q3k
|
741ca8d673
|
ulx3s: use fmc
|
2022-03-20 15:55:17 +01:00 |
|
q3k
|
4e7b4ee21e
|
qf100: add sky130 sram, rejigger bram in tests
|
2022-03-20 15:55:17 +01:00 |
|
q3k
|
ef37383d10
|
wishbone/peripherals: add kitchen sink controller
Last minute peripheral. Contains timer and some magic registers for
bragging points.
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2022-03-20 15:55:17 +01:00 |
|
q3k
|
410e75abf8
|
*: add bazelversion (for bazelisk)
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2022-03-20 02:24:38 +00:00 |
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q3k
|
56ac0a514e
|
boards/qf100: use system/qf100
|
2022-03-20 01:50:36 +01:00 |
|
q3k
|
200b8d229e
|
systems/qf100: factor out common qf100 stuff, add testbench
|
2022-03-20 01:35:28 +01:00 |
|
q3k
|
d29cc9a38d
|
lanai/frontend: world's jankiest flash memory controller
|
2022-03-20 01:34:58 +01:00 |
|
q3k
|
9232c1cbd2
|
wishbone: peripherals: spi: fix mosi
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2022-03-19 14:14:24 +01:00 |
|
q3k
|
68637ccd36
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build: rename power pins
|
2022-03-19 13:54:09 +01:00 |
|
q3k
|
8d104ccd61
|
*: relicense under GPL3-or-later
I am the sole author of this work. This makes it compliant with being
taped out in OpenMPW.
|
2022-03-18 22:39:44 +01:00 |
|
q3k
|
fe001a81b0
|
ulx3s: crud
|
2022-03-18 22:39:44 +01:00 |
|
q3k
|
89bc04806f
|
boards: qf100: flip oeb
|
2022-03-18 22:39:01 +01:00 |
|
q3k
|
7406c52cda
|
build: actually don't prep, that generates terrible verilog which crashes? cvc
|
2022-03-18 22:39:01 +01:00 |
|
q3k
|
91283feb16
|
lanai: start with lower SP
|
2022-03-18 21:17:00 +01:00 |
|
q3k
|
3724837965
|
wishbone: SPI: fix invalid data sent
|
2022-03-18 21:17:00 +01:00 |
|
q3k
|
ce112a7b09
|
wishbone: disable crossbar logging
|
2022-03-18 21:17:00 +01:00 |
|
q3k
|
4c80178718
|
build/synthesis: apply power pins in instantiation
|
2022-03-18 21:13:29 +01:00 |
|
q3k
|
279aa20379
|
WORKSPACE: bump deps
|
2022-03-18 12:32:42 +01:00 |
|
q3k
|
1652ebed29
|
boards/qf100: init
|
2022-03-18 12:32:28 +01:00 |
|
q3k
|
be6cc476cf
|
wishbone/peripherals: add GPIO
|
2022-03-18 12:31:52 +01:00 |
|
q3k
|
1cabdb415c
|
wishbone: tb: handle invalid addr
|
2022-03-18 12:31:30 +01:00 |
|
q3k
|
011e3db54a
|
wishbone: fix connector vector size
|
2022-03-18 12:31:11 +01:00 |
|
q3k
|
d438b858e2
|
build: add bundle rule
|
2022-03-18 12:30:48 +01:00 |
|
q3k
|
a9cabbc1b9
|
lanai: remove old debug interface
|
2022-03-18 12:30:20 +01:00 |
|
q3k
|
420719eb90
|
lanai: emit stronger veriog hierarchy for register file
|
2022-03-18 12:29:56 +01:00 |
|
q3k
|
a8dea028c5
|
lanai: add simple wishbone memory access
|
2022-03-18 12:29:18 +01:00 |
|
q3k
|
63bd8157c6
|
lanai: add SPI to testbench
|
2022-03-18 12:26:41 +01:00 |
|
q3k
|
7c5a60d266
|
wishbone: SPI: fix tests
|
2022-03-13 19:41:00 +01:00 |
|
q3k
|
c9acf3eec8
|
wishbone: crossbar: add address decoding, test multimaster
|
2022-03-13 19:40:50 +01:00 |
|
q3k
|
50309318d1
|
wishbone: implement crossbar
|
2022-03-13 14:11:23 +01:00 |
|
q3k
|
f443b5f575
|
wishbone: make async connector zero-overhead
|
2022-03-13 14:11:03 +01:00 |
|
q3k
|
58d17944af
|
wishbone: implement simple SPI peripheral
|
2022-03-12 21:38:35 +01:00 |
|
q3k
|
926ec1aa34
|
lanai: add dummy system wishbone master
|
2022-03-12 21:38:18 +01:00 |
|
q3k
|
15bfa0ead5
|
build/bluespec: fix race condition between two bscwraps
|
2022-03-12 21:37:48 +01:00 |
|
q3k
|
aff5440bf9
|
wishbone: implement master connector, test
|
2022-03-12 21:37:28 +01:00 |
|
q3k
|
e4f240b272
|
hub75: add comments
|
2022-03-06 17:35:27 +01:00 |
|
q3k
|
8351258116
|
wishbone: first pass / code dump
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
e96957733e
|
bluespec_library: add split_if argument
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
525f45f187
|
boards/ulx3s: add openmpw bringup code
This should get split into its separate project.
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
43259b96bc
|
boards/colorlight-70: init
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
767189feda
|
build: add more ecp5 platforms, add svf generation
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
7b7784ad88
|
hub75: first pass / code dump
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
99a118ff83
|
lanai: clean up memory interface type
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
fa58902fc9
|
add missing bsc.sh/bluetcl.sh wrappers
|
2022-03-06 17:30:59 +01:00 |
|
q3k
|
dc120d301a
|
lanai: add mispredict error counters
|
2021-10-21 17:38:53 +02:00 |
|
q3k
|
330e5f2dc9
|
lanai: draw the rest of the own
This gets us to the point where we're able to run simple Rust code in
the Testbench.
|
2021-10-18 01:17:55 +02:00 |
|
q3k
|
cfa97935c0
|
*: add qasm, revamp bsc wrap magic, use nix cc toolchain
|
2021-10-15 01:44:27 +02:00 |
|
q3k
|
1c37f0c695
|
lanai: stall pipeline on memory stall, bypass memory read delay into compute
|
2021-10-14 18:36:10 +02:00 |