*: relicense under GPL3-or-later
I am the sole author of this work. This makes it compliant with being taped out in OpenMPW.main
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COPYING
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Resolving www.gnu.org (www.gnu.org)... 209.51.188.116, 2001:470:142:5::116
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Connecting to www.gnu.org (www.gnu.org)|209.51.188.116|:443... connected.
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Saving to: ‘gpl-3.0.txt’
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Appendix
|
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|
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‘Compatible Licences’ according to Article 5 EUPL are:
|
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|
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- GNU General Public License (GPL) v. 2, v. 3
|
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- GNU Affero General Public License (AGPL) v. 3
|
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- Open Software License (OSL) v. 2.1, v. 3.0
|
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- Eclipse Public License (EPL) v. 1.0
|
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- CeCILL v. 2.0, v. 2.1
|
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- Mozilla Public Licence (MPL) v. 2
|
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- GNU Lesser General Public Licence (LGPL) v. 2.1, v. 3
|
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- Creative Commons Attribution-ShareAlike v. 3.0 Unported (CC BY-SA 3.0) for
|
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works other than software
|
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- European Union Public Licence (EUPL) v. 1.1, v. 1.2
|
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- Québec Free and Open-Source Licence — Reciprocity (LiLiQ-R) or Strong
|
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Reciprocity (LiLiQ-R+).
|
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|
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The European Commission may update this Appendix to later versions of the above
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licences without producing a new version of the EUPL, as long as they provide
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the rights granted in Article 2 of this Licence and protect the covered Source
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Code from exclusive appropriation.
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All other changes or additions to this Appendix require the production of a new
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EUPL version.
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|
|
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17
README.md
17
README.md
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@ -1,9 +1,22 @@
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qfc
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===
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q3k's {fpga,fantasy,fancy,futile,funky} computer
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q3k's {fpga,fantasy,fancy,futile,funky} computer. An ever growing collection of Bluespec hardware stuff made by q3k.
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Currently:
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- Lanai core (3-stage, in order)
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- Wishbone implementations
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- Some _Familiar Looking_ Wishbone peripherals (SPI, GPIO)
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- HUB75 controller core
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- Bazel and nix machinery to tie the above together.
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qf100
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-----
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A microcontroller based on this codebase. Lives at https://github.com/q3k/qf100 .
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License
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-------
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Unless otherwise specified, all files within this repository are licensed under the EUPL v. 1.2 only. See COPYING for more information.
|
||||
Unless otherwise specified, all files within this repository are licensed under the GNU General Public License 3.0 or later. See COPYING for more information.
|
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// Taken from github.com/B-Lang-org/bsc, file src/Verilog/BRAM2Load.v.
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// Modified to remove write enable from second port, allowing Yosys to infer
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// that this is not a true dual-ported BRAM.
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//
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// Copyright (c) 2020 Bluespec, Inc. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are
|
||||
// met:
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||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
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||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// SPDX-License-Identifier: BSD-3-Clause
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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@ -1,3 +1,6 @@
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// SPDX-License-Identifier: GPL-3.0-or-later
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// Copyright (C) 2022 Sergiusz Bazanski
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package Board;
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import GetPut :: *;
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@ -1,3 +1,6 @@
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// SPDX-License-Identifier: GPL-3.0-or-later
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// Copyright (C) 2022 Sergiusz Bazanski
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package QF100;
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import Clocks :: *;
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@ -1,3 +1,37 @@
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// Taken from github.com/B-Lang-org/bsc, file src/Verilog/BRAM2Load.v.
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// Modified to remove write enable from second port, allowing Yosys to infer
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// that this is not a true dual-ported BRAM.
|
||||
//
|
||||
// Copyright (c) 2020 Bluespec, Inc. All rights reserved.
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are
|
||||
// met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
|
||||
`ifdef BSV_ASSIGNMENT_DELAY
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||||
`else
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||||
|
|
|
|||
|
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@ -1,3 +1,6 @@
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|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Board;
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||||
|
||||
import Connectable :: *;
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||||
|
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@ -1,5 +1,8 @@
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|||
#!/usr/bin/env bash
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||||
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
# --- begin runfiles.bash initialization v2 ---
|
||||
# Copy-pasted from the Bazel Bash runfiles library v2.
|
||||
set -uo pipefail; f=bazel_tools/tools/bash/runfiles/runfiles.bash
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
#!/usr/bin/env bash
|
||||
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
# --- begin runfiles.bash initialization v2 ---
|
||||
# Copy-pasted from the Bazel Bash runfiles library v2.
|
||||
set -uo pipefail; f=bazel_tools/tools/bash/runfiles/runfiles.bash
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
// Set up 'bsc' for execution by giving it a PATH containing a symlink forest
|
||||
// of executables it wants to shell out to.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
load("@qfc//build:providers.bzl", "BscInfo", "VerilogInfo", "BluespecInfo")
|
||||
load("@rules_cc//cc:toolchain_utils.bzl", "find_cpp_toolchain")
|
||||
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
// Copyright (c) 2015 Tero Saarni
|
||||
// Copyright (c) 2021 Sergiusz Bazanski
|
||||
//
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#pragma once
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
# Bluespec Compiler provider, used by Bluespec Toolchain.
|
||||
BscInfo = provider(
|
||||
fields = [
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
import sys
|
||||
|
||||
name = sys.argv[1]
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
load("@qfc//build:providers.bzl", "YosysFlowInfo", "VerilogInfo")
|
||||
|
||||
def _yosysflow_toolchain_impl(ctx):
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
def _external_binary_tool_impl(ctx):
|
||||
bin_ = ctx.file.bin
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package ECP5;
|
||||
|
||||
interface GSR;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_ALU;
|
||||
|
||||
import Vector :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_Compute;
|
||||
|
||||
import GetPut :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_Defs;
|
||||
|
||||
import GetPut :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_Fetch;
|
||||
|
||||
import ClientServer :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_Memory;
|
||||
|
||||
import ClientServer :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package CPU_RegisterFile;
|
||||
|
||||
import ConfigReg :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Lanai_CPU;
|
||||
|
||||
import GetPut :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Lanai_IFC;
|
||||
|
||||
import GetPut :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Lanai_Memory;
|
||||
|
||||
import BRAM :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Tb;
|
||||
|
||||
import Connectable :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
# Run this manually to regenerate bram.bin.
|
||||
# TODO: pipe this into Bazel, or just use a real assembler at some point.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package TbCBus;
|
||||
|
||||
import Assert :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package TbConnectors;
|
||||
|
||||
import Assert :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package TbCrossbar;
|
||||
|
||||
import Assert :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package Wishbone;
|
||||
|
||||
// This package implements a Wishbone interface definition in Bluespec plus a
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package WishboneCrossbar;
|
||||
|
||||
import ClientServer :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package WishboneGPIO;
|
||||
|
||||
import Assert :: *;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
// Copyright (C) 2022 Sergiusz Bazanski
|
||||
|
||||
package WishboneSPI;
|
||||
|
||||
import Assert :: *;
|
||||
|
|
|
|||
Loading…
Reference in New Issue