Commit Graph

17 Commits (main)

Author SHA1 Message Date
q3k ef37383d10 wishbone/peripherals: add kitchen sink controller
Last minute peripheral. Contains timer and some magic registers for
bragging points.
2022-03-20 15:55:17 +01:00
q3k d29cc9a38d lanai/frontend: world's jankiest flash memory controller 2022-03-20 01:34:58 +01:00
q3k 9232c1cbd2 wishbone: peripherals: spi: fix mosi 2022-03-19 14:14:24 +01:00
q3k 8d104ccd61 *: relicense under GPL3-or-later
I am the sole author of this work. This makes it compliant with being
taped out in OpenMPW.
2022-03-18 22:39:44 +01:00
q3k 3724837965 wishbone: SPI: fix invalid data sent 2022-03-18 21:17:00 +01:00
q3k ce112a7b09 wishbone: disable crossbar logging 2022-03-18 21:17:00 +01:00
q3k be6cc476cf wishbone/peripherals: add GPIO 2022-03-18 12:31:52 +01:00
q3k 1cabdb415c wishbone: tb: handle invalid addr 2022-03-18 12:31:30 +01:00
q3k 011e3db54a wishbone: fix connector vector size 2022-03-18 12:31:11 +01:00
q3k 63bd8157c6 lanai: add SPI to testbench 2022-03-18 12:26:41 +01:00
q3k 7c5a60d266 wishbone: SPI: fix tests 2022-03-13 19:41:00 +01:00
q3k c9acf3eec8 wishbone: crossbar: add address decoding, test multimaster 2022-03-13 19:40:50 +01:00
q3k 50309318d1 wishbone: implement crossbar 2022-03-13 14:11:23 +01:00
q3k f443b5f575 wishbone: make async connector zero-overhead 2022-03-13 14:11:03 +01:00
q3k 58d17944af wishbone: implement simple SPI peripheral 2022-03-12 21:38:35 +01:00
q3k aff5440bf9 wishbone: implement master connector, test 2022-03-12 21:37:28 +01:00
q3k 8351258116 wishbone: first pass / code dump 2022-03-06 17:30:59 +01:00