q3k
|
4e7b4ee21e
|
qf100: add sky130 sram, rejigger bram in tests
|
2022-03-20 15:55:17 +01:00 |
q3k
|
200b8d229e
|
systems/qf100: factor out common qf100 stuff, add testbench
|
2022-03-20 01:35:28 +01:00 |
q3k
|
d29cc9a38d
|
lanai/frontend: world's jankiest flash memory controller
|
2022-03-20 01:34:58 +01:00 |
q3k
|
8d104ccd61
|
*: relicense under GPL3-or-later
I am the sole author of this work. This makes it compliant with being
taped out in OpenMPW.
|
2022-03-18 22:39:44 +01:00 |
q3k
|
91283feb16
|
lanai: start with lower SP
|
2022-03-18 21:17:00 +01:00 |
q3k
|
a9cabbc1b9
|
lanai: remove old debug interface
|
2022-03-18 12:30:20 +01:00 |
q3k
|
420719eb90
|
lanai: emit stronger veriog hierarchy for register file
|
2022-03-18 12:29:56 +01:00 |
q3k
|
a8dea028c5
|
lanai: add simple wishbone memory access
|
2022-03-18 12:29:18 +01:00 |
q3k
|
63bd8157c6
|
lanai: add SPI to testbench
|
2022-03-18 12:26:41 +01:00 |
q3k
|
926ec1aa34
|
lanai: add dummy system wishbone master
|
2022-03-12 21:38:18 +01:00 |
q3k
|
99a118ff83
|
lanai: clean up memory interface type
|
2022-03-06 17:30:59 +01:00 |
q3k
|
dc120d301a
|
lanai: add mispredict error counters
|
2021-10-21 17:38:53 +02:00 |
q3k
|
330e5f2dc9
|
lanai: draw the rest of the own
This gets us to the point where we're able to run simple Rust code in
the Testbench.
|
2021-10-18 01:17:55 +02:00 |
q3k
|
cfa97935c0
|
*: add qasm, revamp bsc wrap magic, use nix cc toolchain
|
2021-10-15 01:44:27 +02:00 |
q3k
|
1c37f0c695
|
lanai: stall pipeline on memory stall, bypass memory read delay into compute
|
2021-10-14 18:36:10 +02:00 |
q3k
|
84ce3ea0f4
|
lanai: preliminary memory support
|
2021-08-28 10:04:49 +02:00 |
q3k
|
06cf161e4b
|
lanai: cursed python assembler
|
2021-08-28 10:03:20 +02:00 |
q3k
|
fd5a6449c7
|
lanai: remove RRR leftovers, implement SELECT
|
2021-08-18 22:21:08 +02:00 |
q3k
|
00b00246f0
|
lanai, boards: make parametrized BlockMemory module
|
2021-08-18 22:19:51 +02:00 |
q3k
|
0b67dc9f45
|
lanai, boards/ulx3s: lanai wip
|
2021-08-16 19:12:24 +02:00 |