parent
59ab5fd703
commit
11d4dab9cd
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@ -4,7 +4,11 @@
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#include "Vqm_icache.h"
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#include "Vqm_icache.h"
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unsigned int _read_ram_at(unsigned int address)
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{
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// for now, just return the address
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return address;
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}
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void simulate_memory_controller(Vqm_icache *ic)
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void simulate_memory_controller(Vqm_icache *ic)
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{
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{
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@ -56,7 +60,7 @@ void simulate_memory_controller(Vqm_icache *ic)
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else
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else
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{
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{
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printf("[mem ctrl] command word, %i left\n", current_command.left-1);
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printf("[mem ctrl] command word, %i left\n", current_command.left-1);
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ic->mem_rd_data = 0xF0000000 + current_command.addr;
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ic->mem_rd_data = _read_ram_at(current_command.addr + (4-current_command.left)*4);
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ic->mem_rd_empty = 0;
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ic->mem_rd_empty = 0;
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current_command.left--;
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current_command.left--;
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}
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}
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@ -98,8 +102,21 @@ void test_icache(void)
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while (1)
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while (1)
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{
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{
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if (counter == 10)
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if (counter == 10)
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{
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printf("[TEST] Trying to read from 0x8bedead0...\n");
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icache->enable = 1;
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icache->enable = 1;
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icache->address = 0x80bedead;
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icache->address = 0x8bedead0;
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}
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if (counter > 11 && icache->stall == 0 && icache->address != 0x8bedead4)
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{
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printf("[TEST] Trying to read from 0x8bedead4 (should take one cycle...)\n");
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icache->address = 0x8bedead4;
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}
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if (counter > 40 && icache->stall == 0 && icache->address != 0x8bedead8)
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{
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printf("[TEST] Trying to read from 0x8bedead8 (should take one cycle...)\n");
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icache->address = 0x8bedead8;
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}
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if (counter > 100)
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if (counter > 100)
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break;
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break;
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icache->clk = !icache->clk;
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icache->clk = !icache->clk;
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