This is the basic power-management code used by all s3c24xx machines.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The uart devices are used on all s3c24xx machines, so they can reside
in the common code for all machines.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Following the model of s3c64xx cpu.c becomes common.c in mach-s3c24xx,
to got more common code added later on.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Kwangwoo Lee <kwangwoo.lee@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Michel Pollet <buserror@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Nelson Castillo <arhuaco@freaks-unidos.net>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Branch has one driver feature and one board bug fix. Merging it as a driver branch.
DMA driver change was later:
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
* tag 'ep93xx-fixes-for-3.5' of git://github.com/RyanMallon/linux-ep93xx:
dmaengine/ep93xx_dma: Implement double buffering for M2M DMA channels
arm: ep93xx: Don't try to release not acquired GPIO lines
Add the gate clocks and register region address definition
for FIMC-LITE devices available in EXYNOS4X12 SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
It removes the use of cpu_is_xxx from gpio-mxs driver and instead use
platform_device_id to identify the device. Accordingly, mxs platform
code is changed to register gpio device with different names, and
the registeration are done in soc specific initialization functions
now, so postcore_initcall(mxs_add_mxs_gpio) gets removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This will cause conflict when dt is enabled.
So let each platform add dma devices respectively.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Huang Shijie <b32955@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support
other SoCs like imx6q and reform the platform_device_id for the
better further dt support.
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Huang Shijie <b32955@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
As the ultimate for mxs platform is to convert over to device tree,
let's start always building in device tree support for the platform.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
It adds initial device tree support for imx23-evk board, and only
serial console is enabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
This patch includes basic dt support which can boot via nfs rootfs.
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
* 'msm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: fix compilation flags for MSM_SCM (part 2)
arch/arm/mach-msm: linux/gpio.h included twice
ARM: msm: Drop useless teq from DEBUG_LL support
Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0
which are present on OMAP4+ processors. Now we can distinguish
conditions applicable to OMAP4,5 and those specific to OMAP24xx
and OMAP3xxx.
Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Rather than requiring architectures that use gpiolib but don't have any
need to define anything custom to copy an asm/gpio.h provide a Kconfig
symbol which architectures must select in order to include gpio.h and
for other architectures just provide the trivial implementation directly.
This makes it much easier to do gpiolib updates and is also a step towards
making gpiolib APIs available on every architecture.
For architectures with existing boilerplate code leave a stub header in
place which warns on direct inclusion of asm/gpio.h and includes
linux/gpio.h to catch code that's doing this. Direct inclusion of
asm/gpio.h has long been deprecated.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jonas Bonn <jonas@southpole.se>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Add platform device for Exynos DRM core. This device is used
for creating DRM user-space device and allocating memory for
display buffers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add the currently in-tree device tree sources to the dtbs target.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add core DRM device and alternative platform device data
for FIMD DRM subdriver. Based on the initial patch by
Joonyoung Shim <jy0922.shim@samsung.com>.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add core DRM device and alternative platform device data
for FIMD DRM subdriver. Based on the initial patch by
Joonyoung Shim <jy0922.shim@samsung.com>.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
To support display panning, framebuffer virtual size needs to be increased.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The regulator API now allows supplies used by regulators to be specified
as normal supplies - provide the hookup for that mechanism on Cragganmore.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This is mainly to get rid of the "vfp_pm_suspend: saving vfp state"
message flooding the kernel message ring by default.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
eca55f4 (ARM: msm: fix compilation flags for MSM_SCM, 2011-11-08)
added the correct assembler directive for the first smc instance
but missed the second instance in scm_get_version(). Add it so we
can compile this file with newer binutils.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
arch/arm/mach-msm/board-msm7x30.c and arch/arm/mach-msm/board-qsd8x50.c
included 'linux/gpio.h' twice, remove the duplicates.
Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de>
Signed-off-by: David Brown <davidb@codeaurora.org>
This teq was first introduced in bcc0f6a ([ARM] msm: clean up
iomap and devices, 2008-09-10). It seems that DEBUG_LL support on
MSM at the time had to remove the virtual mapping for the uart
base. Thus when the MMU was enabled the addruart macro returned 0
and the senduart macro would test for 0 and do nothing. It was a
simple way to turn off DEBUG_LL when the MMU was enabled.
The virtual mapping was added back in 6339f66 (msm: make
debugging UART (for DEBUG_LL) configurable, 2009-11-02) but the
patch forgot to remove the teq here. So as it stands the teq has
been useless for two years and DEBUG_LL works fine without it.
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Tony reported the following compile warning after commit
eeb3711b89 ("ARM: OMAP2+: clean up some
cppcheck warnings"):
arch/arm/plat-omap/usb.c: In function 'omap_otg_init':
arch/arm/plat-omap/usb.c:40: warning: unused variable 'status'
This happens if CONFIG_ARCH_OMAP_OTG is set but
CONFIG_USB_GADGET_OMAP, CONFIG_USB_OHCI_HCD,
CONFIG_USB_OHCI_HCD_MODULE, and CONFIG_USB_OTG are all unset.
Fix by localizing the status variable to the blocks that use it.
Compile-tested only, with omap2plus_defconfig and omap2plus_defconfig
with CONFIG_USB_OHCI_HCD and CONFIG_USB_OTG enabled.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Janusz Krzysztofik reported the following build break on OMAP1 builds that
don't include CONFIG_ARCH_OMAP16XX:
LD .tmp_vmlinux1
arch/arm/mach-omap1/built-in.o: In function `omap1_usb_init':
lcd_dma.c:(.init.text+0x1420): undefined reference to `ocpi_enable'
make: *** [.tmp_vmlinux1] Error 1
This was caused by commit d3645d39ad
("ARM: OMAP1: OHCI: use platform_data fn ptr to enable OCPI bus").
Fix by declaring an empty ocpi_enable() on non-16XX builds, which
should work until the OCPI code is moved out to drivers/.
Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Shawn Guo <shawn.guo@linaro.org> writes:
mxs common clk porting for v3.5. It depends on the following two branches.
[1] git://git.linaro.org/people/mturquette/linux.git clk-next
[2] http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm.git clkdev
As the mxs device tree conversion will constantly touch clock files,
to save the conflicts, the updated mxs/dt branch coming later will
based on this pull-request.
* 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: remove now unused timer_clk argument from mxs_timer_init
ARM: mxs: remove old clock support
ARM: mxs: switch to common clk framework
ARM: mxs: change the lookup name for fec phy clock
ARM: mxs: request clock for timer
clk: mxs: add clock support for imx28
clk: mxs: add clock support for imx23
clk: mxs: add mxs specific clocks
Includes an update to Linux 3.4-rc6
Conflicts:
drivers/clk/Makefile
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A single patch from Alexander Shiyan <shc_work@mail.ru>:
* clps711x/cleanup:
ARM: clps711x: Using a single definition for the PHYS and VIRT registers offset
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using a single definition for the physical and virtual address register for all
variants boards clps711x. This patch also includes the use of a single function
clps_read/write in some units.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Before i.MX51 Pinctrl support is available, we have to reply on
the iomux initialization in non-DT board file to set iomux up for
DT boot.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The MSP platform data callbacks use the old custom callbacks to
set the state of the pins, switch over to using pinctrl.
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Alter the db8500_add_msp_i2s() calls to return a struct
platform_device * pointer, not an integer. We nee the pointer
to obtain a pinctrl handle.
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
UART0 had a hack that enabled its pins on init and put it to
sleep on the exit callback. Replace this with the pinctrl calls
to do the same thing and update the runtime table with the two
apropriate states for runtime/active and idle.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
At the beginning of the first patch series I included the custom
ux500 pin control system to make sure I could eventually replace
it with the standard subsystem driver. So now that we've done so,
let's remove it.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the Ux500 family to use the pinctrl driver for
configuring pins.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This implements the pin configuration interface for the
Nomadik pin controller.
As part of the exercise we add a bit in the pin_cfg_t for
the Nomadik pinctrl driver that indicates if the pin should
be forced into GPIO mode. This is not done to go behind the
back of the GPIO subsystem, but to ensure that default modes
can be set by hogs on boot and system suspend/resume states.
It was used implicitly by the old code defining all config
settings and modes in a single config word but we now have
a split between pinmux and pinconf leading to the need to
have this.
We also add a bit for explicitly setting sleepmode of the
pin. This was previously handled by custom calls with the
_sleep() suffix, but we now have one single interface into
the configuration so we replace this with a bit indicating
that the pin shall be configured into sleep mode.
Some of the configuration can be refactored later to use
less custom fields on the pin_cfg_t but we are currently
leaving the old function calls in place so we stay
compatible.
ChangeLog v1->v2:
- Drop a hunk changing pinmuxing for GPIO and move it
over to the preceding pinmux patch.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a scratch pin control interface to the Nomadik pinctrl
driver, and defines the pins and groups in the DB8500 ASIC. We
define GPIO ranges to cover the pins exposed. The DB8500 has
more pins than this but we restrict the driver to the pins that
can be controlled from the combined GPIO and pin control hardware
to begin with.
ChangeLog v1->v2:
- Base on the latest pinctrl development from
pinctrl-mergebase-20120418 so we can get rid of legacy
group count mechanism. Also drop the range checks for group
index, this is handled by the core now.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
By Shawn Guo
via Shawn Guo
* 'clean/late_initcall_v2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: ux500: use machine specific hook for late init
ARM: tegra: use machine specific hook for late init
ARM: shmobile: use machine specific hook for late init
ARM: sa1100: use machine specific hook for late init
ARM: s3c64xx: use machine specific hook for late init
ARM: prima2: use machine specific hook for late init
ARM: pnx4008: use machine specific hook for late init
ARM: omap2: use machine specific hook for late init
ARM: omap1: use machine specific hook for late init
ARM: msm: use machine specific hook for late init
ARM: imx: use machine specific hook for late init
ARM: exynos: use machine specific hook for late init
ARM: ep93xx: use machine specific hook for late init
ARM: davinci: use machine specific hook for late init
ARM: provide a late_initcall hook for platform initialization
Add Dialog DA9053 regulators support for imx53-qsb (Loco board)
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Amit Kucheria <amit.kucheria@canonical.com>
Cc: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To be able to enable early debugging on boards using the UART2 for the
console, add the option for early debugging on UART2.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It fixes the following compile error with network disabled in
imx_v6_v7_defconfig.
arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup':
imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write'
arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine':
imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid'
make: *** [.tmp_vmlinux1] Error 1
Reported-by: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It'll be easier to add other board specific code.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Do not hardcode the local mac address.
Let bootloader retrieve it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It has been pointed out by device tree maintainer for several times
that the generic names 'serial' and 'ethernet' should be used for
those devices per ePAPR. Renames imx uart and fec device tree nodes
to stop them being bad examples.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove bootargs field as this information is retrieved from the bootloader.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add anatop regulators to imx6q.dtsi for all imx6q platforms.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Merge tag 'omap-cleanup-dss-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Clean up for omap DSS board init in preparation for adding DT support.
By Tomi Valkeinen
via Tomi Valkeinen (1) and Tony Lindgren (1)
* tag 'omap-cleanup-dss-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAPDSS: DSI: implement generic DSI pin config
OMAPDSS: Taal: move reset gpio handling to taal driver
OMAPDSS: TFP410: rename dvi files to tfp410
OMAPDSS: TFP410: rename dvi -> tfp410
OMAP: board-files: remove custom PD GPIO handling for DVI output
OMAPDSS: panel-dvi: add PD gpio handling
Resolved context conflicts in arch/arm/mach-omap2/board-omap4panda.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-dt-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Minor DT updates based on the dt-missed-3.4 branch
By Benoit Cousson (3) and Peter Ujfalusi (2)
via Tony Lindgren
* tag 'omap-dt-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm/dts: omap4-panda: Add LEDs support
arm/dts: omap4-sdp: Add LEDs support
arm/dts: twl4030: Add twl4030-gpio node
OMAP4: devices: Do not create mcpdm device if the dtb has been provided
OMAP4: devices: Do not create dmic device if the dtb has been provided
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Merge tag 'omap-cleanup-timer-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Timer changes to make it easier to support various SoCs
By Vaibhav Hiremath
via Tony Lindgren
* tag 'omap-cleanup-timer-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Make OMAP clocksource source selection using kernel param
ARM: OMAP2+: Replace space with underscore in the name field of system timers
ARM: OMAP1: Add checks for possible error condition in timer_init
except for the RNG driver that will be done later on.
As this depends on omap-devel-hwmod-data-for-v3.5 and causes merge
conflict with omap-fixes-non-critical-for-v3.5, this branch is based
on merge of the two.
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Merge tag 'omap-cleanup-devices-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Changes to split plat-omap/devices.c into mach-omap1 and mach-omap2
except for the RNG driver that will be done later on.
As this depends on omap-devel-hwmod-data-for-v3.5 and causes merge
conflict with omap-fixes-non-critical-for-v3.5, this branch is based
on merge of the two.
By Tony Lindgren (7) and others
via Tony Lindgren (4) and Paul Walmsley (1)
* tag 'omap-cleanup-devices-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits)
ARM: OMAP1: Pass dma request lines in platform data to MMC driver
ARM: OMAP: Move omap_mmc_add() to mach-omap1
ARM: OMAP2: Use hwmod to initialize mmc for 2420
ARM: OMAP2+: Move omap_dsp_reserve_sdram_memblock() to mach-omap2
ARM: OMAP1: Move omap_init_uwire to mach-omap1
ARM: OMAP1: Move omap_init_audio() to keep the devices in alphabetical order
ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset
ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database
ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports
ARM: OMAP4: hwmod data: I2C: add flag for context restore
ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports
ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data
ARM: OMAP2+: HDQ1W: add custom reset function
ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420
arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
...
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Merge tag 'omap-devel-hwmod-data-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
Data changes related to omap hwmod
By Paul Walmsley (4) and others
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-devel-hwmod-data-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset
ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database
ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports
ARM: OMAP4: hwmod data: I2C: add flag for context restore
ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports
ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data
ARM: OMAP2+: HDQ1W: add custom reset function
ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420
Note that these are based on omap-pm-regulator-for-v3.5 as
both branches are adding twl regulators.
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Merge tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
Board specific changes for omap.
Note that these are based on omap-pm-regulator-for-v3.5 as
both branches are adding twl regulators.
By Paul Gortmaker (8) and others
via Linus Torvalds (38) and others
* tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAP: omap4panda: Use common configuration for V1V8, V2V1 supplies
OMAP: 4430SDP: Use common configuration for V1V8, V2V1 supplies
OMAP4: twl-common: Add twl6030 V1V8, V2V1 SMPS common configuration
ARM: OMAP: Mark Beagleboard-xM MMC bus as 4-bit
Add MSUB support for the LogicPD OMAP3530 DevKits
ARM: OMAP: rx51: Platform support for lis3lv02d accelerometer
ARM: OMAP2+: craneboard: register emac device
ARM: OMAP4: board-omap4panda: Register platform device for HDMI audio codec
ARM: OMAP4: board-4430sdp: Register platform device for HDMI audio codec
ARM: OMAP: devices: Register platform devices for HDMI audio
ARM: OMAP3: igep0020: Add support for Micron NAND Flash storage memory
ARM: OMAP2+: nand: Make board_onenand_init() visible to board code
ARM: OMAP3: cm-t35: add support for power off
ARM: OMAP: WiLink platform data for the PandaBoard
ARM: OMAP2PLUS: Enable HIGHMEM
ARM: OMAP: omap2plus_defconfig: Enable ehci-omap and sms95xx support
Signed-off-by: Olof Johansson <olof@lixom.net>
Note that this depends on omap-devel-hwmod-for-v3.5.
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Merge tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
Updates for PRCM (Power, Reset, Clock Management).
Note that this depends on omap-devel-hwmod-for-v3.5.
By Kevin Hilman (3) and others
via Paul Walmsley (2) and Tony Lindgren (1)
* tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
ARM: OMAP2+: dmtimer: cleanup iclk usage
ARM: OMAP4+: Add prm and cm base init function.
ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header
ARM: OMAP3: Fix CM register bit masks
ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx
ARM: OMAP3: clock data: treat all AM35x devices the same
ARM: OMAP3: clock data: replace 3503/3517 flag with AM35x flag for UART4
Note that this depends on a fix in omap-fixes-non-critical-for-v3.5,
so it's based on that.
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Merge tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Simplify some SoC config options before things get too unreadable.
Note that this depends on a fix in omap-fixes-non-critical-for-v3.5,
so it's based on that.
By Kevin Hilman (3) and others
via Tony Lindgren
* tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX
ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX
ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally
ARM: OMAP2+: INTC: fix Kconfig option for TI81XX
ARM: OMAP2+: remove incorrect irq_chip ack field
ARM: OMAP4: Adding ID for OMAP4460 ES1.1
ARM: OMAP4: panda: add statics to remove warnings
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
ARM: OMAP: fix trivial warnings for dspbridge
ARM: OMAP4: hsmmc: check for null pointer
ARM: OMAP1: fix compilation issue in board-sx1.c
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Merge tag 'omap-fixes-non-critical-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes
Omap fixes that were considered too intrusive or not critical for the -rc cycle
By Artem Bityutskiy (1) and others
via Tony Lindgren
* tag 'omap-fixes-non-critical-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally
ARM: OMAP2+: INTC: fix Kconfig option for TI81XX
ARM: OMAP2+: remove incorrect irq_chip ack field
ARM: OMAP4: Adding ID for OMAP4460 ES1.1
ARM: OMAP4: panda: add statics to remove warnings
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
ARM: OMAP: fix trivial warnings for dspbridge
ARM: OMAP4: hsmmc: check for null pointer
ARM: OMAP1: fix compilation issue in board-sx1.c
By H Hartley Sweeten (2) and Ryan Mallon (1)
via Ryan Mallon
* tag 'ep93xx-cleanup-for-3.5' of git://github.com/RyanMallon/linux-ep93xx:
arm: ep93xx: use gpio_led_register_device
Fix build breakage in ep93xx-core
arm: ep93xx: use DEFINE_RES_* macros
No need to have an OMAP prefix on these SoCs that are in the family
but arent' really called OMAP.
Simple rename: CONFIG_SOC_OMAPAM33XX --> CONFIG_SOC_AM33XX
No functional change.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
[tony@atomide.com: updated for the driver config change also]
Signed-off-by: Tony Lindgren <tony@atomide.com>
No need to have an OMAP prefix on these SoCs that are in the family
but arent' really called OMAP.
Simple rename: CONFIG_SOC_OMAPTI81XX --> CONFIG_SOC_TI81XX
No functional change.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since hwmod framework now manages sysconfig context save/restore
there is no more need to touch this register in driver. Hence,
remove restore of sysconfig register in omap_timer_restore_context.
This was causing incorrect context restore of sysconfig register.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently cpu_is_omap3517() actually detects any device in the AM35x
family (3517 and no-SGX version 3505.) To make it more clear what is
being detected, convert the names from 3517 to AM35xx.
This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517().
In order to avoid cross-tree dependencies with clock-tree changes,
cpu_is_omap3517() is left until the clock changes are merged,
at which point cpu_is_omap3517() will be completely removed.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[tony@atomide.com: change to use soc_is_omap instead]
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are several checks for AM35x devices done using
if (cpu_is_omap3517() || cpu_is_omap3505())
However, since the 3505 is just a 3517 without an SGX, the 3505 check
is redundant because cpu_is_omap3517() will always be true whenever
cpu_is_omap3505() is true. From <plat/cpu.h>:
#define cpu_is_omap3505() (cpu_is_omap3517() && !omap3_has_sgx())
Therefore, remove the redunant 3505 checks. This helps move towards
removal of SoC detection that depends on specific IP detection.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We setup identity MMU mappings across the entire 4GB of space, which
are permissionless because the domain is set to manager.
This unfortunately allows ARMv6 and later CPUs to speculatively
prefetch from the entire address space, which can cause undesirable
side effects if those regions contain devices.
As we setup the mappings with read/write permission, we can switch
the domain to client mode, and then use the XN bit for ARMv6 and
above to control speculative prefetch to non-RAM areas.
Reported-by: R Sricharan <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This pull request updates the DaVinci SoC support to implement DEBUG_LL port
choice and optimizes the DMA ISR by removing unnecessary register reads.
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Merge tag 'v3.5-soc' of git://gitorious.org/linux-davinci/linux-davinci into next/drivers
DaVinci SoC updates for v3.5
This pull request updates the DaVinci SoC support to implement DEBUG_LL port
choice and optimizes the DMA ISR by removing unnecessary register reads.
* tag 'v3.5-soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: optimize the DMA ISR
ARM: davinci: implement DEBUG_LL port choice
+ sync with Linux 3.4-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request:
1) improves code readability by using for_each_set_bit_from in DMA driver.
2) fixes incorrect bit position being used in power domain switching code
3) fixes not marking some variables as const when they could be const
4) fixes section mismatch warning in da850 evm code
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Merge tag 'v3.5-fixes-and-cleanups' of git://gitorious.org/linux-davinci/linux-davinci into next/fixes
DaVinci fixes and cleanups for v3.5
This pull request:
1) improves code readability by using for_each_set_bit_from in DMA driver.
2) fixes incorrect bit position being used in power domain switching code
3) fixes not marking some variables as const when they could be const
4) fixes section mismatch warning in da850 evm code
By Uwe Kleine-König (2) and others
via Sekhar Nori
* tag 'v3.5-fixes-and-cleanups' of git://gitorious.org/linux-davinci/linux-davinci:
arm: davinci: use for_each_set_bit_from
ARM: davinci: da850-evm: fix section mismatch
ARM: davinci: mark spi_board_info arguments as const
ARM: davinci: fix incorrect pdctl next bit position
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren
via Stephen Warren
* 'for-3.5/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: update defconfig
By Stephen Warren
via Stephen Warren
* 'for-3.5/debug' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: uncompress.h: Implement TEGRA_DEBUG_UART_AUTO_ODMDATA
By Stephen Warren (5) and Peter De Schrijver (1)
via Stephen Warren
* 'for-3.5/tegra30-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra cardhu: basic audio support
ARM: dt: tegra30.dtsi: Add audio-related nodes
ARM: tegra: add AUXDATA required for audio
ARM: tegra: set up audio clocks for tegra30 dt
ARM: tegra: Initialize pll_p_out1
ARM: tegra: provide clock aliases for AHUB configlink
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren (30) and others
via Stephen Warren
* 'for-3.5/usb-ulpi' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (7 commits)
ARM: dt: tegra: pinmux changes for USB ULPI
ARM: tegra: add USB ULPI PHY reset GPIO to device tree
ARM: tegra: don't hard-code USB ULPI PHY reset_gpio
ARM: tegra: change pll_p_out4's rate to 24MHz
ARM: tegra: fix pclk rate
ARM: tegra: reparent sclk to pll_c_out1
ARM: tegra: Add pllc clock init table
+ depends/pinctrl/mergebase branch
Pinctrl mergebase has a conflict in drivers/pinctrl/core.c that was resolved.
Signed-off-by: Olof Johansson <olof@lixom.net>
By Arnd Bergmann (1) and Danny Kukawka (1)
via Stephen Warren
* 'for-3.5/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: do not hide dma declarations
ARM: tegra: fix multiple asm/hardware/gic.h inclusion
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren
via Stephen Warren
* 'for-3.5/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for ARCH_TEGRA
ARM: tegra: add pll_x freq table entry for 750MHz
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit adds a cosmetic change to the s3c-hsotg UDC driver.
It moves s3c-hsotg.h to other linux/ related inclusions.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This allows us to pass dma request lines in platform data to
MMC driver the same way as we already do for omap2430 and later.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This hardware exists only on 2430 and later omaps, so there's no
need to have it in plat-omap/devices.c.
Note that we don't have any users for exported omap_dsp_get_mempool_base(),
so we can make it static.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This hardware exists on omap1 only and there's no need to keep it
in plat-omap/devices.c. No functional changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The comments in omap1_init_devices() ask to keep the devices in
alphabetical order. Only omap_init_audio() is not following this,
so let's move it. No functional changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
These supplies going to be needed for the twl6040 driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These supplies going to be needed for the twl6040 driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
V1V8 supply from twl6030 commonly used as VIO for the machine.
V2V1 is adviced to supply the twl6040, and also to feed the twl6030's
VCXIO_IN, and VDAC_IN inputs.
Create the common regulator configurations for these regulators:
Make the V2V1 as supply_regulator for VCXIO, VDAC.
Add twl6040 (1-004b) as consumer for V1V8, and V2V1.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated for the pm regulator changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
On Beagleboard-xM (all revisions) only MMC1_DAT0-MMC1_DAT3 are wired up.
Tested on Beagleboard-xM Rev C1 and Beagleboard Rev B4.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the OMAP3 MUSB OTG controller to the LogicPD
OMAP3530 SOM-LV[1] and Torpedo[2] DevKits
[1] - www.logicpd.com/products/system-on-modules/omap35x-som-lv/
[2] - www.logicpd.com/products/system-on-modules/omap35x-torpedo-som/
Signed-off-by: Ashwin Bihari <ashwin.bihari@logicpd.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the required am35xx_emac_init() call to the craneboard init
function.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform device registratation for HDMI audio codec. This is to
be able to transmit audio through the HDMI output featured in Pandaboard
and PandaboardES boards.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform device registratation for HDMI audio codec. This is to
be able to transmit audio through the HDMI output featured in SDP4430
and Blaze boards.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform registration for the devices HDMI audio support. The
omap-hdmi-audio-dai platform device is to be used by the ASoC HDMI
CPU DAI driver. The omap-hdmi-audio platform device is to be used
by the ASoC HDMI machine driver that links together the ASOC CPU DAI,
ASoC plaform and ASoC codec drivers.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
IGEP-based boards can have two different flash memories, a OneNAND or
a NAND device. The boot configuration pins (sys_boot) are used to
specify which memory is available.
Also, this patch removes unnecesary code for registering the OneNAND.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
[tony@atomide.com: fixed up a minor checkpatch warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
board_onenand_init() and board_nand_init() initialization functions are
used to initialize OneNAND and NAND memories respectively. But only
board_nand_init() was visible to be used from board code. This patch makes
possible to initialize a OneNAND flash memory within platform code.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the power off feature of the TPS65930 on-board PMIC.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The "uim" deamon requires sysfs entries that are filled in using
this platform data.
Signed-off-by: Mircea Gherzan <mgherzan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
HIGMEM support in kernel is quite mature now and we have boards
like ZOOM, PANDA, SDP where 1 GB memories are installed. With
HIGHMEM disabled not all of the 1GB of RAM (only ~700MB) can be
accessed. Hence, enable HIGMEM to make use of the entire memory.
On the boards which doesn't have more than 768 MB memory, all
the memory is directly mapped in "lowmem" and highmem isn't
exercised. Hence, there should be no impact by enabling HIGHMEM
for boards that do not need it.
Tested on OMAP4460 Panda-ES.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Boards like beagle and panda use ehci based smsc95xx lan chips
one has to manually enable these supports to get nfs working
on these boards. So keep these support enable by default.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Things have slowed down a lot for us, but we have five more fixes for
omap and kirkwood below. Three are for boards setup issues, two are
SoC-level fixes.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson:
"Things have slowed down a lot for us, but we have five more fixes for
omap and kirkwood below. Three are for boards setup issues, two are
SoC-level fixes."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: igep0020: fix smsc911x dummy regulator id
ARM: orion5x: Fix GPIO enable bits for MPP9
ARM: kirkwood: add missing kexec.h include
ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
ARM: OMAP1: Amstrad Delta: Fix wrong IRQ base in FIQ handler
The supply is connected to the DSS DO-D5 pins and is thus needed for
both serial and parallel display interfaces on the igep0030 as well as
the igep0020.
If the igep0030 module isn't connected to a display, no DSI or DPI
display will be specified in board code, and the DSS driver won't enable
to VPLL2 regulator anyway.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The INTC core is using a Kconfig option for TI816x which doesn't
exist. Convert it to use TI81XX.
Cc: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Each irq_chip for the main interrupt controller has offsets set for irq
masking registers, which added to respective base results in a pointer
to appropriate hardware register. However this is not correct for
INTC_CONTROL as there is only one INTC_CONTROL register. This does not
cause problems because generic ack code is never called, but remove
this assignment to avoid confusion.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add statics to board-omap4-panda.c's internal functions and data
structures to remove sparse warnings:
arch/arm/mach-omap2/board-omap4panda.c:234:29: warning: symbol
'omap_panda_wlan_data' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:441:24: warning: symbol
'omap4_panda_dvi_device' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:451:12: warning: symbol
'omap4_panda_dvi_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:512:13: warning: symbol
'omap4_panda_display_init' was not declared. Should it be static?
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.
Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Henry Chan <enli.chan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/devices.c: In function 'omap_dsp_reserve_sdram_memblock':
arch/arm/plat-omap/devices.c:170: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c: In function 'omap_dsp_init':
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'phys_addr_t'
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Depending on the bootloader, passing command-line arguments
with spaces may have issues. Some bootloaders doesn't seem
to pass along the quotes, passing only 'gp' part of the string,
which leads to wrong override configuration.
The only affected kernel parameter configuration for OMAP family
is "clocksource=", used to override kernel clocksource.
So this patch changes "gp timer" => "gp_timer", for clockevent,
clocksource and timer irq_handler.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP1, omap_32k_timer_init() function always returns "true",
irrespective of whether error occurred while initializing 32k sync
counter as a kernel clocksource or not and execution will never
fallback to mpu_timer clocksource init code.
This patch adds check for return value from function
omap_init_clocksource_32k(), and fallback to omap_mpu_timer_init()
in case of failure/error from omap_init_clocksource_32k().
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
fix for a longstanding watchdog timer integration problem.
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Merge tag 'omap-devel-c-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-hwmod-data
Some OMAP IP block data additions for 3.5, along with a
fix for a longstanding watchdog timer integration problem.
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Merge tag 'omap-fixes-for-v3.4-rc6-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fix two board spefific regressions and one regression caused by bad documentation
By Archit Taneja (1) and others
via Tony Lindgren
* tag 'omap-fixes-for-v3.4-rc6-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: igep0020: fix smsc911x dummy regulator id
ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
ARM: OMAP1: Amstrad Delta: Fix wrong IRQ base in FIQ handler
id 0 is already used and causes errors at boot:
WARNING: at fs/sysfs/dir.c:508 sysfs_add_one+0x9c/0xac()
sysfs: cannot create duplicate filename '/devices/platform/reg-fixed-voltage.0'
Fix it by using the next available one (id=1).
This was caused by 5b3689f4 (ARM: OMAP2+: smsc911x: Add fixed
board regulators) that did not account for some regulators
already being used.
Signed-off-by: Enrico Butera <ebutera@users.berlios.de>
[tony@atomide.com: updated comments for regression causing commit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
We always need to pass the last sample period to
perf_sample_data_init(), otherwise the event distribution will be
wrong. Thus, modifiyng the function interface with the required period
as argument. So basically a pattern like this:
perf_sample_data_init(&data, ~0ULL);
data.period = event->hw.last_period;
will now be like that:
perf_sample_data_init(&data, ~0ULL, event->hw.last_period);
Avoids unininitialized data.period and simplifies code.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-3-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Use for_each_set_bit_from to iterate over all the set bit in a memory
region.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Kevin Hilman <khilman@ti.com>
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The ISR does quiete a lot of hw access which could be avoided. First it
checks for a pending interrupt by reading alteast one register. Then it
checks for the "activated" slots by reading another register. This is
more or a less a must.
Now, once it found an active slot it does the same two reads again.
After that it "knows" that there must be a pending transfer however it
cross checks with the other register. There are 32 bit in an interger
which are polled instead of considering only the set bits and ignoring
those which are zero. This performs atleast 32 reads which could be
avoided. In case of a first match it does another read.
This patch reorganizes the access by re-using the register which have
been read and then uses ffs() to find the matching slot instead looping
over it. By doing this we get rid of the last (32 + 2 + hits) reads.
It is possible however that by really busy bank0 we never get to handle
bank1. If this is a problem, we could try to handle bank1 after we are
done with bank0 to check if there are any outstanding transfers.
To put some numbers on this, this is from spi transfer via spidev. The
first column is the number of total transfers, the time stamp is taken
before and after the ioctl():
|10000, min: 542us avg: 591us
|20000, min: 542us avg: 592us
|30000, min: 542us avg: 592us
|40000, min: 542us avg: 585us
|50000, min: 542us avg: 593us
The same test case with the patch applied
|10000, min: 444us avg: 493us
|20000, min: 444us avg: 491us
|30000, min: 444us avg: 489us
|40000, min: 444us avg: 491us
|50000, min: 444us avg: 492us
that is almost 100us that just went away.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Apart from the necessity to do this change for multi-platform kernels
the previous logic depended on the zImage decompressor to write the
physical and virtual address to a magic memory location.
If the decompressor is unused or not correctly configured for the
current machid, the addruart macro was an infinite loop. Moreover
debugging the early zImage code was not possible either.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[nsekhar@ti.com: add braces in _DEBUG_LL_ENTRY() macro to fix checkpatch
error. Fix debug port choice config dependency for traditional DaVincis.
Modify debug port config names and add help text.]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
By Paul Parsons (5) and others
via Haojian Zhuang
* 'board-specific' of git://github.com/hzhuang1/linux:
pcmcia: add driver for hx4700
ARM: pxa: Add standard UART to hx4700_pin_config[]
ARM: mmp: add usb host support for aspen
ARM: mmp: add usb host support for PXA168
ARM: mmp: add usb device support for ttc dkb
ARM: mmp: add usb device support for PXA910
ARM: pxa: hx4700: Add PCMCIA/CF support
ARM: pxa: hx4700: Enable ASIC3 GPIO as a wakeup source
ARM: pxa: hx4700: Initialize DS1WM clock_rate
ARM: pxa: mioa701 add camera output enable gpio
ARM: pxa: use ioremap to access CPLD
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'v3.4-rc6' into next/cleanup
Linux 3.4-rc6
Resolve conflict where an u5500 file had a bugfix go in, but was
deleted in the branch staged for next merge window.
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-cleanup-hwmod-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Clean up of hwmod to shrink down the IP block interconnections
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-hwmod-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
ARM: OMAP2xxx: hwmod data: start to fix the IVA1, IVA2 and DSP
ARM: OMAP3: hwmod data: add IVA hard reset lines, main clock, clockdomain
ARM: OMAP3: hwmod data: fix IVA interface clock
ARM: OMAP2xxx: hwmod data: share common interface data
ARM: OMAP2xxx: hwmod data: share common hwmods between OMAP2420 and OMAP2430
ARM: OMAP2+: hwmod data: remove forward declarations, reorganize
ARM: OMAP: hwmod: remove code support for direct hwmod registration
ARM: OMAP2+: hwmod data: convert to link registration
ARM: OMAP2+: hwmod: add support for link registration
ARM: OMAP2+: hwmod: consolidate finding the MPU port index and storing it
ARM: OMAP2+: hwmod: add function to iterate over struct omap_hwmod_ocp_if
ARM: OMAP2+: hwmod: add _find_mpu_rt_port()
ARM: OMAP2+: hwmod: extend OCP_* register offsets from 16 to 32 bits
ARM: OMAP4: hwmod data: uncomment some "excluded" hwmods
ARM: OMAP4: hwmod data: add OCP_USER_DSP; mark omap44xx_dsp__iva appropriately
ARM: OMAP4: hwmod data: remove bandgap hwmod
ARM: OMAP3: hwmod data: GPTIMER12 is attached to a separate interconnect
ARM: OMAP3: hwmod data: add DSS->L3 interconnect for 3430ES1
ARM: OMAP3: hwmod data: fix interfaces for the MMC hwmods
ARM: OMAP2/3: hwmod data: update old names
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-cleanup-sparse-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Sparse and cppcheck warning fixes
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-sparse-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: clean up some cppcheck warnings
ARM: OMAP1: board files: deduplicate and clean some NAND-related code
ARM: OMAP: USB: remove unnecessary sideways include
ARM: OMAP: DMA: use constant array maximum, drop some LCD DMA code
ARM: OMAP: OCM RAM: use memset_io() when clearing SRAM
ARM: OMAP: fix 'using plain integer as NULL pointer' sparse warnings
ARM: OMAP2+: GPMC: resolve type-conversion warning from sparse
ARM: OMAP1: OHCI: use platform_data fn ptr to enable OCPI bus
ARM: OMAP1: OCPI: move to mach-omap1/
ARM: OMAP: add includes for missing prototypes
ARM: OMAP2+: declare file-local functions as static
Signed-off-by: Olof Johansson <olof@lixom.net>
From: Linus Walleij <linus.walleij@linaro.org>:
Four core patches paving the way for device tree enablement
of the Snowball and ux500 at large by Lee Jones.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable PRCMU Timer 4 (clocksource) for Device Tree
ARM: ux500: Disable SMSC911x platform code registration when DT is enabled
ARM: ux500: Fork cpu-db8500 platform_devs for sequential DT enablement
ARM: ux500: Do not attempt to register non-existent i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
"Jean-Christophe PLAGNIOL-VILLARD" <plagnioj@jcrosoft.com> writes:
ARM: AT91 more DT material
New SoC conversion and boards support
SoC convertion to DT:
- at91sam9260
- at91sam9263
boards:
- Atmel at91sam9g20ek/9263ek
- Calao TNY-A9260/A9263/A9G20
- Calao USB-A9260/A9263
- Ethernnut 5
- Kizbox
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91: (32 commits)
Ethernut 5 board support
ARM: at91: add kizbox board dt support.
ARM: at91: DT: add Calao TNY A9263 board support
ARM: at91: DT: add Calao USB A9263 board support
ARM: at91: add at91sam9263ek DT support
ARM: at91: add at91sam9263 DT support
ARM: at91: standard device init only if DT is not populated.
ARM: at91: DT: add Calao USB A9260 DT support
ARM: at91: Calao USB A926x factorize common binding in usb_a9260_common
ARM: at91: USB A926x update nand partition
ARM: at91: add at91sam9g20ek boards dt support
arm: at91: add Calao TNY-A9260 and TNY-A9G20 board support
ARM: at91: add at91sam9260 DT support
ARM: at91: add defconfig for device tree
ARM: at91/dt: do not specify the board any more
ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
ARM: at91: pm select memory controler at runtime
ARM: at91: move at91_init_leds to board init
ARM: at91: do not pin mux the UARTs in init_early
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Walleij <linus.walleij@linaro.org> writes:
this pull request contains some device tree work by Lee Jones.
I have tried to keep these patches in the arch/arm/boot/dts/*
space to get some sanity in the branch proliferation.
There is still one patch that touches arch/arm/mach-ux500 too
though (but it should merge fine with the other ux500 stuff).
The changes to the device tree are of course dependent on some
core changes and some patching in the GPIO/pin driver, but as
the device tree files are believed to be a different world
(and should one day live in their own git) I split this off
anyway. I don't think people bisect the device trees per se
and the board code in conjunction anyway.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Configure the PRCMU Timer for db8500 based devices in DT
ARM: ux500: Enable the SMSC9115 on Snowball via Device Tree
drivers/gpio: represent gpio-nomadik as an IRQ controller in DT documentation
ARM: ux500: Rename gpio_keys in the Device Tree file
drivers/gpio: gpio-nomadik: Provide documentation for Device Tree bindings
drivers/gpio: gpio-nomadik: Device Tree bindings
ARM: ux500: Enable the external bus with Device Tree
ARM: ux500: Shorten Snowball's DT compatible gpio entry
ARM: ux500: Rename the DT compatible entry for i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
* spear/dt:
ARM: SPEAr3xx: Correct keyboard data passed from DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Roland Stigge <stigge@antcom.de> writes:
this is a rearrangement of all mach-lpc32xx specific patches for device
tree conversion. Please note that:
* It builds upon the i2c-pnx changes (see previous pull request, branch
lpc32xx/i2c)
* Dave Miller gave permission to merge the lpc_eth.c change via arm-soc
(patch 1/8)
The rest of the patches is mach-lpc32xx only.
* 'lpc32xx/dt' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Defconfig update
ARM: LPC32xx: Move common code to common.c
ARM: LPC32xx: Device tree support
ARM: LPC32xx: DTS files for device tree conversion
ARM: LPC32xx: Remove obsolete platform Kconfig
ARM: LPC32xx: clock.c registration adjustment
ARM: LPC32xx: clock.c cleanup
net: Add device tree support to LPC32xx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
As a prerequisite for merging the lpc32xx DT changes, this
pulls in the depends/i2c/lpc32xx branch that contains
changes to the pnx-i2c driver, which are already in the
i2c tree. The branch is available also on
git://git.antcom.de/linux-2.6.git lpc32xx/i2c
Roland Stigge <stigge@antcom.de> writes:
this is the series of the 4 patches adding device tree support to i2c-pnx
(used by LPC32xx) that Wolfram Sang already applied to the i2c subsystem.
Since both drivers/i2c/ and mach-lpc32xx are touched here, there will
probably be conflicts that you need to be aware of.
I'm posting this again for arm-soc since the actual mach-lpc32xx specific
DT conversion builds upon those changes (see next pull request), especially
in arch/arm/mach-lpc32xx/common.c.
Wolfram already gave permission to merge this via arm-soc, but please
coordinate and tell me if I can help resolving this.
Further, this implicitly updates the next/dt branch to v3.4-rc4, which
causes a trivial conflict from a change in one branch in code that
gets removed in another.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a rebased version of parts of
git://git.stlinux.com/spear/linux-2.6.git spear-v3.5
which was accidentally based on the linux-next tree and mixed too
many different things. The pinctrl related changes from the same
branch are now in the spear/pinctrl branch of arm-soc.
There are a few non-DT cleanups mixed in here, but fundamentally
it's all related to the DT conversion.
* spear/dt: (9 commits)
ARM: spear: remove most mach/*.h header contents
SPEAr: Update defconfigs
SPEAr: Add PL080 DMA support for 3xx and 6xx
ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
SPEAr3xx: Replace printk() with pr_*()
SPEAr6xx: Add compilation support for dtbs using 'make dtbs'
SPEAr3xx: Add clock instance of usb hosts - ehci and ohci 0 and 1
SPEAr: Use CLKDEV_INIT for defining clk_lookups
ARM: SPEAr600: Change FSMC and SMI clock names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
First part of DT changes for the Renesas shmobile platform,
pulled from:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git dt
* renesas/dt:
ARM: mach-shmobile: sh7372 generic board support via DT V2
ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2
ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372
ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H
ARM: mach-shmobile: Introduce shmobile_setup_delay()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
In preparation for device tree, this patch changes how the DSI pins are
configured. The current configuration method is only doable with board
files and the configuration data is OMAP specific.
This patch moves the configuration data to the panel's platform data,
and the data can easily be given via DT in the future. The configuration
data format is also changed to a generic one which should be suitable
for all platforms.
The new format is an array of pin numbers, where the array items start
from clock + and -, then data1 + and -, and so on. For example:
{
0, // pin num for clock lane +
1, // pin num for clock lane -
2, // pin num for data1 lane +
3, // pin num for data1 lane -
...
}
The pin numbers are translated by the DSI driver and used to configure
the hardware appropriately.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
The reset GPIO for Taal panel driver is currently requested in the
4430sdp board file. This patch moves the gpio request/free into the Taal
driver, where it should be.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Now that the tfp410 driver has been renamed in the code, this patch
finishes the renaming by renaming the files.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
The driver for the TFP410 DPI-to-DVI chip was named quite badly as "DVI
panel driver". This patch renames the code to use tfp410 name for the
driver.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Now that the panel-dvi driver handles the PD (power-down) GPIO, we can
remove the custom PD handling from the board files.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This patch also adds the SPDIF baud clock mux and dividers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
platform_device pdev can be NULL if CONFIG_MMC_OMAP_HS is not set.
Add check for NULL pointer. while at it move the duplicated functions
to omap4-common.c
Fixes the following boot crash seen with omap4sdp and omap4panda
when MMC is disabled.
Unable to handle kernel NULL pointer dereference at virtual address 0000008c
pgd = c0004000
[0000008c] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 Not tainted (3.4.0-rc1-05971-ga4dfa82 #4)
PC is at omap_4430sdp_init+0x184/0x410
LR is at device_add+0x1a0/0x664
Signed-off-by: Balaji T K <balajitk@ti.com>
Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SX1 board requirese i2c, so select it in Kconfig, otherwise I have the
following build error:
arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_write_byte':
arch/arm/mach-omap1/board-sx1.c:58:2: error: implicit declaration of function 'i2c_get_adapter' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c:58:7: warning: assignment makes pointer from integer without a cast [enabled by default]
arch/arm/mach-omap1/board-sx1.c:67:2: error: implicit declaration of function 'i2c_transfer' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c:68:2: error: implicit declaration of function 'i2c_put_adapter' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_read_byte':
arch/arm/mach-omap1/board-sx1.c:82:7: warning: assignment makes pointer from integer without a cast [enabled by default]
cc1: some warnings being treated as errors
make[1]: *** [arch/arm/mach-omap1/board-sx1.o] Error 1
make: *** [arch/arm/mach-omap1] Error 2
make: *** Waiting for unfinished jobs....
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If dtb is provided the needed device will be created dynamically.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If dtb is provided the needed device will be created dynamically.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a varient of the basic clk-gate code. This variant calls a
function before gating the clock off. This function is used to disable
the SATA or PCIe PHY.
Now that all the drivers prepare and enable there clk as needed, there
is no need for the common code to keep track of which clocks need
gating on. Let the common clock framework turn off clocks which are
not used.
Buy using the added clk varient, when the clk framework turns off SATA
or PCIe clocks, we also disabled SATA and PCIe PHYs which were not
needed.
The function kirkwood_pcie_id() can now be called outside of __init
code, so remove this property for it, and functions it calls.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Prepare and enable the clocks when the board indicates the pcie buses
will be used.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion platforms can gate the XOR driver clock. If the clock
exisits, unable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion platforms support gating of the clock. If the clock exists
enable/disbale it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion devices can gate the SDIO clock. If the clock exists,
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Not all orion platforms can gate the clock, but if it does exist,
enable/disable it as appropriate.
v2: Fix the name of the clkdev entry.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Not all platforms support gating the clock, so it is not an error if
the clock does not exist. However, if it does exist, we should
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The Orion kirkwood chips have a gatable clock per SATA channel. Add
code to get and enable this clk if it exists.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Let the machine pass to the platform which clock is used by the uart.
Enable the clock and use clk_get_rate() to determine its rate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Remove tclk from platform data. This makes the platform data
structure empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The t_clk is moved from the shared part of the ethernet driver into
the per port section. Each port can have its own gated clock, which it
needs to enable/disable, as oppossed to there being one clock shared
by all ports. In practice, only kirkwood supports this at the moment.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Remove now redundant tclk from SPI platform data. This makes the platform
data empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add tclk as a fixed rate clock for all platforms. In addition, on
kirkwood, add a gated clock for most of the clocks which can be gated.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
[mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig]
[mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Without runtime PM enabled, hwmod needs to leave all IP blocks in an
enabled state by default so any driver access to the HW will succeed.
This is accomplished by seting the postsetup_state to enabled for all
hwmods during init when runtime PM is disabled.
Currently, we have a special case for WDT in that its postsetup_state
is always set to disabled. This is done so that the WDT is disabled
and the timer is disarmed at boot in case there is no WDT driver.
This also means that when runtime PM is disabled, if a WDT driver *is*
built in the kernel, the kernel will crash on the first access to the
WDT hardware.
We can't simply leave the WDT module enabled, because the timer is
armed by default after reset. That means that if there is no WDT
driver initialzed or loaded before the timer expires, the kernel will
reboot.
To fix this, a custom reset method is added to the watchdog class of
omap_hwmod. This method will *always* disarm the timer after hwmod
reset. The WDT timer then will only be rearmed when/if the driver is
loaded for the WDT. With the timer disarmed by default, we no longer
need a special-case for the postsetup_state of WDT during init, so it
is removed.
Any platforms wishing to ensure the watchdog remains armed across the
entire boot boot can simply disable the reset-on-init feature of the
watchdog hwmod using omap_hwmod_no_setup_reset().
Tested on 3530/Overo, 4430/Panda.
NOTE: on 4430, the hwmod OCP reset does not seem to rearm the timer as
documented in the TRM (and what happens on OMAP3.) I noticed this
because testing the HWMOD_INIT_NO_RESET feature with no driver loaded,
I expected a reboot part way through the boot, but did not see a
reboot. Adding some debug to read the counter, I verified that right
after OCP softreset, the counter is not firing. After writing the
magic start sequence, the timer starts counting. This means that the
timer disarm sequence added here does not seem to be needed for 4430,
but is technically the correct way to ensure the timer is disarmed, so
it is left in for OMAP4.
Special thanks to Paul Walmsley for helping brainstorm ideas to fix
this problem.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[paul@pwsan.com: updated the omap2_wd_timer_reset() function in the
wake of commit 3c55c1baff ("ARM:
OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset
wait for reset status""); added kerneldoc; rolled in warning fix from Kevin]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Use 'common' as name for the common irq number in hwmod data for the McBSP
ports. The same name already in use for OMAP2430, and OMAP3.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Restore of context is not done for OMAP4. This patch
adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the OMAP4
hwmod data which activates the restore for OMAP4.
Currently the OMAP4 does not hit device off still the
driver may have support for it.
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Wamsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Use 'common' as name for the common irq number in hwmod data for the McBSP
ports. The same name already in use for OMAP2430, and the OMAP4 hwmod data
will be using the same name.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ1W hwmod for all OMAP2xxx devices.
Assume that OMAP2xxx chips have the same HDQ idle handling bug
as OMAP3:
http://www.spinics.net/lists/linux-omap/msg63576.html
and set the OCPIF_SWSUP_IDLE flag accordingly on the HDQ's OCP interface.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ1W hwmod for OMAP34xx, OMAP36xx, and AM3505/3517 devices.
According to the respective TRMs, it doesn't appear to be available for the
816x/814x or the AM335x.
The OCPIF_SWSUP_IDLE flag is added to work around an apparent hardware
bug: the hardware is not taking the CM_FCLKEN*_CORE.EN_HDQ bit into
account when considering whether to go idle:
http://www.spinics.net/lists/linux-omap/msg63576.html
This causes HDQ transfers to fail or become corrupt. Thanks to
NeilBrown for his help diagnosing and testing fixes for this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Tested-by: NeilBrown <neilb@suse.de>
Much of the HDQ1W integration data is common between multiple generations
of OMAP SoCs, so rather than make several copies, we add it once into
files which are compiled for multiple SoCs.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Tested-by: NeilBrown <neilb@suse.de>
Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>
Add MMC for 2420 so we can pass the DMA request lines the same
way as we already do on omap2430 and later.
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to apply on top of the 3.5 hwmod cleanup;
changed mmc hwmod name/class to "msdi" as documented in the 2420 TRM Rev X;
added sysconfig register information; added 16 bit register width flag;
added MSDI custom reset code]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is
ready.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
High-performance Bus (AHB) architecture.
The AHB Arbiter controls AHB bus master arbitration. This effectively
forms a second level of arbitration for access to the memory
controller through the AHB Slave Memory device. The AHB pre-fetch
logic can be configured to enhance performance for devices doing
sequential access. Each AHB master is assigned to either the high or
low priority bin. Both Tegra20/30 have this AHB bus.
Some of configuration params could be passed from DT too if needed.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 554cdaefd1 ('ARM: orion5x: Refactor
mpp code to use common orion platform mpp.') seems to have accidentally
inverted the GPIO valid bits for MPP9 (only). For the mv2120 platform
which uses MPP9 as a GPIO LED device, this results in the error:
[ 12.711476] leds-gpio: probe of leds-gpio failed with error -22
Reported-by: Henry von Tresckow <hvontres@gmail.com>
References: http://bugs.debian.org/667446
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org [v3.0+]
Tested-by: Hans Henry von Tresckow <hvontres@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
powerdomain, PRM, and CM changes.
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Merge tag 'omap-devel-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-prcm
Some OMAP PRCM updates for 3.5. Includes some clock, clockdomain,
powerdomain, PRM, and CM changes.
Fixes the following build error when CONFIG_KEXEC is enabled:
CC arch/arm/mach-kirkwood/board-dt.o
arch/arm/mach-kirkwood/board-dt.c: In function 'kirkwood_dt_init':
arch/arm/mach-kirkwood/board-dt.c:52:2: error: 'kexec_reinit' undeclared (first use in this function)
arch/arm/mach-kirkwood/board-dt.c:52:2: note: each undeclared identifier is reported only once for each function it appears in
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
[v4, rebase onto recent Linus for repost]
[v3, speak actual English in the commit message, thanks Sergei Shtylyov]
[v2, using linux/kexec.h not asm/kexec.h]
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With old mxs clock support removed, the timer_clk argument of
mxs_timer_init is unused now, so remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The mxs clock has been switched to common clock framework, so the old
clock support can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
When mxs_timer_init() does not have a timer_clk passed in, it should
try to request clock from clkdev system.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The mxs pinctrl driver will only support DT probe. That said, the mxs
device drivers can only get pinctrl state from pinctrl subsystem when
the drivers get probed from device tree.
Before converting the whole mxs platform support over to device tree,
we need to enable pinctrl dummy states for those non-DT board files
to ensure the pinctrl API adopted by mxs device drivers will work for
both DT and non-DT probe.
Instead of calling pinctrl_provide_dummies() directly in every board
file, the patch introduces soc specific calls mx23_soc_init() and
mx28_soc_init() for boards' .init_machine hook to invoke, so that
any soc specific setup for non-DT boot only can be added there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
cpuidle uses a generic function now. Remove the unused code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20120507175652.260797846@linutronix.de
The system dma module has capabiities register indicating
the support for descriptor loading, constant fill, etc.
Use this instead of OMAP revision check to identify the features
supported runtime.
This avoids patching the code for feature SOCs which has
those capabilities.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
EMIF, GMPC and DMM driver can ioremap() the address
space as part of driver intialisation and there is
no need to have static IO mapping for them.
Hence remove the un-used static IP space and let
the respective drivers manage it as part if driver
init.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
All OMAP2PLUS arch based machines makes use of mach-omap2 directory.
So just add one entry so that there is no need to patch this file
for any OMAP2+ devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
cpu_class_is_omap2() contains all OMAP2+ devices. So update the DMA code
cpu checks accordingly so that there is no need to patch
the file for any future OMAP2+ devices.
In long run, all these attributes should come from hwmod dev_attr based
on DMA IP version.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Current OMAP code doesn't use any of the OMAP_WKG_ENB_SECURE_*
registers.
So remove those defines.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Since OMAP4 code base now makes use of OMAP4 specific PRCM functions,
cm2xxx_3xxx.c need not be compiled for OMAP4 only builds.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Clean up clockdomains3xxx_data.c a bit by removing the superfluous
commas in gfx_sgx_3xxx_wkdeps[].
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
With patch 'ARM: OMAP2+: powerdomain: Wait for powerdomain transition
in pwrdm_state_switch()', the pwrdm_clkdm_state_switch() API becomes
duplicate of pwrdm_state_switch().
Get rid off duplicate pwrdm_clkdm_state_switch() and update the
users of it with pwrdm_state_switch()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the correct clockdomain for the HDQ functional clock. This is needed
for the clock and hwmod PM code to work correctly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
The current DPLL code enables and disables autoidle features
without checking whether the autoidle register is available.
Fix this by putting a check for the existence of the autoidle
register in the DPLL data.
With such a check in place, for DPLLs which do not support this
feature, simply skipping the autoidle_reg entry in the DPLL data
is sufficient.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We do not use iclk anywhere in the dmtimer driver and so removing it.
Hence removing the timer iclk entries from OMAP4 clkdev table as well.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add missing idle_st bit for 32k-sync timer into the prcm-common
header file, required for hwmod data.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The register bits for MPU_CLK_SRC and IVA2_CLK_SRC in CM_CLKSEL1_PLL
register are 3 bits wide. Fix the MASK definition accordingly.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
To improve the clarity of the code, replace the CK_3517 flag used in
the clock data with CK_AM35XX. The CK_3505 flag can also be
removed, since it is now unused.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The init for 3505/3517 specific clocks depends on the ordering of
cpu_is checks, is error prone and confusing (there are 2 separate
checks for cpu_is_omap3505()).
Remove the 3505-specific checking since CK_3505 flag is not used, and
treat all AM35x clocks the same.
This means that the SGX clock (the only AM35x clkdev not currently
flagged for 3505) will now be registered on 3505, but that is
harmless. That can be cleaned up when the clkdev nodes are removed in
favor of them being registered by hwmod.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The AM35x UART4 is common to all AM35x devices, so use CK_AM35XX instead
of (CK_3505 | CK_3517), which is equivalent.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Conflicts:
drivers/net/ethernet/intel/e1000e/param.c
drivers/net/wireless/iwlwifi/iwl-agn-rx.c
drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
drivers/net/wireless/iwlwifi/iwl-trans.h
Resolved the iwlwifi conflict with mainline using 3-way diff posted
by John Linville and Stephen Rothwell. In 'net' we added a bug
fix to make iwlwifi report a more accurate skb->truesize but this
conflicted with RX path changes that happened meanwhile in net-next.
In e1000e a conflict arose in the validation code for settings of
adapter->itr. 'net-next' had more sophisticated logic so that
logic was used.
Signed-off-by: David S. Miller <davem@davemloft.net>
This pull request is quite big, but mainly because there's a
giant rework of the s3c_hsotg.c driver to make it friendlier
for other users. Samsung Exynos platforms use the DesignWare
Core USB2 IP from Synopsys so it's a bit unfair to have the
driver work for Samsung platforms only. In short, the big
rework is in preparation to make the driver more reusable.
Another big rework in this pull request came from Ido, where
he's removing the redundant pointer for the endpoint descriptor
from the controller driver's own endpoint representation. The
same pointer is available through the generic struct usb_ep
structure.
Also on this pull request is the conversion of a few extra
controller drivers to the new style registration, which allows
multiple controllers to be available on the same platform and
helps remove global pointers from those drivers.
Together with those big changes, there's the usual fixes and cleanups
to gadget drivers. Nothing major.
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Merge tag 'gadget-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: gadget: patches for v3.5
This pull request is quite big, but mainly because there's a
giant rework of the s3c_hsotg.c driver to make it friendlier
for other users. Samsung Exynos platforms use the DesignWare
Core USB2 IP from Synopsys so it's a bit unfair to have the
driver work for Samsung platforms only. In short, the big
rework is in preparation to make the driver more reusable.
Another big rework in this pull request came from Ido, where
he's removing the redundant pointer for the endpoint descriptor
from the controller driver's own endpoint representation. The
same pointer is available through the generic struct usb_ep
structure.
Also on this pull request is the conversion of a few extra
controller drivers to the new style registration, which allows
multiple controllers to be available on the same platform and
helps remove global pointers from those drivers.
Together with those big changes, there's the usual fixes and cleanups
to gadget drivers. Nothing major.
Add 88pm860x into ttc_dkb, and it will impact the suspend/resume
of pxa910
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
For the SOC chips using tauros2 cache, will need disable
and resume tauros2 cache for SOC suspend/resume.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
When enable ARCH_SUSPEND_POSSIBLE, it need defintion of
cpu_mohawk_do_suspend and cpu_mohawk_do_resume
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <<haojian.zhuang@gmail.com>
MMP2 can enter system sleep level during suspend.
It can be waken up by PMIC interrupt, RTC/ALARM.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Move APBC_REG, APMU_REG and CIU_REG definition to addr-map.h
driver only need include addr-map.h to get access of the
registers.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Commit 4e8ee7de22 (ARM: SMP: use
idmap_pgd for mapping MMU enable during secondary booting)
switched secondary boot to use idmap_pgd, which is initialized
during early_initcall, instead of a page table initialized during
__cpu_up. This causes idmap_pgd to contain the static mappings
but be missing all dynamic mappings.
If a console is registered that creates a dynamic mapping, the
printk in secondary_start_kernel will trigger a data abort on
the missing mapping before the exception handlers have been
initialized, leading to a hang. Initial boot is not affected
because no consoles have been registered, and resume is usually
not affected because the offending console is suspended.
Onlining a cpu with hotplug triggers the problem.
A workaround is to the printk in secondary_start_kernel until
after the page tables have been switched back to init_mm.
Cc: <stable@vger.kernel.org>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
At the moment, read_persistent_clock is implemented at the
platform level, which makes it impossible to compile these
platforms in a single kernel.
Implement these two functions at the architecture level, and
provide a thin registration interface for both read_boot_clock
and read_persistent_clock. The two affected platforms (OMAP and
Tegra) are converted at the same time.
Reported-by: Jeff Ohlstein <johlstei@codeaurora.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The machine endianness has no direct correspondence to the syscall ABI,
so use only AUDIT_ARCH_ARM when identifying the ABI to the audit tools
in userspace.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM audit code incorrectly uses the saved application ip register
value to infer syscall entry or exit. Additionally, the saved value will
be clobbered if the current task is not being traced, which can lead to
libc corruption if ip is live (apparently glibc uses it for the TLS
pointer).
This patch fixes the syscall tracing code so that the why parameter is
used to infer the syscall direction and the saved ip is only updated if
we know that we will be signalling a ptrace trap.
Reported-and-Tested-by: Jon Masters <jcm@jonmasters.org>
Cc: stable@vger.kernel.org
Cc: Eric Paris <eparis@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The inline assembly in kernel_execve() uses r8 and r9. Since this
code sequence does not return, it usually doesn't matter if the
register clobber list is accurate. However, I saw a case where a
particular version of gcc used r8 as an intermediate for the value
eventually passed to r9. Because r8 is used in the inline
assembly, and not mentioned in the clobber list, r9 was set
to an incorrect value.
This resulted in a kernel panic on execution of the first user-space
program in the system. r9 is used in ret_to_user as the thread_info
pointer, and if it's wrong, bad things happen.
Cc: <stable@vger.kernel.org>
Signed-off-by: Tim Bird <tim.bird@am.sony.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Same code. Use the generic version. The special Makefile treatment is
pointless anyway as init_task.o contains only data which is handled by
the linker script. So no point on being treated like head text.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20120503085034.221811388@linutronix.de
Add the two standard UART signals (GPIO46_STUART_RXD, GPIO47_STUART_TXD) to the
initial mfp config table hx4700_pin_config[] passed to pxa2xx_mfp_config().
Although pxa2xx_transceiver_mode() can subsequently set these two signals via
its own call to pxa2xx_mfp_config(), pxa2xx_transceiver_mode() is only present
when CONFIG_PXA_FICP=y. Hence this patch provides a default mfp config.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Suppot gpio/irq/timer in mmp-dt driver. Support PXA910 also in mmp-dt
driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Parse timer from DTS file. Avoid to use hardcoding marco for register.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Merge irq-pxa168 and irq-mmp2. And support device tree also.
Since CONFIG_SPARSE_IRQ is enabled in arch-mmp, base irq starts from
NR_IRQS_LEGACY.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Append CONFIG_MACH_MMP2_DT.
CONFIG_MACH_MMP_DT is used to ARMv5 DT support. CONFIG_MACH_MMP2_DT
is used to ARMv7 DT support. These two machine support can't be
selected at the same time.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Since irq_domain_add_simple() is removed, remove it in mmp-dt.c also.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This patch removes support for ARMv3 CPUs, which haven't worked properly
for quite some time (see the FIXME comment in arch/arm/mm/fault.c). The
only V3 parts left is the cache model for ARMv3, which is needed for some
odd reason by ARM740T CPUs, and being able to build with -march=armv3,
which is required for the RiscPC platform due to its bus structure.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
At init time, check the powerdomains lookup is successful otherwise
exit the cpuidle driver init function with -ENODEV like what is done for the
omap3 cpuidle driver.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This reverts commit 46f8c3c7e9.
The commit above swapped the DSI1_PPID and DSI2_PPID register fields in
CONTROL_DSIPHY to be in sync with the newer public OMAP TRMs(after version V).
With this commit, contention errors were reported on DSI lanes some OMAP4 SDPs.
After probing the DSI lanes on OMAP4 SDP, it was seen that setting bits in the
DSI2_PPID field was pulling up voltage on DSI1 lanes, and DSI1_PPID field was
pulling up voltage on DSI2 lanes.
This proves that the current version of OMAP4 TRM is incorrect, swap the
position of register fields according to the older TRM versions as they were
correct.
Cc: stable@vger.kernel.org # v3.2+
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 384ebe1c28, "gpio/omap: Add DT
support to GPIO driver", introduced dynamic IRQ numbering of OMAP GPIO
interrupts, breaking all IH_GPIO_BASE based IRQ number calculations.
This issue was corrected in the OMAP GPIO driver and the related header
file with commit 25db711df3, "gpio/omap:
Fix IRQ handling for SPARSE_IRQ".
However, the Amstrad Delta FIQ handler, which replaces the gpio-omap
driver in serving GPIO interrupts on this board, still uses that
outdated method. Fix it.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is just no point mapping up to 512MB for a serial port.
Using a single 1MB entry is way sufficient for all users.
This will create less interference for the following debugging patch.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The MMCI and PL022 SPI drivers sure need their platform data to
work on the Versatile as well. (This does not fix the auxdata for
MMCI instance mmc1 on the Versatile PB though.)
Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This does two things to the FPGA IRQ controller in the versatile
family:
- Convert to MULTI_IRQ_HANDLER so we can drop the entry macro
from the Integrator. The C IRQ handler was inspired from
arch/arm/common/vic.c, recent bug discovered in this handler was
accounted for.
- Convert to using IRQ domains so we can get rid of the NO_IRQ
mess and proceed with device tree and such stuff.
As part of the exercise, bump all the low IRQ numbers on the
Integrator PIC to start from 1 rather than 0, since IRQ 0 is
now NO_IRQ. The Linux IRQ numbers are thus entirely decoupled
from the hardware IRQ numbers in this controller.
I was unable to split this patch. The main reason is the half-done
conversion to device tree in Versatile.
Tested on Integrator/AP and Integrator/CP.
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This code removes platform dependency from s3c-hsotg driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This adds a driver for the ST-Ericsson ux500 hash hardware
module. The driver implements support for SHA-1 and SHA-2.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Add node for the audio codec
* Enable Tegra's I2S1 controller and DAS
* Add node for top-level sound complex
Signed-off-by: Stephen Warren <swarren@nvidia.com>
According to the device's datasheet, it can support an interrupt too.
However, the existing board file doesn't specify an interrupt, and I
don't have the schematics, so I can't add an interrupts property. The
current Linux driver doesn't support anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the known i2c devices on seaboard to the i2c table.
Also rename the temperature sensor device node, and mark it as a nct1008
instead of an adt7461 (which it is -- the chips are compatible though).
Signed-off-by: Olof Johansson <olof@lixom.net>
[swarren: Removed isl29018 from patch; it's already there now. Fixed
interrupts properties now that Tegra GPIO is an interrupt controller.
Moved smart-battery to the correct I2C bus.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard
actually uses this as an I2C bus mux, and devices are connected to both
pingroups. This change statically assigns the I2C2 controller to pingroup
PTA, so that on-board devices can be accessed. The DDC pingroup is used
for EDID/DDC accesses which are not yet required, given the absence of
any Tegra graphics support. I2C muxing will be supported later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the device info for ALS and proximity sensor for tegra
boards cardhu, ventana and seaboard.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit
description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
struct powerdomain varialbes are all file local, make them static.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: update changelog, drop error check in fast path]
Signed-off-by: Kevin Hilman <khilman@ti.com>
Reduce the scope of the omap3_idle_data to the file as it is only used
in cpuidle34xx.c.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Simplify the indentation by removing the useless 'else' statement.
Remove the first loop for the 'idx' search as we have it already
with the 'index' passed as parameter.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We are storing the 'omap3_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
As the table is initialized statically, let's remove the initialization at
startup too.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Initialize the omap3_idle_data array at compile time, that will allow
to remove the initialization at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We do not longer need the ''cpuidle_params_table' array as
we defined the states in the driver and we checked they are
all valid.
We also remove the structure definition as it is no longer used.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
With the previous changes all the states are valid, except the last
state which is now handled at runtime by next_valid_state() based on
the errata flags.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: minor changelog rework]
Signed-off-by: Kevin Hilman <khilman@ti.com>
The errata check is done in the next_valid_state function, no need to check
that in the omap3_idle_init function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Use the new cpuidle API and define in the driver the states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
As suggested, this table is an optimized version for rx51 and we
remove it in order to consolidate the cpuidle code between omap3
and omap4, we remove this specific data definition which is used
to override the default omap3 latencies but at the cost of extra
code and complexity.
In order to not lose the values which probably took time to be
measured, the table is converted into a comment with an array
description.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We initialized it at compile time, no need to do that at boot
time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We are storing the 'omap4_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We initialize the omap4_idle_data variable at compile time allowing us
to remove in the next patch the initialization done at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add the static declaration for the omap4_idle_data variable because its scope
is in the file only.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We do not longer need this table as we defined the values
in the driver states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The cpuidle API allows to declare statically the states in the driver
structure. Let's use it.
We do no longer need the fill_cstate function called at runtime and
by the way adding more instructions at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The 'valid' field is never used in the code, let's remove it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This allows platforms to set up things that need to be done at
late_initcall time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Robert Lee <rob.lee@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ehci-mv can support PXA168, PXA910 and PXA920, use this driver to
support pxa168 SPH usb.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
There is an U2O OTG controller on ttc dkb, this patch is going to enable
it.
At this moment, it can only works in device mode, because when works in
host mode, it needs to supply vbus, but we have no vbus driver added
at this moment. Once the vbus driver is added, I'll prepar another
patch to enable the switch function.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Add usb device support for Marvell PXA910.
Actually PXA920 will use the same device.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This patch is part of a set which adds PCMCIA/CF support for the hx4700.
This patch modifies asic3_gpio_config[] as follows:
1. Remove ASIC3_GPIOC4_CF_nCD, whose purpose is unknown.
2. Add ASIC3_GPIOD4_CF_nCD, the actual CF card detect GPIO.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This patch enables the ASIC3 GPIO (12) as a wakeup source:
1. Set the WAKEUP_ON_EDGE_RISE MFP config bits for GPIO12 in
hx4700_pin_config[].
2. Call gpio_set_wake() for GPIO12.
With GPIO12 thus enabled, the mfd/asic3 driver can enable its own GPIOs
as wakeup sources by implementing a irq_set_wake() handler.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
The asic3 driver now sets the DS1WM clock_rate from the newly added
asic3_platform_data clock_rate field.
This patch initializes the asic3_platform_data clock_rate field on the
hx4700 platform.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
From: Linus Walleij <linus.walleij@linaro.org>:
Core support for the U9540 after finalized review
* 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits)
ARM: ux500: ioremap differences for DB9540
ARM: ux500: core U9540 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linus Walleij <linus.walleij@linaro.org> writes:
Delete U5500 after obsoletion of this ASIC, including two patches to the MFD
subsystem that have been ACK:ed by Samuel Ortiz.
* 'ux500-del-u5500-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
mfd/ab5500: delete AB5500 support
mfd/db5500-prcmu: delete DB5500 PRCMU support
ARM: ux500: delete U5500 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6 into next/cleanup
From: Sascha Hauer <s.hauer@pengutronix.de>
ARM: i.MX cleanups for 3.5
* tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6: (5 commits)
ARM: mx53: fix pad definitions for MX53_PAD_EIM_D28__I2C1_SDA and MX53_PAD_GPIO_8__CAN1_RXCAN
ARM: imx/eukrea_mbimx27-baseboard: fix typo in error message
ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some pads
arm: imx: add missing select IMX_HAVE_PLATFORM for MACH_MX35_3DS in Kconfig
arm: imx: make various struct sys_timer static
Includes an update to 3.4-rc4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The cacheflush syscall can fail for two reasons:
(1) The arguments are invalid (nonsensical address range or no VMA)
(2) The region generates a translation fault on a VIPT or PIPT cache
This patch allows do_cache_op to return an error code to userspace in
the case of the above. The various coherent_user_range implementations
are modified to return 0 in the case of VIVT caches or -EFAULT in the
case of an abort on v6/v7 cores.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We can't be holding the mmap_sem while calling flush_cache_user_range
because the flush can fault. If we fault on a user address, the
page fault handler will try to take mmap_sem again. Since both places
acquire the read lock, most of the time it succeeds. However, if another
thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
between the call to flush_cache_user_range and the fault, the down_read
in do_page_fault will deadlock.
[will: removed drop of vma parameter as already queued by rmk (7365/1)]
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This also changes the DMA clkdev lookup to use the imx-dma driver name
and "ahb" as connection ID to request the hclk dma clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This gate consists of two bits:
0b00: clk disabled
0b01: clk enabled in run mode and disabled in sleep mode
0b11: clk enabled
Currently only disabled and enabled are supported. As it's unlikely
that we find something like this in another SoC create a i.MX specific
clk helper for this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35.
Currently only reading the rate is supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MX53_PAD_EIM_D28__I2C1_SDA uses an undefined PAD_CTRL_I2C
MX53_PAD_GPIO_8__CAN1_RXCAN has an incorrect input_select value
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the cpuidle driver for the ux500 SoC.
The boards saves 12mA with these states. It is based on the latest
cpuidle consolidation from Robert Lee.
The cpu can go to retention only if the other core is in WFI.
If the other cpu is in WFI and we decoupled the gic from the cores,
then we have the guarantee, it won't be wake up.
It is up to the prcmu firmware to recouple the gic automatically
after the power state mode is selected.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In dbx500 based devices the PRCMU Timer 4 is used as a clocksource
and sched_clock. Here we fetch all necessary addressing information
required for correct PRCMU initialisation from the Device Tree
instead of using hard-coded values.
CC: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now the SCMC911x is correctly enabled in Device Tree, there is no need
to continue registering it from platform code. In fact, if we continue
doing so, the system will throw an error on boot.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To aid in sequential one-by-one Device Tree enablement, we split
cpu-db8500's platform_devs structure into normal platform boot, where
we leave all devices to be added in tact and a DT version where we
will remove the devices as they are DT enabled.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch prevents i2c devices which are not present on the Snowball
low-cost development board from being registered. Devices such as;
tc3589x, bu1780 and lp5521 are present on other supported boards,
but are not located on Snowball.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This platform has been obsoleted and was only available inside of
ST-Ericsson, no users of this code are left in the world. This
deletes the core U5500 support entirely in the same manner as the
obsoleted U8500 silicon was previously deleted.
The cpu_is_u5500() macros that can read out the CPU ID is left
until the next kernel cycle, this makes it possible to merge
deletion of dependent drivers without breakage.
This also has the upside of removing the mailbox driver which was
our only driver that was outside the drivers/* hiearchy, now the
machine directory only handles machines and nothing else.
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Jonas Aberg <jonas.aberg@stericsson.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The DB9540 ASIC has bigger PRCMU and PRCMU TCDM memories,
so create a separate mapping table for these.
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the U9540 variant of the U8500 series. This
is an application processor without internal modem. This is the
most basic part with ASIC ID, CPU-related fixes, IRQ list, register
ranges, timer, UART, and L2 cache setup. This is based on a patch
by Michel Jaouen which was rewritten to fit with the latest 3.3
kernel.
ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
migrate to using Device Tree for getting the IRQs to devices.
ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
as suggested by Arnd Bergmann.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull ARM fixes from Russell King.
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQs
ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victim
ARM: 7403/1: tls: remove covert channel via TPIDRURW
ARM: 7401/1: mm: Fix section mismatches
ARM: OMAP: fix DMA vs memory ordering
ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQs
ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler
ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.c
ARM: 7398/1: l2x0: only write to debug registers on PL310
ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310
ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores
Linus Walleij <linus.walleij@linaro.org> writes:
This is a pull request for the GPIO and pin control stuff
accumulated in the ST-Ericsson tree. Here we have:
- Improvements and fixes and a custom pin config API from
Rabin Vincent
- Device Tree bindings from Lee Jones
- Some accumulated patches by yours truly.
- A MSP platform data init patch from Ola Lilja that is merged
here due to dependency on pin config work. It is to be
used with work being worked on in parallel in the ALSA
SoC subsystem.
If you wonder about the custom pin config implementation this
is to be used as a transition base as I am rewriting the
driver to use pinctrl. Expect a final pull request on top
of this one that will move the ux500 over to pinctrl.
* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add support for MSP I2S-devices
drivers/gpio: gpio-nomadik: Add support for irqdomains
drivers/gpio: gpio-nomadik: Apply Device Tree bindings
ARM: ux500: update pin handling
ARM: ux500: implement pin API
ARM: ux500: remove a bunch of internal pull-ups
plat-nomadik: new sleep mode pincfg macros
gpio/nomadik: use ioremap() instead of static mappings
gpio/nomadik: support low EMI mode
gpio/nomadik: fix spurious interrupts with SKE
gpio/nomadik: cache [rf]w?imsc
gpio/nomadik: don't set SLPM to 1 for non-wakeup pins
Also includes an update to v3.4-rc4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The AT91RM9200 Ethernet controller still has a fixed IO mapping.
So:
* Remove the fixed IO mapping and AT91_VA_BASE_EMAC definition.
* Pass the physical base-address via platform-resources to the driver.
* Convert at91_ether.c driver to perform an ioremap().
* Ethernet PHY detection needs to be performed during the driver
initialization process, it can no longer be done first.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The cmpxchg64 routines for ARMv6+ CPUs replicate inline assembly that
already exists for atomic64 operations. Furthermore, the cmpxchg64 code
uses the "memory" constraint in the clobber list rather than identifying
the region of memory that is actually modified.
This patch replaces the ARMv6+ cmpxchg64 code with macros that expand to
the atomic64_ and local64_ variants, casting the pointer parameter to
the appropriate container type.
Cc: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
scu_power_mode changes the power mode for the current CPU, which it
determines from smp_processor_id(). However, this assumes that the
physical CPU number is equal to Linux's logical CPU number and if this
is not true, we will power off the wrong CPU.
This patch uses cpu_logical_map to translate the logical CPU number
into a physical one in scu_power_mode.
Reported-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors and
warnings mostly, but also some clock/device setup issues on exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors
and warnings mostly, but also some clock/device setup issues on
exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: PXA2xx: MFP: fix potential direction bug
ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT
arm/sa1100: fix sa1100-rtc memory resource
ARM: pxa: fix gpio wakeup setting
ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
ARM: EXYNOS: Fix resource on dev-dwmci.c
ARM: S3C24XX: Fix build warning for S3C2410_PM
ARM: mini2440_defconfig: Fix build error
ARM: msm: Fix gic irqdomain support
ARM: EXYNOS: Fix incorrect initialization of GIC
ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
ARM: u300: bump all IRQ numbers by one
ARM: ux300: Fix unimplementable regulation constraints
When a CPU is hotplugged off, we migrate any IRQs currently affine to it
away and onto another online CPU by calling the irq_set_affinity
function of the relevant interrupt controller chip. This function
returns either IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY, to indicate
whether irq_data.affinity was updated.
If we are forcefully migrating an interrupt (because the affinity mask
no longer identifies any online CPUs) then we should update the IRQ
affinity mask to reflect the new CPU set. Failure to do so can
potentially leave /proc/irq/n/smp_affinity identifying only offline
CPUs, which may confuse userspace IRQ balancing daemons.
This patch updates migrate_one_irq to copy the affinity mask when
the interrupt chip returns IRQ_SET_MASK_OK after forcefully changing the
affinity of an interrupt.
Cc: stable@vger.kernel.org
Reported-by: Leif Lindholm <leif.lindholm@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When performing a kexec on an SMP system, the secondary cores are stopped
by calling machine_shutdown(), which in turn issues IPIs to offline the
other CPUs. Unfortunately, this isn't enough to reboot the cores into
a new kernel (since they are just executing a cpu_relax loop somewhere
in memory) so we make use of platform_cpu_kill, part of the CPU hotplug
implementation, to place the cores somewhere safe. This function expects
to be called on the killing CPU for each core that it takes out.
This patch moves the platform_cpu_kill callback out of the IPI handler
and into smp_send_stop, therefore ensuring that it executes on the
killing CPU rather than on the victim, matching what the hotplug code
requires.
Cc: stable@vger.kernel.org
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
TPIDRURW is a user read/write register forming part of the group of
thread registers in more recent versions of the ARM architecture (~v6+).
Currently, the kernel does not touch this register, which allows tasks
to communicate covertly by reading and writing to the register without
context-switching affecting its contents.
This patch clears TPIDRURW when TPIDRURO is updated via the set_tls
macro, which is called directly from __switch_to. Since the current
behaviour makes the register useless to userspace as far as thread
pointers are concerned, simply clearing the register (rather than saving
and restoring it) will not cause any problems to userspace.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
WARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference
from the function arm_memory_present() to the function
.init.text:memory_present()
The function arm_memory_present() references
the function __init memory_present().
This is often because arm_memory_present lacks a __init
annotation or the annotation of memory_present is wrong.
WARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch
in reference from the function alloc_init_pud() to the function
.init.text:alloc_init_section()
The function alloc_init_pud() references
the function __init alloc_init_section().
This is often because alloc_init_pud lacks a __init
annotation or the annotation of alloc_init_section is wrong.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
New options enabled:
* RUNTIME_PM
* ISL29028 (light and proximity)
* INPUT_MPU3050 (gyro)
* BATTERY_SBS
* EM3027 RTC
* INPUT_MISC (dependency)
* POWER_SUPPLY (dependency)
The IIO option seems to have been moved recently too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
