Remove bootargs field as this information is retrieved from the bootloader.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add anatop regulators to imx6q.dtsi for all imx6q platforms.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqsIwAAoJEBvUPslcq6VzKKEP/0+ClC5BNXK/rEbcUE9g2elY
yAGF1HFWaRDBR2mpYXGHcGJGot81AN/5AyoqqvabGUD1Vk7VU2v/nQX9Fa7f9YDW
rC3Jh9/eL6oib/qxSDau7MeSNHygbkcm24Lm/nRcpnwiz7bQMVpK3D963uUm3F+9
RQVd5SrHRIVEP8D3ngtZjY345LOcsi2Ou5HJdJPF9vGaBuFWZ88iQrLkg/Xq7+Yy
SoNRnYUmxfD4H3AsxKQhlW/XMKPXEjMF3Us+yGDoJ07221NqoOczmYDvQbj1udIp
7WCNa6jCEdDkpdHICXfhPaOTTRGKMyk1tUWXsw5Thqdau4EV3Q9r1frW2nOawbAh
eIBo2546btZ/t6W3fdgRp/IiqVtuN1QzB14MaVmiMF8TpD9Ge3qX60cZyoaXP93y
IaRbE0u0uJrt3m6vZTzBplVUGE8vBXLizJgeoN4DCyckSkvLkks+NkDUjQ15Ryhk
nSTtvVIZfviTcn386J0sV7I0lMl59hfv5WyGOgLfFtWINpAs/EmZ4OslRRLVIyfx
cugDbkRLS6pAXBubhL+0LUHAbL+UitJCgHk3R3TXw4HiYR/j0SzRvWuGofPuTI7x
0OGdLkR8c7KroNlthIb+MFY/td8tYhJs2c4qDPTDGZk23RzJZJTdMQD/L/pT6SZq
sNYwc5TLIViZElaO99yi
=lzYq
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-dss-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Clean up for omap DSS board init in preparation for adding DT support.
By Tomi Valkeinen
via Tomi Valkeinen (1) and Tony Lindgren (1)
* tag 'omap-cleanup-dss-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAPDSS: DSI: implement generic DSI pin config
OMAPDSS: Taal: move reset gpio handling to taal driver
OMAPDSS: TFP410: rename dvi files to tfp410
OMAPDSS: TFP410: rename dvi -> tfp410
OMAP: board-files: remove custom PD GPIO handling for DVI output
OMAPDSS: panel-dvi: add PD gpio handling
Resolved context conflicts in arch/arm/mach-omap2/board-omap4panda.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqwnWAAoJEBvUPslcq6VzFJMQAKZ611LhMfYgZygdUbfmpLMW
U4Snai1YeQ2qYTxTC9MiqB4nNXX8qTqY8bHQz5tJUgKs7FI3bhPM1zZPXgqYeKc1
nqtvbd25TIY/7lGyB1tzk9XLQgMg7HASuJzCqlKW+Yf26M3DZOo19qn2XzNDGcYZ
/RwBBjtXuUioHk8mMhtn+bC9rDIG6KNYv+so8O3onne5wFtIYgTVTCKq4du78vyB
EceOZO7BT0z3zkVFK0mnW3MXeWQ/qEitaZVQ/1NnVsKqbdcGbuEPaSoNkYPH95Ui
EIzJIFpFFGvoN09RtcOd9hK4cZFTWB43LZRWzgxce6FGH0Do4JTsCgE0QC5BBcl2
8+AyDkO1HyFg3x8RyIpleCRHWgw2OWVLLRowVvwbKmhj1I6eBqvalT7Dj4WFnR6n
rldA0Rwi3Kt/QZCPHvJ0XVGxoAbKQm0Pmv6Ln0tEI8X5ADpyyR8fqGbarUi+lTPD
YuBWMT9ENG/7mFkxRg03eRGbFezE6BVEVmmnhwV12rfEUYgb2YGWu6sQIO+odxdI
sXOxvwJOoK54Ldcho+/Ka2O2/W5CVgNc+yBM5e+sGn2zfF1wvjBKdrc8fAfHj1Gd
ge+ZCi0tjSEgFa1oY2ZygFDpryk7BNm/xpnzUJdDR7Jp2Z/XQ2rGvFVbtMxED3/w
zmZeDXBlX0zi6xeBa+xo
=KYD3
-----END PGP SIGNATURE-----
Merge tag 'omap-dt-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Minor DT updates based on the dt-missed-3.4 branch
By Benoit Cousson (3) and Peter Ujfalusi (2)
via Tony Lindgren
* tag 'omap-dt-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm/dts: omap4-panda: Add LEDs support
arm/dts: omap4-sdp: Add LEDs support
arm/dts: twl4030: Add twl4030-gpio node
OMAP4: devices: Do not create mcpdm device if the dtb has been provided
OMAP4: devices: Do not create dmic device if the dtb has been provided
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqwArAAoJEBvUPslcq6Vz0KMP+wWpRkFC+Retu1O1Lxy00Ea4
Zjg5wVfYGLuDAJf3i0xFKcDZA8AfDJws/kHi4sC0cbP296AfHqz7I25gKZqPoXf4
Y6iDRU/qLlO8djhJh7i+OP7/A4IlgMtOlMWJEZXrmhvuHRI5VusfpU/2p802yvFR
xn3oWJrQ1WtE+vvNo9sK67HXLogt+49r83XGWNY66WGePKTpBf/LD+wN7zsCVaW2
xK6vqg6Z/jq8naS6WN9+zdhqgB8huULM9RX/FcOmV8hgm9oSJrqzxHIB9jyVvjXQ
OMTz7WjHlakkneYBWxEGCsF8I4w5PJIXOav1OACvrsERKZpPJ0AmvYW05ZusJwLC
XWuYER9v+IJG1zzym7SBa/jIkGWrCKrQKxERvi8MD9NUl2y33flGzS89Hvm9Zjap
TO5U2yXIADqL83zHhtkgmWT6isHnFbQcwbc2Nz+oh/0Tnm2vrwRf88jxeFVX0k7D
l9A+XgPpUeoVEdyFtb1Gt++xojuwgEjZWKHuMfS+fJrj3WwolC2MLAVW6pDsTTQd
AERUuOHMgzODQ2Jx1rnljTAh57+3gVkw2iICtrWzecbbqHb6bOiB/sRN1KK+oQKh
CDiH2TzibDL1T+WDLFHBJTx0eTbRiQjViYaYtgM28k3r+wlNNRbf7WTU8PjA7AZp
rd/0s6+c+/kI4BcRVVF/
=ALlA
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-timer-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Timer changes to make it easier to support various SoCs
By Vaibhav Hiremath
via Tony Lindgren
* tag 'omap-cleanup-timer-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Make OMAP clocksource source selection using kernel param
ARM: OMAP2+: Replace space with underscore in the name field of system timers
ARM: OMAP1: Add checks for possible error condition in timer_init
except for the RNG driver that will be done later on.
As this depends on omap-devel-hwmod-data-for-v3.5 and causes merge
conflict with omap-fixes-non-critical-for-v3.5, this branch is based
on merge of the two.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqv9WAAoJEBvUPslcq6VzXqUQAMBP6CsbuTu+Lz4zHr9aPRZM
ehjyxm2SaD3RoqxuvmLd9uzVQEj4559UomS4IxVsX1DHMNWsG8s6PyDjjiLy6At5
HBoRxVo7M9UXrGLna2pusG/lJeixIiZ/HA4cQ2DNq/mJpjihJE0arjqv6Uxex3Tb
UQbohEgqacxZsBYYbQRIG2LoBkwXVQxpss7aRkEkWzT9vQh0LsIm3xcKSPerWJMV
fbvnymom1C3qA+yI2U+l92Lyy7bj5T+4ZSXjCWO80YiJ/3t+Z/Tf609WBrs+qCj0
7krApdgm4dMpFZ9+D0rHssoH31MWhVMuQEcyc4luQP1waB8mhhlZvGl1mjzLJaZ0
9Q2oqZo0hgA6zeJKqbta4FlGdfe95lGfd9lxcFRy8ujrlGQJJKYrM39W/lUpcSOe
wID23NYvD8Gjr1I8GHoWAamv9co7+7Z/P9v8hVtcd2wRTecz73ldWRN+cTXiP1j2
38ddaokLQBnXdBRzbig18QNBcIVfPR3vWpnfzL7wJC5/63ugTMuXB9DsedHuC4CD
zZZctPfhq52n+Quzjs3pnxb7KtBwaqZP1gkGtZd3IjW8DLjVkG3E9WFqiseEB+yN
iow3PcB8sAGDl/4PdVCIRRW/2lsf9GEcgbzhds4I6AaGLnX+dQFJBj6fP3GETNJ5
ipI7cW1iaNqc4tvcGUEq
=w67p
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-devices-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Changes to split plat-omap/devices.c into mach-omap1 and mach-omap2
except for the RNG driver that will be done later on.
As this depends on omap-devel-hwmod-data-for-v3.5 and causes merge
conflict with omap-fixes-non-critical-for-v3.5, this branch is based
on merge of the two.
By Tony Lindgren (7) and others
via Tony Lindgren (4) and Paul Walmsley (1)
* tag 'omap-cleanup-devices-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits)
ARM: OMAP1: Pass dma request lines in platform data to MMC driver
ARM: OMAP: Move omap_mmc_add() to mach-omap1
ARM: OMAP2: Use hwmod to initialize mmc for 2420
ARM: OMAP2+: Move omap_dsp_reserve_sdram_memblock() to mach-omap2
ARM: OMAP1: Move omap_init_uwire to mach-omap1
ARM: OMAP1: Move omap_init_audio() to keep the devices in alphabetical order
ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset
ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database
ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports
ARM: OMAP4: hwmod data: I2C: add flag for context restore
ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports
ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data
ARM: OMAP2+: HDQ1W: add custom reset function
ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420
arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
...
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqu+XAAoJEBvUPslcq6VzckYP/jy9+my5lhqTE0L1CogBMGUW
cWPwvChj3zpmQtTfgHq5kSMXu3ZRHrigyCG/oKC/5CVL9r4yTh8T6awXXCE224TD
gv0jxR/6ZxnO0cwuh1e0sv+iNO7BUTVGy+N/PZzqthCY8gQbjedz/OgWdJEDQPes
Hu8agozwb9NMo99Mc7iarRg0xQGj7CEWbL9YpvthnVemvpEaHruUcFM4wgOPm2x3
hkoPWbbiAC2vI7xXPrGG6cfnMeXKFjKTrx0GCn+Qcwpne37DCAxTxHqBLVki+ovL
EW0waDINFLa3n+wunJEiCpJ5LfFRiTH4B7PrrMzqrfB/csnbkZ6F33UpBsmUfa27
i4qHokfjfTbsyG7MdjfRgcoQTqS/eN4H3YtfzFqI64i8w5yFWGRhbv792vyUpuSW
nkvIR9MY28DS+e6AQsaspuRjjrIFyD/azSjq+Nqt/59lfAdzmJ6Govspg/yOEaqz
FllNeHBkzFUZsYaD4jml/Ffr+rvM5fS1ZIPZWe21hhGE2AX55RhQBzRT8AQZ4T4k
4I0lsgTmIHPbaA8oaOkyn6aQPDGTV6eJLnGxbG5sDTwf0tWTqVPZbUkg6THBbeiY
Wmyb0y3AOzs1YkqpXf12f8A3r0BRl7wkcaj9jXhkdPi38Kl28p3dLavn/Yz3N+Vj
NRZd89FM+A84gR0SxNp+
=BR/x
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-hwmod-data-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
Data changes related to omap hwmod
By Paul Walmsley (4) and others
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-devel-hwmod-data-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset
ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database
ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports
ARM: OMAP4: hwmod data: I2C: add flag for context restore
ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports
ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod
ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data
ARM: OMAP2+: HDQ1W: add custom reset function
ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420
Note that these are based on omap-pm-regulator-for-v3.5 as
both branches are adding twl regulators.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqu7RAAoJEBvUPslcq6VzC3sQAI5xS3PyPaU+kP1mSNl85wKH
wFnYenRP2VYkvlPOnFz1SrZNROFBrRdqc7gbHFeV/gfn5qbMBb430mKlO4Q2eh5S
kYUI4DlWrXn8Z19hfZOTK1HTL/Mtcvb08XLUI1hN6NUhutjQOT5Rs2yWWVC2Y0MU
Ov5FYz6oLwxAFkiezgeNnKzeCkMX+RX+9DwTOcl/84h/Xe8nSgPl6zRIpASirbuH
frSMbQT6JqVx6h/sykBCxcbEMtGDkeO4QNIFzfocsZgZ+4SnaVJNVh59ceh3pFr9
2AN2bkeXAAwj4Rm8bpLsRm7bawmDeradCskYe9E1gZDHTwz57jgw3ykLzoT04wHK
DhRXaZ4m5p11xsQEUtjpZEp433qBF602+ndDsl1qsk6OUBMqGMaF7GELLZ8GZY7v
NEuCq8d7gJ3AG1EOMbxvQXlxueI3FkbX+ptBLTjU3+IeIdia4LyZqrmW6LMAM7hK
6Xm+6RY0lnf95oZhqKA71hLocwCVm9IVnEqdfgnOHPyJ6NsCE2MLGu8B47fZKfJ/
XIPlsVY1uRBeQ2wEXsnseDy1DSCWEU4AcnBhzyjIZFcGuaCCph3RPN4Z2skyAWbX
SuiYSYWL+HOFzIjhkAVLg4NAVLWu2GykJSYvt0WoIiBf/L9OUaiCkJgdpWa1Qfun
S4DLjjMJa0/K9xhW6vVO
=l8vH
-----END PGP SIGNATURE-----
Merge tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
Board specific changes for omap.
Note that these are based on omap-pm-regulator-for-v3.5 as
both branches are adding twl regulators.
By Paul Gortmaker (8) and others
via Linus Torvalds (38) and others
* tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAP: omap4panda: Use common configuration for V1V8, V2V1 supplies
OMAP: 4430SDP: Use common configuration for V1V8, V2V1 supplies
OMAP4: twl-common: Add twl6030 V1V8, V2V1 SMPS common configuration
ARM: OMAP: Mark Beagleboard-xM MMC bus as 4-bit
Add MSUB support for the LogicPD OMAP3530 DevKits
ARM: OMAP: rx51: Platform support for lis3lv02d accelerometer
ARM: OMAP2+: craneboard: register emac device
ARM: OMAP4: board-omap4panda: Register platform device for HDMI audio codec
ARM: OMAP4: board-4430sdp: Register platform device for HDMI audio codec
ARM: OMAP: devices: Register platform devices for HDMI audio
ARM: OMAP3: igep0020: Add support for Micron NAND Flash storage memory
ARM: OMAP2+: nand: Make board_onenand_init() visible to board code
ARM: OMAP3: cm-t35: add support for power off
ARM: OMAP: WiLink platform data for the PandaBoard
ARM: OMAP2PLUS: Enable HIGHMEM
ARM: OMAP: omap2plus_defconfig: Enable ehci-omap and sms95xx support
Signed-off-by: Olof Johansson <olof@lixom.net>
Note that this depends on omap-devel-hwmod-for-v3.5.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqsOuAAoJEBvUPslcq6VzT0UP/Ash5WqQ6AOz6vfvJVwYs7FA
/ITUt05h0bpd8WbO5jDRNkUWL/NKfJ9zIfyEt24OVrPI0dhMOLVkPFdCTsQujIcG
5IztIDg4VnebUKyelsW6NMUsfUXURRVmcl4kYlYcRH3zaNOHz+ae2RUVwzTX0/RR
2T8+tFnjjyilXQ3T6swUnhMzB/BARpKK4ghO1vambIkRoe7ZaCdyzenBC3010ngx
zHikigd27S6FKOhX6jJJNFtp6WK6bKWSOEBfXaR5SOgFM45VDQZltQMNa/EBbktl
TXFQL0vRTIAOTGRrbhtcD/ny6kiS+NxC9ZeFbEFpQVdiZwJyPKpqOW10hV/KKeTR
9fuxPnCoc9DgaEx3YyFY2jjvRfgwGL0Dox/mu508RdOxTOgWcIJ+dYK1lihtMCrI
I5A0Mh35h9ykUmU2m9Hw0odwB+JdPL6HgYKwKfYAgjoGMMeQHPzt7m77dsEu8PZr
XpQAmT+MH0D2ATbGvISChRJSi1Zac2dd8WmKKLoE7Saq8U63G0IvocIdO7Xbr3/l
BxnCAOH5VQ9f5CBdLWNFKwKsc+y0EFGZRuv4CF6Y3qYwLxfmubXN6P0u9HjwVuNl
beWhujTpaeQJ0x0ZHVxA0UYjoJuNx0xJAJTeuN5XwfH2r9lX82TYxgs4CyC6fdH7
Ueb5QfhecxMx1RzaoA/G
=ECOj
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
Updates for PRCM (Power, Reset, Clock Management).
Note that this depends on omap-devel-hwmod-for-v3.5.
By Kevin Hilman (3) and others
via Paul Walmsley (2) and Tony Lindgren (1)
* tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
ARM: OMAP2+: dmtimer: cleanup iclk usage
ARM: OMAP4+: Add prm and cm base init function.
ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header
ARM: OMAP3: Fix CM register bit masks
ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx
ARM: OMAP3: clock data: treat all AM35x devices the same
ARM: OMAP3: clock data: replace 3503/3517 flag with AM35x flag for UART4
Note that this depends on a fix in omap-fixes-non-critical-for-v3.5,
so it's based on that.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPrAV8AAoJEBvUPslcq6VzYZAP/045jltORwb24AWaz4wYlraZ
v+Ctq25GmirZiFU9/88N5EHeYNQI1ep/sdtzLb+Pcfe1uqGGkoXMBEtyQ12if2yI
1vFoRaHDFHTNOsi3Y0SfOrE6q+zFX8SqVtTUSzXI0QELY2wektKLdC4THHmf5M/R
g0aRLTBbPDtpWHkqjuU4u7gKu7doOJtBJ8n/pZG+oZ2xn8AKJQ/l3J2nF0fBhSX5
HsvrKtc5lhMNVCpmi0D+kJAIsKRdDREA94dLoUPIEdxSK4b6w5/hclPwzZDcnrm5
6jLFWVxs3vxJoWXB86CDhweqWF5nxMitb/DQvYYKDSJJz8xqu+j2vZ9tAApQhQax
uUsr5UH/TP/fd37TJuVJUqGRLjcYy6KfVVDdxqenrQodxsffsFAQ+qD4YoQ8WRKs
soeknAI2WMNoOkEud6nJZzADNeSmbQC2hBdZ1QioScgC3O7ubv0FjsjAd8CKr46d
vcQ5DglQeFeTrUAA+eCtP7ZMFlWMWi7pKiyaXo+YkT0kaFYCZLxyuEglI/DhrcZl
1rEu6foUegdigDM+L+WF5wTEPZXtWRdQTHv+aZiu6GXZ3/AbPrLxM3qWuYR4uyZ4
uhMs5xPXIK99OpCmqy9nAIekYq8nicZCsdnL8HGp5L28Lmhg9ITKonXsD6p4GHS2
OJ29rPNiJyh/RMQQIq3i
=V8mj
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Simplify some SoC config options before things get too unreadable.
Note that this depends on a fix in omap-fixes-non-critical-for-v3.5,
so it's based on that.
By Kevin Hilman (3) and others
via Tony Lindgren
* tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX
ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX
ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally
ARM: OMAP2+: INTC: fix Kconfig option for TI81XX
ARM: OMAP2+: remove incorrect irq_chip ack field
ARM: OMAP4: Adding ID for OMAP4460 ES1.1
ARM: OMAP4: panda: add statics to remove warnings
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
ARM: OMAP: fix trivial warnings for dspbridge
ARM: OMAP4: hsmmc: check for null pointer
ARM: OMAP1: fix compilation issue in board-sx1.c
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqr/UAAoJEBvUPslcq6VzYpkQALtbtTO4aA1Rno1X8Y01sZcy
04f+usJ+3sEmCCGFClDTG47nxt1wLMTILmZrz7ZMzxStYB52H4fP9Mq0+8zGyhCR
Er8bhoMBIsrM5YNPCq3olRV9cCNpn2hzxwG8vQGILAO03vnjG80xjLmyrO2Y2sAl
PSfINZkVZhq2LoaFzZI0m8jzF8zRofHgZQ65Da46+hnA5e/sGc3mTcY5VR1AYlCm
UJ/fqGvhHJ2SriRC9LbhMw3klUrWT9tQcIGiBdkqf/3qmJLynlU9shU9B8Lm5G3I
Sa/2wCB5ZSK2ybKOgmz2AA4t/w4LFHtNknTgylltz0YeLI+1LhjSG6cTiRulNT4E
hxhATBsCruiHBktM7mXVtMex7yXPtvJ9SI4Jq0UEOa4rNKyXkgf2/gTErDzay7Dn
eBOx9i4VFqSkAk3SL9X+AnOh5zEzdEcUDI9Hg/c0zUQUrM50AgcEgwzY/S2PFKWk
PKT3P8nRbyhGAnACct548btf+g5+/Yt6DofgVay8fXvHAZgdelmqeRCvTvCiwQIG
pWwe+PLWst9GCOdFEjoUl30RRPXkLPqkEw02a8Fo46288LQQL60Ebx3+r5tqaoPh
wpdYBRPwymrWImZBc+behkAM9xZE6GlDVBX2Hr6M6Dmrmy5DgUYC22EEwq0+RUXX
oBjRkdGNzt+WzKm2s0de
=csF2
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-non-critical-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes
Omap fixes that were considered too intrusive or not critical for the -rc cycle
By Artem Bityutskiy (1) and others
via Tony Lindgren
* tag 'omap-fixes-non-critical-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally
ARM: OMAP2+: INTC: fix Kconfig option for TI81XX
ARM: OMAP2+: remove incorrect irq_chip ack field
ARM: OMAP4: Adding ID for OMAP4460 ES1.1
ARM: OMAP4: panda: add statics to remove warnings
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
ARM: OMAP: fix trivial warnings for dspbridge
ARM: OMAP4: hsmmc: check for null pointer
ARM: OMAP1: fix compilation issue in board-sx1.c
By H Hartley Sweeten (2) and Ryan Mallon (1)
via Ryan Mallon
* tag 'ep93xx-cleanup-for-3.5' of git://github.com/RyanMallon/linux-ep93xx:
arm: ep93xx: use gpio_led_register_device
Fix build breakage in ep93xx-core
arm: ep93xx: use DEFINE_RES_* macros
No need to have an OMAP prefix on these SoCs that are in the family
but arent' really called OMAP.
Simple rename: CONFIG_SOC_OMAPAM33XX --> CONFIG_SOC_AM33XX
No functional change.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
[tony@atomide.com: updated for the driver config change also]
Signed-off-by: Tony Lindgren <tony@atomide.com>
No need to have an OMAP prefix on these SoCs that are in the family
but arent' really called OMAP.
Simple rename: CONFIG_SOC_OMAPTI81XX --> CONFIG_SOC_TI81XX
No functional change.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since hwmod framework now manages sysconfig context save/restore
there is no more need to touch this register in driver. Hence,
remove restore of sysconfig register in omap_timer_restore_context.
This was causing incorrect context restore of sysconfig register.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently cpu_is_omap3517() actually detects any device in the AM35x
family (3517 and no-SGX version 3505.) To make it more clear what is
being detected, convert the names from 3517 to AM35xx.
This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517().
In order to avoid cross-tree dependencies with clock-tree changes,
cpu_is_omap3517() is left until the clock changes are merged,
at which point cpu_is_omap3517() will be completely removed.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[tony@atomide.com: change to use soc_is_omap instead]
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are several checks for AM35x devices done using
if (cpu_is_omap3517() || cpu_is_omap3505())
However, since the 3505 is just a 3517 without an SGX, the 3505 check
is redundant because cpu_is_omap3517() will always be true whenever
cpu_is_omap3505() is true. From <plat/cpu.h>:
#define cpu_is_omap3505() (cpu_is_omap3517() && !omap3_has_sgx())
Therefore, remove the redunant 3505 checks. This helps move towards
removal of SoC detection that depends on specific IP detection.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We setup identity MMU mappings across the entire 4GB of space, which
are permissionless because the domain is set to manager.
This unfortunately allows ARMv6 and later CPUs to speculatively
prefetch from the entire address space, which can cause undesirable
side effects if those regions contain devices.
As we setup the mappings with read/write permission, we can switch
the domain to client mode, and then use the XN bit for ARMv6 and
above to control speculative prefetch to non-RAM areas.
Reported-by: R Sricharan <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This pull request updates the DaVinci SoC support to implement DEBUG_LL port
choice and optimizes the DMA ISR by removing unnecessary register reads.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJPqq+jAAoJEGFBu2jqvgRNs1MP/R1z0/h7nrN26aspSS9kxIJr
M8HpG+qSmfLg+h6RSpQYY8SoMJ5mN7vA1AJQr9M2zUZXDYMy+AXYXdlJ2Q9p5ene
A3Iz4yTfHgosrj9fd6fY7vH/Bd9v2T7H366SKPdk0gsSufzkSzEHvVkIROGLIQF2
2kKgBdp94Vdgi+9nimePePIE5EyLxsMW3BNcFLVNkcdfZTFGlbtSav5zT4OCJoIm
d/WI1Xh34nvzkHZptLqUwPF0u62YTcGY+Z6n6KhYk6mSJ2JHWfycwGOf7V9CFVkZ
k7wdSaGfZbPrGQbKjK66Oahq+RN5kIklVB/GIyF5ZectxX+E+Mr8XLO8wKtCMxnf
SvB9jy/LBIqPQlzodEy2FWryzh5gRB/KnDC3sYonpm81scYLEr9T1sw1k4yzR0cS
ZgV2WfaqgfY9HoHzhoxwNB7hCo7VVHGL3r6BsB/30NUk8rnN/SGcDHdu5cTPT7gW
qFfz4uGRC40kvUm2gq3yJh95r3iAnKmawFGjqhBSSMjHcPEVhEgsa913uSclR99w
uKDWqsbhJN7h+W3nLPU7H4qq1PA+d3UGm7eWI8FBXxwf7qng00XJINBAssfxVRvJ
xR0jC7/VeVypcvICPiKdDt2wxl80ptTF80461P0ieXKZsu/PXltLJXd+m7U/gq1u
mhkE90gNGeSH7EsKC2A2
=/we3
-----END PGP SIGNATURE-----
Merge tag 'v3.5-soc' of git://gitorious.org/linux-davinci/linux-davinci into next/drivers
DaVinci SoC updates for v3.5
This pull request updates the DaVinci SoC support to implement DEBUG_LL port
choice and optimizes the DMA ISR by removing unnecessary register reads.
* tag 'v3.5-soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: optimize the DMA ISR
ARM: davinci: implement DEBUG_LL port choice
+ sync with Linux 3.4-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request:
1) improves code readability by using for_each_set_bit_from in DMA driver.
2) fixes incorrect bit position being used in power domain switching code
3) fixes not marking some variables as const when they could be const
4) fixes section mismatch warning in da850 evm code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJPqqueAAoJEGFBu2jqvgRNt2EP/jhzciusIieAnSOcHz91phdV
M3aquG82xACNg/fiEcqr+MrUEKku7XeXOrm8zgo9CYQgnQYfgZHYKVY6LXerK4M2
10YseQ+DJUtVff25SFIpft4saZcG8RGSnkQRJWQ15CwXfcMR8SdlXoKUCLmC1pFG
A/WZjz6cK4gPorgY4sv576sIWTRzG8pwO25C9mj1wq/572G9p0WQ3uoC8JL2Ux91
60fN+/HnE/2x5JpK4nXfLRpFo52t3k/lIhYKP+meEla+ctWhN9w29NEXEqJrBRf7
9dNl8mshIuT9EdMJcAEM8hxuKdX19jTHQAHVC6jhRjg3OVftKluyRKH/wcfZP87l
cduxqr9O7CCTjBYfw6bds8Q9gFQNkbxYfl+efaxI6LxkEV4nTMTCtm68TNyiJfgw
R1aKQWn4EnBUVfD4kkCmCXSNZNAnGYWZ7n/tf0429zjVvQv9pAsoGznkcRczERkd
L7BZj23g/MXgrfMaM+ivM43TTJBYKt+wdDm2YplBJbwhG8PNgvddQWA/nCTRfm9F
Hbq90UnaW7bOL12tXdVfsarCs2tEThmOlJ6Bb+S2Pu1wBNar5Ofwfl+y054RmBpy
OKlwdikvAO3kQyly7tMUXMzEHb+lFUcbnaqZCv/TkMbyb+0PeuHmpUedkxjq41BR
Myov6JbS0DpU4pXkollC
=v+Og
-----END PGP SIGNATURE-----
Merge tag 'v3.5-fixes-and-cleanups' of git://gitorious.org/linux-davinci/linux-davinci into next/fixes
DaVinci fixes and cleanups for v3.5
This pull request:
1) improves code readability by using for_each_set_bit_from in DMA driver.
2) fixes incorrect bit position being used in power domain switching code
3) fixes not marking some variables as const when they could be const
4) fixes section mismatch warning in da850 evm code
By Uwe Kleine-König (2) and others
via Sekhar Nori
* tag 'v3.5-fixes-and-cleanups' of git://gitorious.org/linux-davinci/linux-davinci:
arm: davinci: use for_each_set_bit_from
ARM: davinci: da850-evm: fix section mismatch
ARM: davinci: mark spi_board_info arguments as const
ARM: davinci: fix incorrect pdctl next bit position
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren
via Stephen Warren
* 'for-3.5/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: update defconfig
By Stephen Warren
via Stephen Warren
* 'for-3.5/debug' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: uncompress.h: Implement TEGRA_DEBUG_UART_AUTO_ODMDATA
By Stephen Warren (5) and Peter De Schrijver (1)
via Stephen Warren
* 'for-3.5/tegra30-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra cardhu: basic audio support
ARM: dt: tegra30.dtsi: Add audio-related nodes
ARM: tegra: add AUXDATA required for audio
ARM: tegra: set up audio clocks for tegra30 dt
ARM: tegra: Initialize pll_p_out1
ARM: tegra: provide clock aliases for AHUB configlink
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren (30) and others
via Stephen Warren
* 'for-3.5/usb-ulpi' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (7 commits)
ARM: dt: tegra: pinmux changes for USB ULPI
ARM: tegra: add USB ULPI PHY reset GPIO to device tree
ARM: tegra: don't hard-code USB ULPI PHY reset_gpio
ARM: tegra: change pll_p_out4's rate to 24MHz
ARM: tegra: fix pclk rate
ARM: tegra: reparent sclk to pll_c_out1
ARM: tegra: Add pllc clock init table
+ depends/pinctrl/mergebase branch
Pinctrl mergebase has a conflict in drivers/pinctrl/core.c that was resolved.
Signed-off-by: Olof Johansson <olof@lixom.net>
By Arnd Bergmann (1) and Danny Kukawka (1)
via Stephen Warren
* 'for-3.5/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: do not hide dma declarations
ARM: tegra: fix multiple asm/hardware/gic.h inclusion
Signed-off-by: Olof Johansson <olof@lixom.net>
By Stephen Warren
via Stephen Warren
* 'for-3.5/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for ARCH_TEGRA
ARM: tegra: add pll_x freq table entry for 750MHz
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit adds a cosmetic change to the s3c-hsotg UDC driver.
It moves s3c-hsotg.h to other linux/ related inclusions.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This allows us to pass dma request lines in platform data to
MMC driver the same way as we already do for omap2430 and later.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This hardware exists only on 2430 and later omaps, so there's no
need to have it in plat-omap/devices.c.
Note that we don't have any users for exported omap_dsp_get_mempool_base(),
so we can make it static.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This hardware exists on omap1 only and there's no need to keep it
in plat-omap/devices.c. No functional changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The comments in omap1_init_devices() ask to keep the devices in
alphabetical order. Only omap_init_audio() is not following this,
so let's move it. No functional changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
These supplies going to be needed for the twl6040 driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These supplies going to be needed for the twl6040 driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
V1V8 supply from twl6030 commonly used as VIO for the machine.
V2V1 is adviced to supply the twl6040, and also to feed the twl6030's
VCXIO_IN, and VDAC_IN inputs.
Create the common regulator configurations for these regulators:
Make the V2V1 as supply_regulator for VCXIO, VDAC.
Add twl6040 (1-004b) as consumer for V1V8, and V2V1.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated for the pm regulator changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
On Beagleboard-xM (all revisions) only MMC1_DAT0-MMC1_DAT3 are wired up.
Tested on Beagleboard-xM Rev C1 and Beagleboard Rev B4.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the OMAP3 MUSB OTG controller to the LogicPD
OMAP3530 SOM-LV[1] and Torpedo[2] DevKits
[1] - www.logicpd.com/products/system-on-modules/omap35x-som-lv/
[2] - www.logicpd.com/products/system-on-modules/omap35x-torpedo-som/
Signed-off-by: Ashwin Bihari <ashwin.bihari@logicpd.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the required am35xx_emac_init() call to the craneboard init
function.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform device registratation for HDMI audio codec. This is to
be able to transmit audio through the HDMI output featured in Pandaboard
and PandaboardES boards.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform device registratation for HDMI audio codec. This is to
be able to transmit audio through the HDMI output featured in SDP4430
and Blaze boards.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform registration for the devices HDMI audio support. The
omap-hdmi-audio-dai platform device is to be used by the ASoC HDMI
CPU DAI driver. The omap-hdmi-audio platform device is to be used
by the ASoC HDMI machine driver that links together the ASOC CPU DAI,
ASoC plaform and ASoC codec drivers.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
IGEP-based boards can have two different flash memories, a OneNAND or
a NAND device. The boot configuration pins (sys_boot) are used to
specify which memory is available.
Also, this patch removes unnecesary code for registering the OneNAND.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
[tony@atomide.com: fixed up a minor checkpatch warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
board_onenand_init() and board_nand_init() initialization functions are
used to initialize OneNAND and NAND memories respectively. But only
board_nand_init() was visible to be used from board code. This patch makes
possible to initialize a OneNAND flash memory within platform code.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the power off feature of the TPS65930 on-board PMIC.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The "uim" deamon requires sysfs entries that are filled in using
this platform data.
Signed-off-by: Mircea Gherzan <mgherzan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
HIGMEM support in kernel is quite mature now and we have boards
like ZOOM, PANDA, SDP where 1 GB memories are installed. With
HIGHMEM disabled not all of the 1GB of RAM (only ~700MB) can be
accessed. Hence, enable HIGMEM to make use of the entire memory.
On the boards which doesn't have more than 768 MB memory, all
the memory is directly mapped in "lowmem" and highmem isn't
exercised. Hence, there should be no impact by enabling HIGHMEM
for boards that do not need it.
Tested on OMAP4460 Panda-ES.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Boards like beagle and panda use ehci based smsc95xx lan chips
one has to manually enable these supports to get nfs working
on these boards. So keep these support enable by default.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Things have slowed down a lot for us, but we have five more fixes for
omap and kirkwood below. Three are for boards setup issues, two are
SoC-level fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPqpiAAAoJEIwa5zzehBx36WcP/A3yfgwccYQPAGiazDWMoxj+
bLdr49L4tgFf8dwRno+IeAKjhhBDYUJgNoz46Tnqfh1L7ImIvGUlPDtqfQGb5+HK
HZ+mz46ZUoJPdvBS8CY7Xf5lP/5iiMI+wBeE33bu+EyKhgbD8wYmQDCsJJhjjRLW
TqR/a74Mz/yX9sCL5pZ/ktKhxV/FvBMT3pqpU8Eb50hDtStTouf25EmyLv0iVmJx
45pwG3+nx6R+/Lu2rwCroKUTl/cNR95L9+EGMzb99aZXSsGS5zmiAEQ2TNcp0lxb
JMR3bB9zTDWmY1VZ83os2NI1GDOj1Zdvqns/iiBRKLUBvFN447tMdRvZMomvM3VQ
whiKd5R0aFa42KROZq7V+t540FeLqgDvHY4zeOPDRGrh1Y9ElgCJnciX4Hxm779n
KH9VlnHrUW3tNHqlLKXTJ1tuvNSbNUE2FtG/m+oJLyUyH4CJzNi1R1rofZEEHEH/
8zeJzw6amwpSWyLEi1HjyhFOJ8WqOnY17LMWilQeeYbqHGwXGKTOmm9P8PKPk4cx
dFlwCeJgd7VL+L5rn8LVOjvov7j1iakKZhtSjLMjF4k088MejDVOfTj21Qs5MiHI
nl03BOvtmwEGXUbYHKromzeHMvoXXWuQyK13cWmgBXAiAGgX76mNU9GukwXU3rqm
TGrRTsiuGzYQn9w3EVFL
=GX6x
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson:
"Things have slowed down a lot for us, but we have five more fixes for
omap and kirkwood below. Three are for boards setup issues, two are
SoC-level fixes."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: igep0020: fix smsc911x dummy regulator id
ARM: orion5x: Fix GPIO enable bits for MPP9
ARM: kirkwood: add missing kexec.h include
ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
ARM: OMAP1: Amstrad Delta: Fix wrong IRQ base in FIQ handler
The supply is connected to the DSS DO-D5 pins and is thus needed for
both serial and parallel display interfaces on the igep0030 as well as
the igep0020.
If the igep0030 module isn't connected to a display, no DSI or DPI
display will be specified in board code, and the DSS driver won't enable
to VPLL2 regulator anyway.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The INTC core is using a Kconfig option for TI816x which doesn't
exist. Convert it to use TI81XX.
Cc: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Each irq_chip for the main interrupt controller has offsets set for irq
masking registers, which added to respective base results in a pointer
to appropriate hardware register. However this is not correct for
INTC_CONTROL as there is only one INTC_CONTROL register. This does not
cause problems because generic ack code is never called, but remove
this assignment to avoid confusion.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add statics to board-omap4-panda.c's internal functions and data
structures to remove sparse warnings:
arch/arm/mach-omap2/board-omap4panda.c:234:29: warning: symbol
'omap_panda_wlan_data' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:441:24: warning: symbol
'omap4_panda_dvi_device' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:451:12: warning: symbol
'omap4_panda_dvi_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:512:13: warning: symbol
'omap4_panda_display_init' was not declared. Should it be static?
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.
Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Henry Chan <enli.chan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/devices.c: In function 'omap_dsp_reserve_sdram_memblock':
arch/arm/plat-omap/devices.c:170: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c: In function 'omap_dsp_init':
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'phys_addr_t'
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Depending on the bootloader, passing command-line arguments
with spaces may have issues. Some bootloaders doesn't seem
to pass along the quotes, passing only 'gp' part of the string,
which leads to wrong override configuration.
The only affected kernel parameter configuration for OMAP family
is "clocksource=", used to override kernel clocksource.
So this patch changes "gp timer" => "gp_timer", for clockevent,
clocksource and timer irq_handler.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP1, omap_32k_timer_init() function always returns "true",
irrespective of whether error occurred while initializing 32k sync
counter as a kernel clocksource or not and execution will never
fallback to mpu_timer clocksource init code.
This patch adds check for return value from function
omap_init_clocksource_32k(), and fallback to omap_mpu_timer_init()
in case of failure/error from omap_init_clocksource_32k().
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
fix for a longstanding watchdog timer integration problem.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqbWnAAoJEMePsQ0LvSpL+3AQAKUZP/qLl1l9duwBL8Cm9MLf
bzgCmdlHJeYlfqNJddK7qx8h/D00944Y8hbm4p/GIXTjAi6uZpW0Y0hWSTuDQNgJ
3WEP/tTTAGZDISqjTPKhp0mSQ3KCztoWKwhDmFrkQMSocDk7nGBRX1tx5ayAfmV4
OXVCAlNdo2hYzH+HSKBQZ0/z7PMv3kH+5gYEso3H36asb93V1R3KaEkrcpxhVgGZ
ViXUufWjGngR2bdNQfn621Pk38CvR+q+K0kG1QUAXnWTHxaXLgPLEJKutPVDbmme
IcViyTc59/je7kotFKbG+Hpt61ovcXk8s0UjYmEby9n8rBTxfEAbnXwMe6vSgQKN
hDN8VdMBOfxq7BjH69ylMUrUGy5juz0EWQ/tEZ3ARGKWX3KXtm2sP8lZ4hLJiGK+
MmaAjmGBkUsJ9Cj6fOFzzfbCnbxFSj64rq9YECdSYbmPJOLLPvpN1j61JToes2AZ
qdiukhgG4JFc+l/7DUObyhaY+411TLsmMEpvDS300vgq7h1CGOSBtMq+UfRUxx/J
qw/DZFEm5PWRcJTaQOVeA40iWgfhDCSd+q53Gq66SZLsdHZjs3vcdwwHZJ8OzQfK
WzWiqICNosS8Alm23suwSsIyw2xmtG3ZU6LyeUGT3AggIaqB5eOMbZTSMbhJHNV2
4cWmM2mRdb2KUaBpwuH/
=gBFx
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-c-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-hwmod-data
Some OMAP IP block data additions for 3.5, along with a
fix for a longstanding watchdog timer integration problem.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqowwAAoJEBvUPslcq6VzDPQP/1LBOfJb6OMdK+lfDA49tMtU
q/Qzq5GvgKA7+Opb3n5TVpnXh1cT7tSrvDtYI/ol8KaCVkLLoxdIO1dJekPyX81H
+W4JoUYOLDAKfJ7FP44K7MJu/TsXsQ22Hyv6hYKw9lfm9rzIQwp/ofD08g9HDubc
j6BbrIH/mBEIheJPor1Iz1j+A50EImKpkixrfD9ttJfJkwu3FmzDp+KvLNhzDX7H
VCCYatJIkJPXEqIwaVjOyAqSvU3ZHFLxkFVjzRwkLpd2bNA1KX/FjOzv4lrK4jf3
A2eEce/YSPrNn8KhM+mB/UKLLJ3ifgUvDS6IsvVkxwsPUyGpEwFL1KBEiAlVfApq
WWxC/WZcZgHlXs4WRH/FS5ERLuPhaom+YkSs8bZRqAGxtA8RO1E6yNG6fzlp84/B
LFxKa7TXEMCmSoRye6rZ4gmndCQ+8q0OQv1M89aHvn/iv7arS8XtWLGzp01qAQzQ
OX8CCRxiRxJd9g3nCLhGq77UTI89ZiP86562Df50Akc2SYPCrw2hPR1rYjzU1TCl
2nVQsDhSJDcGTuIVClTUmbUMM34RJQxlxAgxBJkDPshNjXiV0qMzYe+U1t4HjArE
IBfshxY0qL6x8y2cdoeDkSpSyhjbeHZqPHYJ/nGFCkTNCQF1+c6o3NqYmdtd+bsF
bAF1qF3FGhjXubgzpOzM
=k8QU
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-for-v3.4-rc6-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fix two board spefific regressions and one regression caused by bad documentation
By Archit Taneja (1) and others
via Tony Lindgren
* tag 'omap-fixes-for-v3.4-rc6-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: igep0020: fix smsc911x dummy regulator id
ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
ARM: OMAP1: Amstrad Delta: Fix wrong IRQ base in FIQ handler
id 0 is already used and causes errors at boot:
WARNING: at fs/sysfs/dir.c:508 sysfs_add_one+0x9c/0xac()
sysfs: cannot create duplicate filename '/devices/platform/reg-fixed-voltage.0'
Fix it by using the next available one (id=1).
This was caused by 5b3689f4 (ARM: OMAP2+: smsc911x: Add fixed
board regulators) that did not account for some regulators
already being used.
Signed-off-by: Enrico Butera <ebutera@users.berlios.de>
[tony@atomide.com: updated comments for regression causing commit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
We always need to pass the last sample period to
perf_sample_data_init(), otherwise the event distribution will be
wrong. Thus, modifiyng the function interface with the required period
as argument. So basically a pattern like this:
perf_sample_data_init(&data, ~0ULL);
data.period = event->hw.last_period;
will now be like that:
perf_sample_data_init(&data, ~0ULL, event->hw.last_period);
Avoids unininitialized data.period and simplifies code.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-3-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Use for_each_set_bit_from to iterate over all the set bit in a memory
region.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Kevin Hilman <khilman@ti.com>
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The ISR does quiete a lot of hw access which could be avoided. First it
checks for a pending interrupt by reading alteast one register. Then it
checks for the "activated" slots by reading another register. This is
more or a less a must.
Now, once it found an active slot it does the same two reads again.
After that it "knows" that there must be a pending transfer however it
cross checks with the other register. There are 32 bit in an interger
which are polled instead of considering only the set bits and ignoring
those which are zero. This performs atleast 32 reads which could be
avoided. In case of a first match it does another read.
This patch reorganizes the access by re-using the register which have
been read and then uses ffs() to find the matching slot instead looping
over it. By doing this we get rid of the last (32 + 2 + hits) reads.
It is possible however that by really busy bank0 we never get to handle
bank1. If this is a problem, we could try to handle bank1 after we are
done with bank0 to check if there are any outstanding transfers.
To put some numbers on this, this is from spi transfer via spidev. The
first column is the number of total transfers, the time stamp is taken
before and after the ioctl():
|10000, min: 542us avg: 591us
|20000, min: 542us avg: 592us
|30000, min: 542us avg: 592us
|40000, min: 542us avg: 585us
|50000, min: 542us avg: 593us
The same test case with the patch applied
|10000, min: 444us avg: 493us
|20000, min: 444us avg: 491us
|30000, min: 444us avg: 489us
|40000, min: 444us avg: 491us
|50000, min: 444us avg: 492us
that is almost 100us that just went away.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Apart from the necessity to do this change for multi-platform kernels
the previous logic depended on the zImage decompressor to write the
physical and virtual address to a magic memory location.
If the decompressor is unused or not correctly configured for the
current machid, the addruart macro was an infinite loop. Moreover
debugging the early zImage code was not possible either.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[nsekhar@ti.com: add braces in _DEBUG_LL_ENTRY() macro to fix checkpatch
error. Fix debug port choice config dependency for traditional DaVincis.
Modify debug port config names and add help text.]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
By Paul Parsons (5) and others
via Haojian Zhuang
* 'board-specific' of git://github.com/hzhuang1/linux:
pcmcia: add driver for hx4700
ARM: pxa: Add standard UART to hx4700_pin_config[]
ARM: mmp: add usb host support for aspen
ARM: mmp: add usb host support for PXA168
ARM: mmp: add usb device support for ttc dkb
ARM: mmp: add usb device support for PXA910
ARM: pxa: hx4700: Add PCMCIA/CF support
ARM: pxa: hx4700: Enable ASIC3 GPIO as a wakeup source
ARM: pxa: hx4700: Initialize DS1WM clock_rate
ARM: pxa: mioa701 add camera output enable gpio
ARM: pxa: use ioremap to access CPLD
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.18 (GNU/Linux)
iQEcBAABAgAGBQJPpvY9AAoJEHm+PkMAQRiGpEoIAJgbu+Y8gITnBK/wh9O6zy3S
5jie5KK4YWdbJsvO58WbNr3CyVIwGIqQ2dUZLiU59aBVLarlGw8xor0MmW+cZwhp
6fBHaf0qDYAV0MZjD+mnnExOiCRyISa2lPmsfu9dAWywh5KGe6/oAP6/qcXIyok3
KZyl3qQf4ENpaZPHwZPXCEkUvtuyHgNiszN+QXEadA3s19Ot4VGe9A3VGw+GNrSm
JqFIq3acQAbKa5BYaqf7TQC02v2FI7//eqt6QHxTqbE6a7LGbTvLfX3HlJ2mnfqa
1R6QHhM4y4OZDHbaMT2raHZ8WuLXzhehJzhP8Co7AHFOKwVKOb5XbcUr2RrukMU=
=HkMd
-----END PGP SIGNATURE-----
Merge tag 'v3.4-rc6' into next/cleanup
Linux 3.4-rc6
Resolve conflict where an u5500 file had a bugfix go in, but was
deleted in the branch staged for next merge window.
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqEK+AAoJEBvUPslcq6VzXKcP/03HGFNdBiO+V4QaaSY1YBJN
DYZriahwtu2fwBGeo/y72Ol/ZShmiFWf7EKdn9HpvakoLL848rmiIB/6D1vk0MUb
ywI+/ZIiiqpzaErPLmtGRNreNNJhnYSt7DhHmNQOOq+1uR5TsMNXF9IuRe6By+sv
Kr1aiLMYK1UYkBTDg3wibctcMMF/f01/tJHnGTcOlqbF/pLlh8Q2QUQJ08QfLAdE
ceAi6Vo7j2gnQ5rpNYdxa2T5iMiyJXLSazbrIpOx97Q6eWUZNaJdu5SQWbvcwBG2
MnErRbOPNixY43ht1FqBK7Idm9goNLeWjU6PM6iuVxfO9Q5JiL2+6gMCwGozFYX/
yuGdPSA430OMtLU2mMGbyRNPrXwnCe+/OGsJpLqqyw7X6mZisfhF6J+06BeIEk5N
XI/3EH3TgientoCNYFunGBGwd/stRSqV8jjaX/TV7858ZQM2xtZp38zAK1E9wvDk
D8HOGH77Tu7xXoWDL3G2kAX2gL/khqvrcUAJGFseuUmeyoEmHM/yhKlFy30Bl+MQ
yRmqCghfisHsLTWKJGRLE3/tMg0M4PAaKo3IiE9LVlsg9tPJBE4hxKepi3WSNeUW
qlzoiIMzpqSxkk1kPXnvfDdwWQMsrXvDEeaDO/aYuUFMEDNWbNN6Fvr8YJae7NCr
cRRcnFFoebiyqamUybQo
=qEmC
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-hwmod-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Clean up of hwmod to shrink down the IP block interconnections
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-hwmod-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
ARM: OMAP2xxx: hwmod data: start to fix the IVA1, IVA2 and DSP
ARM: OMAP3: hwmod data: add IVA hard reset lines, main clock, clockdomain
ARM: OMAP3: hwmod data: fix IVA interface clock
ARM: OMAP2xxx: hwmod data: share common interface data
ARM: OMAP2xxx: hwmod data: share common hwmods between OMAP2420 and OMAP2430
ARM: OMAP2+: hwmod data: remove forward declarations, reorganize
ARM: OMAP: hwmod: remove code support for direct hwmod registration
ARM: OMAP2+: hwmod data: convert to link registration
ARM: OMAP2+: hwmod: add support for link registration
ARM: OMAP2+: hwmod: consolidate finding the MPU port index and storing it
ARM: OMAP2+: hwmod: add function to iterate over struct omap_hwmod_ocp_if
ARM: OMAP2+: hwmod: add _find_mpu_rt_port()
ARM: OMAP2+: hwmod: extend OCP_* register offsets from 16 to 32 bits
ARM: OMAP4: hwmod data: uncomment some "excluded" hwmods
ARM: OMAP4: hwmod data: add OCP_USER_DSP; mark omap44xx_dsp__iva appropriately
ARM: OMAP4: hwmod data: remove bandgap hwmod
ARM: OMAP3: hwmod data: GPTIMER12 is attached to a separate interconnect
ARM: OMAP3: hwmod data: add DSS->L3 interconnect for 3430ES1
ARM: OMAP3: hwmod data: fix interfaces for the MMC hwmods
ARM: OMAP2/3: hwmod data: update old names
...
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqEJlAAoJEBvUPslcq6Vz8oYP/RuLK0emKF0efxZxIyIm/Vi8
XJteTnxbptFhCm8tnBoQq0F68eJuvxJKa60tmqjiODFfBXpZZLZewsByogo5cbq3
dUCxXJbCQWGOwvTrhf2k31S+Bysp/fG+CHlOZgfHWq6XQYvZxUZUsyCCxZC/5h+k
9df3t2Kjm7wtcOHWTqmoLI5xZM+XbUUQdCdOjiShpiF2+lu22U3g6xj5k0ryJEOH
YQRU35zNSaI+g1jEe7alyTGGMVE3WMm4dDin62RhRVoFRm/JxiP+8S0BuOQBI8IS
vY46mvKG5baw2v6VKFh3O8sXDAZ8ZMWV9Hc/9WEHf2aQljB0J+he2alsC4FC0BsX
R467DZj4jwh0KuN/N2OiDr8/rufMkc4CMYneEAfPdZoOaa5f5OplL5YPKPmi4LVB
sYNbvJKwrDS/aRY4iBjdxDnQyZ89chYYQWV+43Fsq/ffp0LJPqZYPKwIbtGcIa4E
KoMARTQyY1PN8l3NhcqPwmK2Xa5RjwO+an8arPPY9H7BLCpzt8/HINc3sz3wZiUQ
SjrTYwqsT6eHD2A9ciwQiaFNKie/rYj6zaZ5212RXjX/Nl0RyQz2W1vIbzZ/c776
zsoTwzvjHy5O9UuqT/HUjaxLQOctWFZT5+5HMqCixcjH9sCWjsnq+h8DCjicFvWX
q1ajdKcZM/29soH3r2VL
=MQ+t
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-sparse-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Sparse and cppcheck warning fixes
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-sparse-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: clean up some cppcheck warnings
ARM: OMAP1: board files: deduplicate and clean some NAND-related code
ARM: OMAP: USB: remove unnecessary sideways include
ARM: OMAP: DMA: use constant array maximum, drop some LCD DMA code
ARM: OMAP: OCM RAM: use memset_io() when clearing SRAM
ARM: OMAP: fix 'using plain integer as NULL pointer' sparse warnings
ARM: OMAP2+: GPMC: resolve type-conversion warning from sparse
ARM: OMAP1: OHCI: use platform_data fn ptr to enable OCPI bus
ARM: OMAP1: OCPI: move to mach-omap1/
ARM: OMAP: add includes for missing prototypes
ARM: OMAP2+: declare file-local functions as static
Signed-off-by: Olof Johansson <olof@lixom.net>
From: Linus Walleij <linus.walleij@linaro.org>:
Four core patches paving the way for device tree enablement
of the Snowball and ux500 at large by Lee Jones.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable PRCMU Timer 4 (clocksource) for Device Tree
ARM: ux500: Disable SMSC911x platform code registration when DT is enabled
ARM: ux500: Fork cpu-db8500 platform_devs for sequential DT enablement
ARM: ux500: Do not attempt to register non-existent i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
"Jean-Christophe PLAGNIOL-VILLARD" <plagnioj@jcrosoft.com> writes:
ARM: AT91 more DT material
New SoC conversion and boards support
SoC convertion to DT:
- at91sam9260
- at91sam9263
boards:
- Atmel at91sam9g20ek/9263ek
- Calao TNY-A9260/A9263/A9G20
- Calao USB-A9260/A9263
- Ethernnut 5
- Kizbox
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91: (32 commits)
Ethernut 5 board support
ARM: at91: add kizbox board dt support.
ARM: at91: DT: add Calao TNY A9263 board support
ARM: at91: DT: add Calao USB A9263 board support
ARM: at91: add at91sam9263ek DT support
ARM: at91: add at91sam9263 DT support
ARM: at91: standard device init only if DT is not populated.
ARM: at91: DT: add Calao USB A9260 DT support
ARM: at91: Calao USB A926x factorize common binding in usb_a9260_common
ARM: at91: USB A926x update nand partition
ARM: at91: add at91sam9g20ek boards dt support
arm: at91: add Calao TNY-A9260 and TNY-A9G20 board support
ARM: at91: add at91sam9260 DT support
ARM: at91: add defconfig for device tree
ARM: at91/dt: do not specify the board any more
ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
ARM: at91: pm select memory controler at runtime
ARM: at91: move at91_init_leds to board init
ARM: at91: do not pin mux the UARTs in init_early
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Walleij <linus.walleij@linaro.org> writes:
this pull request contains some device tree work by Lee Jones.
I have tried to keep these patches in the arch/arm/boot/dts/*
space to get some sanity in the branch proliferation.
There is still one patch that touches arch/arm/mach-ux500 too
though (but it should merge fine with the other ux500 stuff).
The changes to the device tree are of course dependent on some
core changes and some patching in the GPIO/pin driver, but as
the device tree files are believed to be a different world
(and should one day live in their own git) I split this off
anyway. I don't think people bisect the device trees per se
and the board code in conjunction anyway.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Configure the PRCMU Timer for db8500 based devices in DT
ARM: ux500: Enable the SMSC9115 on Snowball via Device Tree
drivers/gpio: represent gpio-nomadik as an IRQ controller in DT documentation
ARM: ux500: Rename gpio_keys in the Device Tree file
drivers/gpio: gpio-nomadik: Provide documentation for Device Tree bindings
drivers/gpio: gpio-nomadik: Device Tree bindings
ARM: ux500: Enable the external bus with Device Tree
ARM: ux500: Shorten Snowball's DT compatible gpio entry
ARM: ux500: Rename the DT compatible entry for i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
* spear/dt:
ARM: SPEAr3xx: Correct keyboard data passed from DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Roland Stigge <stigge@antcom.de> writes:
this is a rearrangement of all mach-lpc32xx specific patches for device
tree conversion. Please note that:
* It builds upon the i2c-pnx changes (see previous pull request, branch
lpc32xx/i2c)
* Dave Miller gave permission to merge the lpc_eth.c change via arm-soc
(patch 1/8)
The rest of the patches is mach-lpc32xx only.
* 'lpc32xx/dt' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Defconfig update
ARM: LPC32xx: Move common code to common.c
ARM: LPC32xx: Device tree support
ARM: LPC32xx: DTS files for device tree conversion
ARM: LPC32xx: Remove obsolete platform Kconfig
ARM: LPC32xx: clock.c registration adjustment
ARM: LPC32xx: clock.c cleanup
net: Add device tree support to LPC32xx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
As a prerequisite for merging the lpc32xx DT changes, this
pulls in the depends/i2c/lpc32xx branch that contains
changes to the pnx-i2c driver, which are already in the
i2c tree. The branch is available also on
git://git.antcom.de/linux-2.6.git lpc32xx/i2c
Roland Stigge <stigge@antcom.de> writes:
this is the series of the 4 patches adding device tree support to i2c-pnx
(used by LPC32xx) that Wolfram Sang already applied to the i2c subsystem.
Since both drivers/i2c/ and mach-lpc32xx are touched here, there will
probably be conflicts that you need to be aware of.
I'm posting this again for arm-soc since the actual mach-lpc32xx specific
DT conversion builds upon those changes (see next pull request), especially
in arch/arm/mach-lpc32xx/common.c.
Wolfram already gave permission to merge this via arm-soc, but please
coordinate and tell me if I can help resolving this.
Further, this implicitly updates the next/dt branch to v3.4-rc4, which
causes a trivial conflict from a change in one branch in code that
gets removed in another.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a rebased version of parts of
git://git.stlinux.com/spear/linux-2.6.git spear-v3.5
which was accidentally based on the linux-next tree and mixed too
many different things. The pinctrl related changes from the same
branch are now in the spear/pinctrl branch of arm-soc.
There are a few non-DT cleanups mixed in here, but fundamentally
it's all related to the DT conversion.
* spear/dt: (9 commits)
ARM: spear: remove most mach/*.h header contents
SPEAr: Update defconfigs
SPEAr: Add PL080 DMA support for 3xx and 6xx
ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
SPEAr3xx: Replace printk() with pr_*()
SPEAr6xx: Add compilation support for dtbs using 'make dtbs'
SPEAr3xx: Add clock instance of usb hosts - ehci and ohci 0 and 1
SPEAr: Use CLKDEV_INIT for defining clk_lookups
ARM: SPEAr600: Change FSMC and SMI clock names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
First part of DT changes for the Renesas shmobile platform,
pulled from:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git dt
* renesas/dt:
ARM: mach-shmobile: sh7372 generic board support via DT V2
ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2
ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372
ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H
ARM: mach-shmobile: Introduce shmobile_setup_delay()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
In preparation for device tree, this patch changes how the DSI pins are
configured. The current configuration method is only doable with board
files and the configuration data is OMAP specific.
This patch moves the configuration data to the panel's platform data,
and the data can easily be given via DT in the future. The configuration
data format is also changed to a generic one which should be suitable
for all platforms.
The new format is an array of pin numbers, where the array items start
from clock + and -, then data1 + and -, and so on. For example:
{
0, // pin num for clock lane +
1, // pin num for clock lane -
2, // pin num for data1 lane +
3, // pin num for data1 lane -
...
}
The pin numbers are translated by the DSI driver and used to configure
the hardware appropriately.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
The reset GPIO for Taal panel driver is currently requested in the
4430sdp board file. This patch moves the gpio request/free into the Taal
driver, where it should be.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Now that the tfp410 driver has been renamed in the code, this patch
finishes the renaming by renaming the files.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
The driver for the TFP410 DPI-to-DVI chip was named quite badly as "DVI
panel driver". This patch renames the code to use tfp410 name for the
driver.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Now that the panel-dvi driver handles the PD (power-down) GPIO, we can
remove the custom PD handling from the board files.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This patch also adds the SPDIF baud clock mux and dividers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
platform_device pdev can be NULL if CONFIG_MMC_OMAP_HS is not set.
Add check for NULL pointer. while at it move the duplicated functions
to omap4-common.c
Fixes the following boot crash seen with omap4sdp and omap4panda
when MMC is disabled.
Unable to handle kernel NULL pointer dereference at virtual address 0000008c
pgd = c0004000
[0000008c] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 Not tainted (3.4.0-rc1-05971-ga4dfa82 #4)
PC is at omap_4430sdp_init+0x184/0x410
LR is at device_add+0x1a0/0x664
Signed-off-by: Balaji T K <balajitk@ti.com>
Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SX1 board requirese i2c, so select it in Kconfig, otherwise I have the
following build error:
arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_write_byte':
arch/arm/mach-omap1/board-sx1.c:58:2: error: implicit declaration of function 'i2c_get_adapter' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c:58:7: warning: assignment makes pointer from integer without a cast [enabled by default]
arch/arm/mach-omap1/board-sx1.c:67:2: error: implicit declaration of function 'i2c_transfer' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c:68:2: error: implicit declaration of function 'i2c_put_adapter' [-Werror=implicit-function-declaration]
arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_read_byte':
arch/arm/mach-omap1/board-sx1.c:82:7: warning: assignment makes pointer from integer without a cast [enabled by default]
cc1: some warnings being treated as errors
make[1]: *** [arch/arm/mach-omap1/board-sx1.o] Error 1
make: *** [arch/arm/mach-omap1] Error 2
make: *** Waiting for unfinished jobs....
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If dtb is provided the needed device will be created dynamically.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If dtb is provided the needed device will be created dynamically.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a varient of the basic clk-gate code. This variant calls a
function before gating the clock off. This function is used to disable
the SATA or PCIe PHY.
Now that all the drivers prepare and enable there clk as needed, there
is no need for the common code to keep track of which clocks need
gating on. Let the common clock framework turn off clocks which are
not used.
Buy using the added clk varient, when the clk framework turns off SATA
or PCIe clocks, we also disabled SATA and PCIe PHYs which were not
needed.
The function kirkwood_pcie_id() can now be called outside of __init
code, so remove this property for it, and functions it calls.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Prepare and enable the clocks when the board indicates the pcie buses
will be used.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion platforms can gate the XOR driver clock. If the clock
exisits, unable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion platforms support gating of the clock. If the clock exists
enable/disbale it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some orion devices can gate the SDIO clock. If the clock exists,
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Not all orion platforms can gate the clock, but if it does exist,
enable/disable it as appropriate.
v2: Fix the name of the clkdev entry.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Not all platforms support gating the clock, so it is not an error if
the clock does not exist. However, if it does exist, we should
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The Orion kirkwood chips have a gatable clock per SATA channel. Add
code to get and enable this clk if it exists.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Let the machine pass to the platform which clock is used by the uart.
Enable the clock and use clk_get_rate() to determine its rate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Remove tclk from platform data. This makes the platform data
structure empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The t_clk is moved from the shared part of the ethernet driver into
the per port section. Each port can have its own gated clock, which it
needs to enable/disable, as oppossed to there being one clock shared
by all ports. In practice, only kirkwood supports this at the moment.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Remove now redundant tclk from SPI platform data. This makes the platform
data empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add tclk as a fixed rate clock for all platforms. In addition, on
kirkwood, add a gated clock for most of the clocks which can be gated.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
[mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig]
[mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Without runtime PM enabled, hwmod needs to leave all IP blocks in an
enabled state by default so any driver access to the HW will succeed.
This is accomplished by seting the postsetup_state to enabled for all
hwmods during init when runtime PM is disabled.
Currently, we have a special case for WDT in that its postsetup_state
is always set to disabled. This is done so that the WDT is disabled
and the timer is disarmed at boot in case there is no WDT driver.
This also means that when runtime PM is disabled, if a WDT driver *is*
built in the kernel, the kernel will crash on the first access to the
WDT hardware.
We can't simply leave the WDT module enabled, because the timer is
armed by default after reset. That means that if there is no WDT
driver initialzed or loaded before the timer expires, the kernel will
reboot.
To fix this, a custom reset method is added to the watchdog class of
omap_hwmod. This method will *always* disarm the timer after hwmod
reset. The WDT timer then will only be rearmed when/if the driver is
loaded for the WDT. With the timer disarmed by default, we no longer
need a special-case for the postsetup_state of WDT during init, so it
is removed.
Any platforms wishing to ensure the watchdog remains armed across the
entire boot boot can simply disable the reset-on-init feature of the
watchdog hwmod using omap_hwmod_no_setup_reset().
Tested on 3530/Overo, 4430/Panda.
NOTE: on 4430, the hwmod OCP reset does not seem to rearm the timer as
documented in the TRM (and what happens on OMAP3.) I noticed this
because testing the HWMOD_INIT_NO_RESET feature with no driver loaded,
I expected a reboot part way through the boot, but did not see a
reboot. Adding some debug to read the counter, I verified that right
after OCP softreset, the counter is not firing. After writing the
magic start sequence, the timer starts counting. This means that the
timer disarm sequence added here does not seem to be needed for 4430,
but is technically the correct way to ensure the timer is disarmed, so
it is left in for OMAP4.
Special thanks to Paul Walmsley for helping brainstorm ideas to fix
this problem.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[paul@pwsan.com: updated the omap2_wd_timer_reset() function in the
wake of commit 3c55c1baff ("ARM:
OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset
wait for reset status""); added kerneldoc; rolled in warning fix from Kevin]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Use 'common' as name for the common irq number in hwmod data for the McBSP
ports. The same name already in use for OMAP2430, and OMAP3.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Restore of context is not done for OMAP4. This patch
adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the OMAP4
hwmod data which activates the restore for OMAP4.
Currently the OMAP4 does not hit device off still the
driver may have support for it.
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Wamsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Use 'common' as name for the common irq number in hwmod data for the McBSP
ports. The same name already in use for OMAP2430, and the OMAP4 hwmod data
will be using the same name.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ1W hwmod for all OMAP2xxx devices.
Assume that OMAP2xxx chips have the same HDQ idle handling bug
as OMAP3:
http://www.spinics.net/lists/linux-omap/msg63576.html
and set the OCPIF_SWSUP_IDLE flag accordingly on the HDQ's OCP interface.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ1W hwmod for OMAP34xx, OMAP36xx, and AM3505/3517 devices.
According to the respective TRMs, it doesn't appear to be available for the
816x/814x or the AM335x.
The OCPIF_SWSUP_IDLE flag is added to work around an apparent hardware
bug: the hardware is not taking the CM_FCLKEN*_CORE.EN_HDQ bit into
account when considering whether to go idle:
http://www.spinics.net/lists/linux-omap/msg63576.html
This causes HDQ transfers to fail or become corrupt. Thanks to
NeilBrown for his help diagnosing and testing fixes for this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Tested-by: NeilBrown <neilb@suse.de>
Much of the HDQ1W integration data is common between multiple generations
of OMAP SoCs, so rather than make several copies, we add it once into
files which are compiled for multiple SoCs.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Tested-by: NeilBrown <neilb@suse.de>
Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>
Add MMC for 2420 so we can pass the DMA request lines the same
way as we already do on omap2430 and later.
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to apply on top of the 3.5 hwmod cleanup;
changed mmc hwmod name/class to "msdi" as documented in the 2420 TRM Rev X;
added sysconfig register information; added 16 bit register width flag;
added MSDI custom reset code]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is
ready.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
High-performance Bus (AHB) architecture.
The AHB Arbiter controls AHB bus master arbitration. This effectively
forms a second level of arbitration for access to the memory
controller through the AHB Slave Memory device. The AHB pre-fetch
logic can be configured to enhance performance for devices doing
sequential access. Each AHB master is assigned to either the high or
low priority bin. Both Tegra20/30 have this AHB bus.
Some of configuration params could be passed from DT too if needed.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 554cdaefd1 ('ARM: orion5x: Refactor
mpp code to use common orion platform mpp.') seems to have accidentally
inverted the GPIO valid bits for MPP9 (only). For the mv2120 platform
which uses MPP9 as a GPIO LED device, this results in the error:
[ 12.711476] leds-gpio: probe of leds-gpio failed with error -22
Reported-by: Henry von Tresckow <hvontres@gmail.com>
References: http://bugs.debian.org/667446
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org [v3.0+]
Tested-by: Hans Henry von Tresckow <hvontres@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
powerdomain, PRM, and CM changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqVA5AAoJEMePsQ0LvSpL4QYQALJgM0Qm6i7cmgpECPe+pOOr
WQTxCYZAn8xqZiKBHhveFLpw7qyXmJy1D5QohcBB1Ax5oEY69SLgHC2usUreeJ5L
jP+Za4N5aBWFnU14sacESIK9ahyF8hMS6SxO1iwrjgrMygFcjsqL7lk2B665Wiqn
6OS6kAdAemMoKTCsDFY8R18WiTuGGF5Oo8hEhxs0RzgX9LjG8iDaq19wtvmefo11
U6246BSDh7xrCl5hiiFMQT942oQ5VA3zUQT1ClwPStYGJmwkLwdl3f4yE3vHC0Q/
zNdS2bQM9xSB/GCikWsfbjf8dVO0t3uaqHva0LF/DTQHiMKptm2f+NWAjdZCDlYz
FbE3SRkX86Rr6P+sw69ztpRroKMbn8WNfP48fXbMEtiegpqjRc5wkGr4cIcl8yMg
TyBdF/o5QJgxoF4hFw5BQBrBvpL5+ralqrHA7A4zeCNhkPtnaXSzd1OHgqMawFmk
otEg66W13h+bOnNLmSbWhWyVmYwsD30BjmNLyOTXa16aTjo+X4johuVGlZMKWyD6
nQMdwnxdSmNMQ8z1Qczc4JzT/ixjfeEXmQUNZLmhkMK5cHRw6TYj9eEbvMk7Xh73
XCK38RCb86ECqn1A3qEWo6TV8CDdhhh/XwoHAzCfdkRdqe3d5cT5cC2vy/VmRrf1
8Il2JKJYveKPH+vc9rEE
=Q4kv
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-prcm
Some OMAP PRCM updates for 3.5. Includes some clock, clockdomain,
powerdomain, PRM, and CM changes.
Fixes the following build error when CONFIG_KEXEC is enabled:
CC arch/arm/mach-kirkwood/board-dt.o
arch/arm/mach-kirkwood/board-dt.c: In function 'kirkwood_dt_init':
arch/arm/mach-kirkwood/board-dt.c:52:2: error: 'kexec_reinit' undeclared (first use in this function)
arch/arm/mach-kirkwood/board-dt.c:52:2: note: each undeclared identifier is reported only once for each function it appears in
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
[v4, rebase onto recent Linus for repost]
[v3, speak actual English in the commit message, thanks Sergei Shtylyov]
[v2, using linux/kexec.h not asm/kexec.h]
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With old mxs clock support removed, the timer_clk argument of
mxs_timer_init is unused now, so remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The mxs clock has been switched to common clock framework, so the old
clock support can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
When mxs_timer_init() does not have a timer_clk passed in, it should
try to request clock from clkdev system.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
this makes the mbimxsd51 board naming consistant with others
Signed-off-by: Eric Bénard <eric@eukrea.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
rev1 were shipped with silicon 2.0, rev2 with silicon 3.0
so we are using the silicon version to know the PCB revision
Signed-off-by: Eric Bénard <eric@eukrea.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this board is not publicly available and is replaced by cpuimx51sd
Signed-off-by: Eric Bénard <eric@eukrea.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mxs pinctrl driver will only support DT probe. That said, the mxs
device drivers can only get pinctrl state from pinctrl subsystem when
the drivers get probed from device tree.
Before converting the whole mxs platform support over to device tree,
we need to enable pinctrl dummy states for those non-DT board files
to ensure the pinctrl API adopted by mxs device drivers will work for
both DT and non-DT probe.
Instead of calling pinctrl_provide_dummies() directly in every board
file, the patch introduces soc specific calls mx23_soc_init() and
mx28_soc_init() for boards' .init_machine hook to invoke, so that
any soc specific setup for non-DT boot only can be added there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
cpuidle uses a generic function now. Remove the unused code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20120507175652.260797846@linutronix.de
The system dma module has capabiities register indicating
the support for descriptor loading, constant fill, etc.
Use this instead of OMAP revision check to identify the features
supported runtime.
This avoids patching the code for feature SOCs which has
those capabilities.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
EMIF, GMPC and DMM driver can ioremap() the address
space as part of driver intialisation and there is
no need to have static IO mapping for them.
Hence remove the un-used static IP space and let
the respective drivers manage it as part if driver
init.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
All OMAP2PLUS arch based machines makes use of mach-omap2 directory.
So just add one entry so that there is no need to patch this file
for any OMAP2+ devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
cpu_class_is_omap2() contains all OMAP2+ devices. So update the DMA code
cpu checks accordingly so that there is no need to patch
the file for any future OMAP2+ devices.
In long run, all these attributes should come from hwmod dev_attr based
on DMA IP version.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Current OMAP code doesn't use any of the OMAP_WKG_ENB_SECURE_*
registers.
So remove those defines.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Since OMAP4 code base now makes use of OMAP4 specific PRCM functions,
cm2xxx_3xxx.c need not be compiled for OMAP4 only builds.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Clean up clockdomains3xxx_data.c a bit by removing the superfluous
commas in gfx_sgx_3xxx_wkdeps[].
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
With patch 'ARM: OMAP2+: powerdomain: Wait for powerdomain transition
in pwrdm_state_switch()', the pwrdm_clkdm_state_switch() API becomes
duplicate of pwrdm_state_switch().
Get rid off duplicate pwrdm_clkdm_state_switch() and update the
users of it with pwrdm_state_switch()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the correct clockdomain for the HDQ functional clock. This is needed
for the clock and hwmod PM code to work correctly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
The current DPLL code enables and disables autoidle features
without checking whether the autoidle register is available.
Fix this by putting a check for the existence of the autoidle
register in the DPLL data.
With such a check in place, for DPLLs which do not support this
feature, simply skipping the autoidle_reg entry in the DPLL data
is sufficient.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We do not use iclk anywhere in the dmtimer driver and so removing it.
Hence removing the timer iclk entries from OMAP4 clkdev table as well.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add missing idle_st bit for 32k-sync timer into the prcm-common
header file, required for hwmod data.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The register bits for MPU_CLK_SRC and IVA2_CLK_SRC in CM_CLKSEL1_PLL
register are 3 bits wide. Fix the MASK definition accordingly.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
To improve the clarity of the code, replace the CK_3517 flag used in
the clock data with CK_AM35XX. The CK_3505 flag can also be
removed, since it is now unused.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The init for 3505/3517 specific clocks depends on the ordering of
cpu_is checks, is error prone and confusing (there are 2 separate
checks for cpu_is_omap3505()).
Remove the 3505-specific checking since CK_3505 flag is not used, and
treat all AM35x clocks the same.
This means that the SGX clock (the only AM35x clkdev not currently
flagged for 3505) will now be registered on 3505, but that is
harmless. That can be cleaned up when the clkdev nodes are removed in
favor of them being registered by hwmod.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The AM35x UART4 is common to all AM35x devices, so use CK_AM35XX instead
of (CK_3505 | CK_3517), which is equivalent.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Conflicts:
drivers/net/ethernet/intel/e1000e/param.c
drivers/net/wireless/iwlwifi/iwl-agn-rx.c
drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
drivers/net/wireless/iwlwifi/iwl-trans.h
Resolved the iwlwifi conflict with mainline using 3-way diff posted
by John Linville and Stephen Rothwell. In 'net' we added a bug
fix to make iwlwifi report a more accurate skb->truesize but this
conflicted with RX path changes that happened meanwhile in net-next.
In e1000e a conflict arose in the validation code for settings of
adapter->itr. 'net-next' had more sophisticated logic so that
logic was used.
Signed-off-by: David S. Miller <davem@davemloft.net>
This pull request is quite big, but mainly because there's a
giant rework of the s3c_hsotg.c driver to make it friendlier
for other users. Samsung Exynos platforms use the DesignWare
Core USB2 IP from Synopsys so it's a bit unfair to have the
driver work for Samsung platforms only. In short, the big
rework is in preparation to make the driver more reusable.
Another big rework in this pull request came from Ido, where
he's removing the redundant pointer for the endpoint descriptor
from the controller driver's own endpoint representation. The
same pointer is available through the generic struct usb_ep
structure.
Also on this pull request is the conversion of a few extra
controller drivers to the new style registration, which allows
multiple controllers to be available on the same platform and
helps remove global pointers from those drivers.
Together with those big changes, there's the usual fixes and cleanups
to gadget drivers. Nothing major.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPp3l8AAoJEIaOsuA1yqRECjkP/3mScTFWEgjQsa7ynlYW6bfE
9uI3yP0VPws8EK0MBIOeXOhz7z/x/of/9XEEvnVjqnVkXlYc23IEJactbc1sYHQY
WsUyeuD6D+W5UHkomV0W8Xh1agVeW9QYDubQxI62KL81pWCC3MVa+BfW+430lrdi
7FUxWykCByYu1VYNZYfaGFyKalkpOpIydFtAZp2ykawUJMyB1PPl+2uzA1u/zB9A
Tm6E2Su+CzWp59/Udc64O25FhPo/g5GQWX2VbO1XneUrpNQgfihq6RjSi3hHYZdq
NkeR0eWwc5KeWZfsfm57AErQlN97uP3fAUSHz9o6c5N9V7bW221sCh4ZH3s32+IB
Dnps2WbW7IslUntYd1GyakfRILTrhMbg7GJZbmxdzWmIK6Pv0NLISPq4bZ64QJOH
iqa8NtluN0m1DSwUNX7UBHQZ6Cj1X3xZIdAJvdg4IlqUJ+Q2UmgCG9/kloF1H0C3
QnRXUEgbmMZ42sVVWEafUhwfEQTNFJyWd7OpFuyo8R3vARJg/miaEy7Lf+IqpRxD
5WV6o/TVCL2c6lQP2NbJoCSr10K2VcHOJpUS8cYv6K+ZIyTbKvOh8rlArX2+/W3a
YZtd+nfq2FyuRVxAasXwpsVCDT319LWt+Myq+9cl23+PyN54j+OnhHPJr15tBru1
OB/Z6arXyc17Gq/Ng2ur
=irDV
-----END PGP SIGNATURE-----
Merge tag 'gadget-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: gadget: patches for v3.5
This pull request is quite big, but mainly because there's a
giant rework of the s3c_hsotg.c driver to make it friendlier
for other users. Samsung Exynos platforms use the DesignWare
Core USB2 IP from Synopsys so it's a bit unfair to have the
driver work for Samsung platforms only. In short, the big
rework is in preparation to make the driver more reusable.
Another big rework in this pull request came from Ido, where
he's removing the redundant pointer for the endpoint descriptor
from the controller driver's own endpoint representation. The
same pointer is available through the generic struct usb_ep
structure.
Also on this pull request is the conversion of a few extra
controller drivers to the new style registration, which allows
multiple controllers to be available on the same platform and
helps remove global pointers from those drivers.
Together with those big changes, there's the usual fixes and cleanups
to gadget drivers. Nothing major.
Add 88pm860x into ttc_dkb, and it will impact the suspend/resume
of pxa910
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
For the SOC chips using tauros2 cache, will need disable
and resume tauros2 cache for SOC suspend/resume.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
When enable ARCH_SUSPEND_POSSIBLE, it need defintion of
cpu_mohawk_do_suspend and cpu_mohawk_do_resume
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <<haojian.zhuang@gmail.com>
MMP2 can enter system sleep level during suspend.
It can be waken up by PMIC interrupt, RTC/ALARM.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Move APBC_REG, APMU_REG and CIU_REG definition to addr-map.h
driver only need include addr-map.h to get access of the
registers.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Commit 4e8ee7de22 (ARM: SMP: use
idmap_pgd for mapping MMU enable during secondary booting)
switched secondary boot to use idmap_pgd, which is initialized
during early_initcall, instead of a page table initialized during
__cpu_up. This causes idmap_pgd to contain the static mappings
but be missing all dynamic mappings.
If a console is registered that creates a dynamic mapping, the
printk in secondary_start_kernel will trigger a data abort on
the missing mapping before the exception handlers have been
initialized, leading to a hang. Initial boot is not affected
because no consoles have been registered, and resume is usually
not affected because the offending console is suspended.
Onlining a cpu with hotplug triggers the problem.
A workaround is to the printk in secondary_start_kernel until
after the page tables have been switched back to init_mm.
Cc: <stable@vger.kernel.org>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
At the moment, read_persistent_clock is implemented at the
platform level, which makes it impossible to compile these
platforms in a single kernel.
Implement these two functions at the architecture level, and
provide a thin registration interface for both read_boot_clock
and read_persistent_clock. The two affected platforms (OMAP and
Tegra) are converted at the same time.
Reported-by: Jeff Ohlstein <johlstei@codeaurora.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The machine endianness has no direct correspondence to the syscall ABI,
so use only AUDIT_ARCH_ARM when identifying the ABI to the audit tools
in userspace.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM audit code incorrectly uses the saved application ip register
value to infer syscall entry or exit. Additionally, the saved value will
be clobbered if the current task is not being traced, which can lead to
libc corruption if ip is live (apparently glibc uses it for the TLS
pointer).
This patch fixes the syscall tracing code so that the why parameter is
used to infer the syscall direction and the saved ip is only updated if
we know that we will be signalling a ptrace trap.
Reported-and-Tested-by: Jon Masters <jcm@jonmasters.org>
Cc: stable@vger.kernel.org
Cc: Eric Paris <eparis@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The inline assembly in kernel_execve() uses r8 and r9. Since this
code sequence does not return, it usually doesn't matter if the
register clobber list is accurate. However, I saw a case where a
particular version of gcc used r8 as an intermediate for the value
eventually passed to r9. Because r8 is used in the inline
assembly, and not mentioned in the clobber list, r9 was set
to an incorrect value.
This resulted in a kernel panic on execution of the first user-space
program in the system. r9 is used in ret_to_user as the thread_info
pointer, and if it's wrong, bad things happen.
Cc: <stable@vger.kernel.org>
Signed-off-by: Tim Bird <tim.bird@am.sony.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Same code. Use the generic version. The special Makefile treatment is
pointless anyway as init_task.o contains only data which is handled by
the linker script. So no point on being treated like head text.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20120503085034.221811388@linutronix.de
Add the two standard UART signals (GPIO46_STUART_RXD, GPIO47_STUART_TXD) to the
initial mfp config table hx4700_pin_config[] passed to pxa2xx_mfp_config().
Although pxa2xx_transceiver_mode() can subsequently set these two signals via
its own call to pxa2xx_mfp_config(), pxa2xx_transceiver_mode() is only present
when CONFIG_PXA_FICP=y. Hence this patch provides a default mfp config.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Suppot gpio/irq/timer in mmp-dt driver. Support PXA910 also in mmp-dt
driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Parse timer from DTS file. Avoid to use hardcoding marco for register.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Merge irq-pxa168 and irq-mmp2. And support device tree also.
Since CONFIG_SPARSE_IRQ is enabled in arch-mmp, base irq starts from
NR_IRQS_LEGACY.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Append CONFIG_MACH_MMP2_DT.
CONFIG_MACH_MMP_DT is used to ARMv5 DT support. CONFIG_MACH_MMP2_DT
is used to ARMv7 DT support. These two machine support can't be
selected at the same time.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Since irq_domain_add_simple() is removed, remove it in mmp-dt.c also.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This patch removes support for ARMv3 CPUs, which haven't worked properly
for quite some time (see the FIXME comment in arch/arm/mm/fault.c). The
only V3 parts left is the cache model for ARMv3, which is needed for some
odd reason by ARM740T CPUs, and being able to build with -march=armv3,
which is required for the RiscPC platform due to its bus structure.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
At init time, check the powerdomains lookup is successful otherwise
exit the cpuidle driver init function with -ENODEV like what is done for the
omap3 cpuidle driver.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This reverts commit 46f8c3c7e9.
The commit above swapped the DSI1_PPID and DSI2_PPID register fields in
CONTROL_DSIPHY to be in sync with the newer public OMAP TRMs(after version V).
With this commit, contention errors were reported on DSI lanes some OMAP4 SDPs.
After probing the DSI lanes on OMAP4 SDP, it was seen that setting bits in the
DSI2_PPID field was pulling up voltage on DSI1 lanes, and DSI1_PPID field was
pulling up voltage on DSI2 lanes.
This proves that the current version of OMAP4 TRM is incorrect, swap the
position of register fields according to the older TRM versions as they were
correct.
Cc: stable@vger.kernel.org # v3.2+
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 384ebe1c28, "gpio/omap: Add DT
support to GPIO driver", introduced dynamic IRQ numbering of OMAP GPIO
interrupts, breaking all IH_GPIO_BASE based IRQ number calculations.
This issue was corrected in the OMAP GPIO driver and the related header
file with commit 25db711df3, "gpio/omap:
Fix IRQ handling for SPARSE_IRQ".
However, the Amstrad Delta FIQ handler, which replaces the gpio-omap
driver in serving GPIO interrupts on this board, still uses that
outdated method. Fix it.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is just no point mapping up to 512MB for a serial port.
Using a single 1MB entry is way sufficient for all users.
This will create less interference for the following debugging patch.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The MMCI and PL022 SPI drivers sure need their platform data to
work on the Versatile as well. (This does not fix the auxdata for
MMCI instance mmc1 on the Versatile PB though.)
Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This does two things to the FPGA IRQ controller in the versatile
family:
- Convert to MULTI_IRQ_HANDLER so we can drop the entry macro
from the Integrator. The C IRQ handler was inspired from
arch/arm/common/vic.c, recent bug discovered in this handler was
accounted for.
- Convert to using IRQ domains so we can get rid of the NO_IRQ
mess and proceed with device tree and such stuff.
As part of the exercise, bump all the low IRQ numbers on the
Integrator PIC to start from 1 rather than 0, since IRQ 0 is
now NO_IRQ. The Linux IRQ numbers are thus entirely decoupled
from the hardware IRQ numbers in this controller.
I was unable to split this patch. The main reason is the half-done
conversion to device tree in Versatile.
Tested on Integrator/AP and Integrator/CP.
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This code removes platform dependency from s3c-hsotg driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This adds a driver for the ST-Ericsson ux500 hash hardware
module. The driver implements support for SHA-1 and SHA-2.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Add node for the audio codec
* Enable Tegra's I2S1 controller and DAS
* Add node for top-level sound complex
Signed-off-by: Stephen Warren <swarren@nvidia.com>
According to the device's datasheet, it can support an interrupt too.
However, the existing board file doesn't specify an interrupt, and I
don't have the schematics, so I can't add an interrupts property. The
current Linux driver doesn't support anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the known i2c devices on seaboard to the i2c table.
Also rename the temperature sensor device node, and mark it as a nct1008
instead of an adt7461 (which it is -- the chips are compatible though).
Signed-off-by: Olof Johansson <olof@lixom.net>
[swarren: Removed isl29018 from patch; it's already there now. Fixed
interrupts properties now that Tegra GPIO is an interrupt controller.
Moved smart-battery to the correct I2C bus.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard
actually uses this as an I2C bus mux, and devices are connected to both
pingroups. This change statically assigns the I2C2 controller to pingroup
PTA, so that on-board devices can be accessed. The DDC pingroup is used
for EDID/DDC accesses which are not yet required, given the absence of
any Tegra graphics support. I2C muxing will be supported later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the device info for ALS and proximity sensor for tegra
boards cardhu, ventana and seaboard.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit
description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
struct powerdomain varialbes are all file local, make them static.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: update changelog, drop error check in fast path]
Signed-off-by: Kevin Hilman <khilman@ti.com>
Reduce the scope of the omap3_idle_data to the file as it is only used
in cpuidle34xx.c.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Simplify the indentation by removing the useless 'else' statement.
Remove the first loop for the 'idx' search as we have it already
with the 'index' passed as parameter.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We are storing the 'omap3_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
As the table is initialized statically, let's remove the initialization at
startup too.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Initialize the omap3_idle_data array at compile time, that will allow
to remove the initialization at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We do not longer need the ''cpuidle_params_table' array as
we defined the states in the driver and we checked they are
all valid.
We also remove the structure definition as it is no longer used.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
With the previous changes all the states are valid, except the last
state which is now handled at runtime by next_valid_state() based on
the errata flags.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: minor changelog rework]
Signed-off-by: Kevin Hilman <khilman@ti.com>
The errata check is done in the next_valid_state function, no need to check
that in the omap3_idle_init function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Use the new cpuidle API and define in the driver the states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
As suggested, this table is an optimized version for rx51 and we
remove it in order to consolidate the cpuidle code between omap3
and omap4, we remove this specific data definition which is used
to override the default omap3 latencies but at the cost of extra
code and complexity.
In order to not lose the values which probably took time to be
measured, the table is converted into a comment with an array
description.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We initialized it at compile time, no need to do that at boot
time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We are storing the 'omap4_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We initialize the omap4_idle_data variable at compile time allowing us
to remove in the next patch the initialization done at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add the static declaration for the omap4_idle_data variable because its scope
is in the file only.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
We do not longer need this table as we defined the values
in the driver states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The cpuidle API allows to declare statically the states in the driver
structure. Let's use it.
We do no longer need the fill_cstate function called at runtime and
by the way adding more instructions at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The 'valid' field is never used in the code, let's remove it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This allows platforms to set up things that need to be done at
late_initcall time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Robert Lee <rob.lee@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ehci-mv can support PXA168, PXA910 and PXA920, use this driver to
support pxa168 SPH usb.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
There is an U2O OTG controller on ttc dkb, this patch is going to enable
it.
At this moment, it can only works in device mode, because when works in
host mode, it needs to supply vbus, but we have no vbus driver added
at this moment. Once the vbus driver is added, I'll prepar another
patch to enable the switch function.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Add usb device support for Marvell PXA910.
Actually PXA920 will use the same device.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This patch is part of a set which adds PCMCIA/CF support for the hx4700.
This patch modifies asic3_gpio_config[] as follows:
1. Remove ASIC3_GPIOC4_CF_nCD, whose purpose is unknown.
2. Add ASIC3_GPIOD4_CF_nCD, the actual CF card detect GPIO.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This patch enables the ASIC3 GPIO (12) as a wakeup source:
1. Set the WAKEUP_ON_EDGE_RISE MFP config bits for GPIO12 in
hx4700_pin_config[].
2. Call gpio_set_wake() for GPIO12.
With GPIO12 thus enabled, the mfd/asic3 driver can enable its own GPIOs
as wakeup sources by implementing a irq_set_wake() handler.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
The asic3 driver now sets the DS1WM clock_rate from the newly added
asic3_platform_data clock_rate field.
This patch initializes the asic3_platform_data clock_rate field on the
hx4700 platform.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
From: Linus Walleij <linus.walleij@linaro.org>:
Core support for the U9540 after finalized review
* 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits)
ARM: ux500: ioremap differences for DB9540
ARM: ux500: core U9540 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linus Walleij <linus.walleij@linaro.org> writes:
Delete U5500 after obsoletion of this ASIC, including two patches to the MFD
subsystem that have been ACK:ed by Samuel Ortiz.
* 'ux500-del-u5500-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
mfd/ab5500: delete AB5500 support
mfd/db5500-prcmu: delete DB5500 PRCMU support
ARM: ux500: delete U5500 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJPoPBUAAoJEPFlmONMx+ez+x8P/1v4GU2XzwG2XBLrOeF1xzjO
P1i3mYVN2aWGZ3ZGeVPvHd/X6Q2FiaajwFoiRVe1dOHCJwBDf0mFvYkQgaqAlk+D
ZkhCPvshWtBG9uOSq47SAa4+Bw0O29kxPfTGsA1fyZoj/B0ZiyuTbPw53Fvgylmz
7Jkl6Jh9dALI1Nb7P/xhGaeg4e7Out3U5f0ZITMuAJhMd1r2ikkV7BeQd77e/8hY
xbzmQVCmWFtjK4iodHDrqKXgL7CVlAno8y6xiKtELipd1p+5Ao1BBlHkHg3bpjmb
/G6YX86W9CVPU3jMhqLSoywiMX/PiElR559DPxPf/+8d5EaU1QsJyAU/D/zEb5D1
Y5yi5jfrJFi2zEFYYDv5xHn/6M72JJT0HDQB8YBfs8n6uksDk+rZtoBZVlIbWBxC
7vzvJ31712uxAtVeD5fbKOyVOgHRf6df8GByLR8Xi3Ak9ntMRfJSiEcxIrcqZ3dx
M+A5S8g5Tbue5xDUu7cQG50OTu0t9JgoaSN3yHXnIesOXyMUylkatMEwpUamyGiD
jX/DBmV7trwbe3re8SF7c2TTi2AfJsSFk840Ot9zfvuk7VaaZBjuC0tqmp0RyKIY
kRlN0QGwn0+aNqRF74MWhDYsfnOXjdArcheW2szO5MiaUK9+85MLCQnvSoiV0Gkp
flqaXKbjiUe/Oe83u+mC
=7B/b
-----END PGP SIGNATURE-----
Merge tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6 into next/cleanup
From: Sascha Hauer <s.hauer@pengutronix.de>
ARM: i.MX cleanups for 3.5
* tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6: (5 commits)
ARM: mx53: fix pad definitions for MX53_PAD_EIM_D28__I2C1_SDA and MX53_PAD_GPIO_8__CAN1_RXCAN
ARM: imx/eukrea_mbimx27-baseboard: fix typo in error message
ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some pads
arm: imx: add missing select IMX_HAVE_PLATFORM for MACH_MX35_3DS in Kconfig
arm: imx: make various struct sys_timer static
Includes an update to 3.4-rc4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The cacheflush syscall can fail for two reasons:
(1) The arguments are invalid (nonsensical address range or no VMA)
(2) The region generates a translation fault on a VIPT or PIPT cache
This patch allows do_cache_op to return an error code to userspace in
the case of the above. The various coherent_user_range implementations
are modified to return 0 in the case of VIVT caches or -EFAULT in the
case of an abort on v6/v7 cores.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We can't be holding the mmap_sem while calling flush_cache_user_range
because the flush can fault. If we fault on a user address, the
page fault handler will try to take mmap_sem again. Since both places
acquire the read lock, most of the time it succeeds. However, if another
thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
between the call to flush_cache_user_range and the fault, the down_read
in do_page_fault will deadlock.
[will: removed drop of vma parameter as already queued by rmk (7365/1)]
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This also changes the DMA clkdev lookup to use the imx-dma driver name
and "ahb" as connection ID to request the hclk dma clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This gate consists of two bits:
0b00: clk disabled
0b01: clk enabled in run mode and disabled in sleep mode
0b11: clk enabled
Currently only disabled and enabled are supported. As it's unlikely
that we find something like this in another SoC create a i.MX specific
clk helper for this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35.
Currently only reading the rate is supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MX53_PAD_EIM_D28__I2C1_SDA uses an undefined PAD_CTRL_I2C
MX53_PAD_GPIO_8__CAN1_RXCAN has an incorrect input_select value
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the cpuidle driver for the ux500 SoC.
The boards saves 12mA with these states. It is based on the latest
cpuidle consolidation from Robert Lee.
The cpu can go to retention only if the other core is in WFI.
If the other cpu is in WFI and we decoupled the gic from the cores,
then we have the guarantee, it won't be wake up.
It is up to the prcmu firmware to recouple the gic automatically
after the power state mode is selected.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In dbx500 based devices the PRCMU Timer 4 is used as a clocksource
and sched_clock. Here we fetch all necessary addressing information
required for correct PRCMU initialisation from the Device Tree
instead of using hard-coded values.
CC: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now the SCMC911x is correctly enabled in Device Tree, there is no need
to continue registering it from platform code. In fact, if we continue
doing so, the system will throw an error on boot.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To aid in sequential one-by-one Device Tree enablement, we split
cpu-db8500's platform_devs structure into normal platform boot, where
we leave all devices to be added in tact and a DT version where we
will remove the devices as they are DT enabled.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch prevents i2c devices which are not present on the Snowball
low-cost development board from being registered. Devices such as;
tc3589x, bu1780 and lp5521 are present on other supported boards,
but are not located on Snowball.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This platform has been obsoleted and was only available inside of
ST-Ericsson, no users of this code are left in the world. This
deletes the core U5500 support entirely in the same manner as the
obsoleted U8500 silicon was previously deleted.
The cpu_is_u5500() macros that can read out the CPU ID is left
until the next kernel cycle, this makes it possible to merge
deletion of dependent drivers without breakage.
This also has the upside of removing the mailbox driver which was
our only driver that was outside the drivers/* hiearchy, now the
machine directory only handles machines and nothing else.
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Jonas Aberg <jonas.aberg@stericsson.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The DB9540 ASIC has bigger PRCMU and PRCMU TCDM memories,
so create a separate mapping table for these.
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the U9540 variant of the U8500 series. This
is an application processor without internal modem. This is the
most basic part with ASIC ID, CPU-related fixes, IRQ list, register
ranges, timer, UART, and L2 cache setup. This is based on a patch
by Michel Jaouen which was rewritten to fit with the latest 3.3
kernel.
ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
migrate to using Device Tree for getting the IRQs to devices.
ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
as suggested by Arnd Bergmann.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull ARM fixes from Russell King.
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQs
ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victim
ARM: 7403/1: tls: remove covert channel via TPIDRURW
ARM: 7401/1: mm: Fix section mismatches
ARM: OMAP: fix DMA vs memory ordering
ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQs
ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler
ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.c
ARM: 7398/1: l2x0: only write to debug registers on PL310
ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310
ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores
Linus Walleij <linus.walleij@linaro.org> writes:
This is a pull request for the GPIO and pin control stuff
accumulated in the ST-Ericsson tree. Here we have:
- Improvements and fixes and a custom pin config API from
Rabin Vincent
- Device Tree bindings from Lee Jones
- Some accumulated patches by yours truly.
- A MSP platform data init patch from Ola Lilja that is merged
here due to dependency on pin config work. It is to be
used with work being worked on in parallel in the ALSA
SoC subsystem.
If you wonder about the custom pin config implementation this
is to be used as a transition base as I am rewriting the
driver to use pinctrl. Expect a final pull request on top
of this one that will move the ux500 over to pinctrl.
* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add support for MSP I2S-devices
drivers/gpio: gpio-nomadik: Add support for irqdomains
drivers/gpio: gpio-nomadik: Apply Device Tree bindings
ARM: ux500: update pin handling
ARM: ux500: implement pin API
ARM: ux500: remove a bunch of internal pull-ups
plat-nomadik: new sleep mode pincfg macros
gpio/nomadik: use ioremap() instead of static mappings
gpio/nomadik: support low EMI mode
gpio/nomadik: fix spurious interrupts with SKE
gpio/nomadik: cache [rf]w?imsc
gpio/nomadik: don't set SLPM to 1 for non-wakeup pins
Also includes an update to v3.4-rc4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The AT91RM9200 Ethernet controller still has a fixed IO mapping.
So:
* Remove the fixed IO mapping and AT91_VA_BASE_EMAC definition.
* Pass the physical base-address via platform-resources to the driver.
* Convert at91_ether.c driver to perform an ioremap().
* Ethernet PHY detection needs to be performed during the driver
initialization process, it can no longer be done first.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The cmpxchg64 routines for ARMv6+ CPUs replicate inline assembly that
already exists for atomic64 operations. Furthermore, the cmpxchg64 code
uses the "memory" constraint in the clobber list rather than identifying
the region of memory that is actually modified.
This patch replaces the ARMv6+ cmpxchg64 code with macros that expand to
the atomic64_ and local64_ variants, casting the pointer parameter to
the appropriate container type.
Cc: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
scu_power_mode changes the power mode for the current CPU, which it
determines from smp_processor_id(). However, this assumes that the
physical CPU number is equal to Linux's logical CPU number and if this
is not true, we will power off the wrong CPU.
This patch uses cpu_logical_map to translate the logical CPU number
into a physical one in scu_power_mode.
Reported-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors and
warnings mostly, but also some clock/device setup issues on exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPmzKwAAoJEIwa5zzehBx36jMP/3D/oE3AkqI/fhulDU2g8KmO
9/dVGOsdeKWqH14xcjc79l1V0aX5dtgqRIBQ/c13LetKhpyxY7J+ZVQml2c1jN7G
+h3DhmA+EzRUxXNuC8Iut6UgoITx+Rk8aGu6s1gD/osn9Ynm3B4+xxjhcEf0cZkD
aWq7GLipBa8uOd2ryrGftW1BS+tgf+Tcmc6yCxebbv5ARA5lJQRPuP+YgnYNyhzU
f7SCgkt6IpgcCcxAAzzgWLeFoPK0FfsOUXTkzLYOhJpOrkn82g5MWXDhe1tGddUr
JqJpYoIEwNzDcsEcImWDuoSFoaqgO6GiOU+8Y/tx6KNVnya9520JAoxBjU1EqgnV
+jHNHW9JaZs/oc7LbJ774NuV5YZ2XDhpZm1Cc0dBT2oDh2oFmeaXIt6cSA4jGYpm
4OP7BMDuxBdLlrKk8coDXCUT21HNsgRSkyx6Ic6dVNxvz86sKKE8FMj5m5c82GBk
n+1C+jCEs6rJi7e/ddCNMa6P0R9my5lq40S7WwOXDPw6YeetYPs5QYz7GJhM+n7z
f4uT20ggm1qmUWHVtAA2MiuTWlinSEFThRDS7+yRNioTNEfvcT5LmOTYt1UAtFQj
f9StJUgkBuoB+kuUNDKPtNqy5dT3y6d9L+9gbCIpalxwBOLs/s+0k8nHTYeu/lZ5
Ir56+pqGpr+7TCuBg28N
=V4y6
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors
and warnings mostly, but also some clock/device setup issues on
exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: PXA2xx: MFP: fix potential direction bug
ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT
arm/sa1100: fix sa1100-rtc memory resource
ARM: pxa: fix gpio wakeup setting
ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
ARM: EXYNOS: Fix resource on dev-dwmci.c
ARM: S3C24XX: Fix build warning for S3C2410_PM
ARM: mini2440_defconfig: Fix build error
ARM: msm: Fix gic irqdomain support
ARM: EXYNOS: Fix incorrect initialization of GIC
ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
ARM: u300: bump all IRQ numbers by one
ARM: ux300: Fix unimplementable regulation constraints
When a CPU is hotplugged off, we migrate any IRQs currently affine to it
away and onto another online CPU by calling the irq_set_affinity
function of the relevant interrupt controller chip. This function
returns either IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY, to indicate
whether irq_data.affinity was updated.
If we are forcefully migrating an interrupt (because the affinity mask
no longer identifies any online CPUs) then we should update the IRQ
affinity mask to reflect the new CPU set. Failure to do so can
potentially leave /proc/irq/n/smp_affinity identifying only offline
CPUs, which may confuse userspace IRQ balancing daemons.
This patch updates migrate_one_irq to copy the affinity mask when
the interrupt chip returns IRQ_SET_MASK_OK after forcefully changing the
affinity of an interrupt.
Cc: stable@vger.kernel.org
Reported-by: Leif Lindholm <leif.lindholm@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When performing a kexec on an SMP system, the secondary cores are stopped
by calling machine_shutdown(), which in turn issues IPIs to offline the
other CPUs. Unfortunately, this isn't enough to reboot the cores into
a new kernel (since they are just executing a cpu_relax loop somewhere
in memory) so we make use of platform_cpu_kill, part of the CPU hotplug
implementation, to place the cores somewhere safe. This function expects
to be called on the killing CPU for each core that it takes out.
This patch moves the platform_cpu_kill callback out of the IPI handler
and into smp_send_stop, therefore ensuring that it executes on the
killing CPU rather than on the victim, matching what the hotplug code
requires.
Cc: stable@vger.kernel.org
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
TPIDRURW is a user read/write register forming part of the group of
thread registers in more recent versions of the ARM architecture (~v6+).
Currently, the kernel does not touch this register, which allows tasks
to communicate covertly by reading and writing to the register without
context-switching affecting its contents.
This patch clears TPIDRURW when TPIDRURO is updated via the set_tls
macro, which is called directly from __switch_to. Since the current
behaviour makes the register useless to userspace as far as thread
pointers are concerned, simply clearing the register (rather than saving
and restoring it) will not cause any problems to userspace.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
WARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference
from the function arm_memory_present() to the function
.init.text:memory_present()
The function arm_memory_present() references
the function __init memory_present().
This is often because arm_memory_present lacks a __init
annotation or the annotation of memory_present is wrong.
WARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch
in reference from the function alloc_init_pud() to the function
.init.text:alloc_init_section()
The function alloc_init_pud() references
the function __init alloc_init_section().
This is often because alloc_init_pud lacks a __init
annotation or the annotation of alloc_init_section is wrong.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
New options enabled:
* RUNTIME_PM
* ISL29028 (light and proximity)
* INPUT_MPU3050 (gyro)
* BATTERY_SBS
* EM3027 RTC
* INPUT_MISC (dependency)
* POWER_SUPPLY (dependency)
The IIO option seems to have been moved recently too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Added AT91SAM9N12 SoC DT file, as well as the board definition
.dts file for AT91SAM9N12-EK.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 'v3.4-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
ARM: EXYNOS: Fix resource on dev-dwmci.c
ARM: S3C24XX: Fix build warning for S3C2410_PM
ARM: mini2440_defconfig: Fix build error
ARM: EXYNOS: Fix incorrect initialization of GIC
ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
All mainline platforms using the ARM architected timers are DT
only. As such, remove the ad-hoc support that is not longer needed
anymore.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
If CONFIG_LOCAL_TIMERS is not defined, let the architected timer
driver register a single clock_event_device that is used as a
global timer.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Provide an A15 sched_clock implementation using the virtual counter,
which is thought to be more useful than the physical one in a
virtualised environment, as it can offset the time spent in another
VM or the hypervisor.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the A15 generic timer and clocksource.
As the timer generates interrupts on a different PPI depending
on the execution mode (normal or secure), it is possible to
register two different PPIs.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
When running an SMP_ON_UP enabled kernel on UP, or with nosmp
passed to the kernel, we want to be able to detect that a local
timer is not going to be used (local timers are only used on
SMP platforms), so we could register it as a global timer instead.
Return -ENXIO when the above case is detected.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Let CONFIG_MACH_IMX27_DT be built by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes:
WARNING: arch/arm/mach-davinci/built-in.o(.text+0x2d84): Section mismatch in reference from the function da850_evm_ui_expander_setup() to the (unknown reference) .init.data:(unknown)
The function da850_evm_ui_expander_setup() references
the (unknown reference) __initdata (unknown).
This is often because da850_evm_ui_expander_setup lacks a __initdata
annotation or the annotation of (unknown) is wrong.
Note this is a real issue because if the tca6416 driver only binds when
the init sections are already discarded da850_evm_ui_expander_setup is
called when da850_evm_devices might already be overwritten.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Direct keys usage may not start from KP_DKIN0, add a msk option
to configure the specifics for platforms that can skip some keys.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
KPDK_DK only indicates the pin level of direct key.
So it is related to board, and low level may be active which
indicates that a key is pressed.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
The Micron MT9M111 camera chip needs its output enable to be
activated in order to work. The bootloader is not required to
activate it, so do it in machine code.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
The pcm990 baseboard for the pcm027 module used to setup a static
mapping for accessing the CPLD. It became illegal to call iotable_init
that late. The pcm027 support is broken since then. This patch
switches the cpld support to ioremap and removes all references to
previous static mappings.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Pins configured as input and have MFP_LPM_DRIVE_* flag set, can have a
wrong output value for some period of time (spike) during the suspend
sequence.
This can happen because the direction of the pins (GPDR) is set by
software and the output level is set by hardware (PGSR) at a later
stage.
Fix the above potential bug by setting the output levels first.
Also save the actual levels of the pins before the suspend and restore
them after the resume, but before the direction settings take place, so
the same bug as described above will not happen in the resume sequence.
Reported-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Pins that have MFP_LPM_KEEP_OUTPUT set and are configured for output
must retain the output state in low power mode.
Currently, the pin direction configuration is overrided with values
in gpdr_lpm[] array and do not obey the MFP_LPM_KEEP_OUTPUT setting.
Fix the above bug and add some documentation to clarify the
MFP_LPM_KEEP_OUTPUT setting purpose.
Reported-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
DEFINE_RES_MEM() takes the size of resource as a second argument,
not the end address. Passing end address leads to following error
in runtime during device registration:
sa1100-rtc: failed to claim resource 0
Fix it.
Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
In 3.3, gpio wakeup setting was broken. The call
enable_irq_wake() didn't set up the PXA gpio registers
(PWER, ...) anymore.
Fix it at least for pxa27x. The driver doesn't seem to be
used in pxa25x (weird ...), and the fix doesn't extend to
pxa3xx and pxa95x (which don't have a gpio_set_wake()
available).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Merge fixes from Andrew Morton:
"13 fixes. The acerhdf patches aren't (really) fixes. But they've
been stuck in my tree for up to two years, sent to Matthew multiple
times and the developers are unhappy."
* emailed from Andrew Morton <akpm@linux-foundation.org>: (13 patches)
mm: fix NULL ptr dereference in move_pages
mm: fix NULL ptr dereference in migrate_pages
revert "proc: clear_refs: do not clear reserved pages"
drivers/rtc/rtc-ds1307.c: fix BUG shown with lock debugging enabled
arch/arm/mach-ux500/mbox-db5500.c: world-writable sysfs fifo file
hugetlbfs: lockdep annotate root inode properly
acerhdf: lowered default temp fanon/fanoff values
acerhdf: add support for new hardware
acerhdf: add support for Aspire 1410 BIOS v1.3314
fs/buffer.c: remove BUG() in possible but rare condition
mm: fix up the vmscan stat in vmstat
epoll: clear the tfile_check_list on -ELOOP
mm/hugetlb: fix warning in alloc_huge_page/dequeue_huge_page_vma
Renaming remaining PERF_COUNTERS options into PERF_EVENTS.
Think we can get rid of PERF_COUNTERS now.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333643084-26776-5-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Frank Rowand <frank.rowand@am.sony.com>
Link: http://lkml.kernel.org/r/20120420124557.448826362@linutronix.de
Preparatory patch to make the idle thread allocation for secondary
cpus generic.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Howells <dhowells@redhat.com>
Cc: James E.J. Bottomley <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: x86@kernel.org
Link: http://lkml.kernel.org/r/20120420124556.964170564@linutronix.de
CATS sets its swizzle function to zero, which at the moment means
that no swizzling is required. Make this explicit for CATS.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Some platforms mark their hw_pci structure as __initdata, which means
it will be discarded after init time. Storing pointers to __initdata
in long lived data structures is a potential source of problems, and
in this case, sys->hw is unused apart from its initialization.
So, lets remove this member and its initializer.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fixes the following linker error:
arch/arm/mach-imx/built-in.o: In function `mx35_3ds_init':
mach-mx35_3ds.c:(.init.text+0x4b0): undefined reference to `imx_add_ipu_core'
mach-mx35_3ds.c:(.init.text+0x4c4): undefined reference to `imx_alloc_mx3_camera'
mach-mx35_3ds.c:(.init.text+0x520): undefined reference to `imx_add_mx3_sdc_fb'
mach-mx35_3ds.c:(.init.text+0x590): undefined reference to `imx35_ipu_core_data'
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'u300-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: u300: bump all IRQ numbers by one
ARM: ux300: Fix unimplementable regulation constraints
Some SKUs limit the maximum CPU frequency to 750MHz; see
tegra2_pllx_clk_init(). The pll_x frequency table needs an entry for this
frequency, or there will be continual log spam from the cpufreq driver
attempting to set this rate, yet there being no table entry for it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Ensure that the USB ULPI signals are not tri-stated, and have no pull-
up or pull-down.
Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or
PV1 depending on the board, so UAC) is not tri-stated, and has no pull-
up or pull-down.
This change appears larger than it is due to the grouping and sorting of
the pin configuration data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ULPI PHYs have a reset signal, and different boards use a different GPIO
for this task. Add a property to device tree to represent this.
I'm not sure if adding this property to the EHCI controller node is
entirely correct; perhaps eventually we should have explicit separate
nodes for the various PHYs. However, we don't have that right now, so this
binding seems like a reasonable choice.
Cc: <devicetree-discuss@lists.ozlabs.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Not all boards use GPIO_PV0 as the ULPI PHY reset signal. Instead of
hard-coding this GPIO into devices.c, make the board files set it
explicitly. This will allow the PHY code to differentiate between set and
unset values, and hence know when to read the value from device tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_p_out4 is used on all/most Tegra boards to drive the cdev2 output pin
to provide a reference clock to a ULPI USB PHY. This reference clock must
run at 24MHz, and the cdev2 output has no additional dividers.
Remove board-paz00.c's now-duplicate initialization of this clock.
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_c will be used as a clock source. Fill in tegra_pll_c_freq_table[]
so that it's possible to explicitly initialize the PLL.
NVIDIA's downstream nv-3.1 kernel and the ChromeOS kernel have different
pll_c tables. nv-3.1 contains entries for 522MHz and 598MHz output,
whereas the ChromeOS kernel contains entries for 600MHz output. I chose
to upstream the ChromeOS values for now, since the 600MHz rate appears
to match the default rate of this PLL when the HW boots, and it's not
clear to me why 522 or 598MHz are more useful.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[swarren: wrote commit description]
Add WM8903 codec nodes, and top-level sound complex node for basic
analog audio over headset jack and internal speakers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Both the Tegra30 I2S and AHUB modules used clocks, and hence currently
require AUXDATA in order to get specific device names so that clock
lookups work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
pll_a uses pll_p_out1 as its parent. Therefore this clock needs to be
initialized to make sure pll_a has a known input clock. Failure to do so
will cause the system to crash early in the bootup.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Add calls to tracehook_report_syscall_{entry,exit} and tracehook_signal_handler
Signed-off-by: Steven Walter <stevenrwalter@gmail.com>
Signed-off-by: Wade Farnsworth <wade_farnsworth@mentor.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Supplying the asm-generic/syscall.h interface is a
pre-requisite for HAVE_ARCH_TRACEHOOK
Signed-off-by: Steven Walter <stevenrwalter@gmail.com>
Signed-off-by: Wade Farnsworth <wade_farnsworth@mentor.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ThumbEE probe code uses inline assembly to read ID_PFR0 in order to
detect whether ThumbEE is implemented by the processor.
This patch replaces the inline asm with the read_cpuid_ext macro.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- Add necessary #ifdefs for CONFIG_COMMON_CLOCK
- Add a global spinlock to protect the CCM registers
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of having a cpu_is_* in each ccm register access it
is more efficient to make it a variable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to pass the timer clock directly to mxc_timer_init. We
should instead request the correct clock. This is an intermediate
step: For now we request the clock in the timer code when NULL
is passed as clock.
Also, the gpt on some i.MX have an additional ipg clock which can
be gated. Request and enable this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This removes the internal functions for assigning IRQ
handlers to each interrupt in favor of using the internal
map iterator in the irq domain code.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current IRQ domain implementation in the VIC allocates 32
interrupts for each VIC instance no matter whether the
controller actually use all the IRQs or not. Alter this so
we only allocate a domain up until the last IRQ marked valid.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In 3872c48b (tick: Document TICK_ONESHOT config option) Thomas describes
the circumstances under which TICK_ONESHOT should be selected. This is
an internal time keeping configuration symbol which should not be
selected by platform or arch code. So remove our select statements for
it.
This kills these warnings in OMAP builds:
kernel/time/tick-sched.c:47: warning: 'tick_do_update_jiffies64' defined but not used
kernel/time/tick-sched.c:89: warning: 'tick_init_jiffy_update' defined but not used
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the information required for successful
registration of the PRCMU timer 4 (clocksource) driver to the
db8500 Device Tree include file.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Here we split the description of the external-bus@50000000 over
two description files. In the more generic db8500 description file
we only specify the external-bus. Normally this would be used to
communicate with a NOR-flash device. On the Snowball however, the
SMSC9115 Ethernet chip occupies it. In the Snowball board specific
description file is where we actually specify that it is in fact the
Ethernet device which lives here.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Nomadik PL080 variant has some extra protection bits that
may be set, so we need to check these bits to see if the
channels are actually available for the DMAengine to use.
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Alim Akhtar <alim.akhtar@gmail.com>
Cc: Alessandro Rubini <rubini@gnudd.com>
Reviewed-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
This lets the s3c64xx-spi driver know the specifics of the controller-
variant and also setups the gpios and the misccr bit.
This setup is valid for all S3C24XX SoCs containing a HSSPI controller
(i.e. S3C2416/2450 and S3C2443)
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The S3C_PA_SPIx constants are only used by the s3c64xx-spi driver
and don't conflict with the older SoCs as they don't support hsspi.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
SoCs starting with the S3C2443 contain SPI controllers compatible with the
spi-s3c64xx driver and therefore need separate dma channels for rx and tx.
This patch introduces dma channel declarations for these and changes the
dma-s3c2443.c accordingly.
None of the older SoCs use the spi-dma at all. Most boards bitbang their
spi use and the spi-s3c24xx driver also does not use the dma system.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
When the hsmmc clock lookup was changed to be lookup tables based,
it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this
patch adds the base table with the missing hsmmc lookup.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit 6e8201f57c "mmc: core: add the capability for broken voltage"
introduced a new quirk to indicate that MMC core should ignore voltage
change errors reported by the regulators core. This is required to get
SDHCI working on UniversalC210, NURI and GONI boards again after commit
ceb6143b2d ("mmc: sdhci: fix vmmc handling").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixed following compile time error.
arch/arm/mach-exynos/common.c: In function 'exynos5_init_irq':
arch/arm/mach-exynos/common.c:539:2: error: implicit declaration of function 'of_irq_init'
arch/arm/mach-exynos/common.c:539:14: error: 'exynos4_dt_irq_match' undeclared (first use in this function)
arch/arm/mach-exynos/common.c:539:14: note: each undeclared identifier is reported only once for each function it appears in
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Should be EXYNOS4_IRQ_DWMCI instead of IRQ_DWMCI,
and use DEFINE_RES_{MEM,IRQ}.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410)
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410)
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This is needed to fix mini2440_defconfig after the platform
files have been moved around.
arm-none-linux-gnueabi-ld: no machine record defined
arm-none-linux-gnueabi-ld: no machine record defined
arm-none-linux-gnueabi-ld: no machine record defined
make: *** [.tmp_vmlinux1] Error 1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Create devices for the MSP-blocks (MSP0, MSP1, MSP2 and MSP3)
and associate it with the correct clocks in the clock-framework.
Signed-off-by: Ola Lilja <ola.o.lilja@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add irq domain support to the gpio-nomadik GPIO driver. This
enables its users to support dynamic IRQ assignment, which is
requried by Device Tree.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This creates Device Tree bindings for the Nomadik GPIO driver.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This updates the Ux500 pin handling to take much more care when
applying pin settings for different platforms and peripherals.
This is an accumulation of a longer history of updates to the
MOP500 family pin file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implement an API to allow a list of pincfgs to be remuxed to active
and sleep modes, for power saving. This is not exported on purpose,
because it is not to be called by drivers directly.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The default configuration for a number of I2C and keypad pins was
to pull-up. However on most reference designs the electronics
already contain external pull-ups which means the internal
pull-ups will lower the common resistance and increase power
consumption on these lines, and in some reference designs the
keypad inputs are not used so this will just cause problems. So
remove these pull-ups and add them on demand instead if needed.
Signed-off-by: Magnus Templing <magnus.templing@stericsson.com>
Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a few sleep mode pin config macros for sleep mode
for the Nomadik GPIO/pin controller.
Signed-off-by: Rickard Andersson <rickard.andersson@stericsson.com>
Signed-off-by: Rikard Olsson <rikard.p.olsson@stericsson.com>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix merge between commit 3adadc08cc ("net ax25: Reorder ax25_exit to
remove races") and commit 0ca7a4c87d ("net ax25: Simplify and
cleanup the ax25 sysctl handling")
The former moved around the sysctl register/unregister calls, the
later simply removed them.
With help from Stephen Rothwell.
Signed-off-by: David S. Miller <davem@davemloft.net>
As of
commit 75294957be
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Tue Feb 14 14:06:57 2012 -0700
irq_domain: Remove 'new' irq_domain in favour of the ppc one
the ARM gic controller uses proper irq domains. Fix the MSM gic
initialization and DT so that it works again.
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Using coherent DMA memory with the OMAP DMA engine results in
unpredictable behaviour due to memory ordering issues; as things stand,
there is no guarantee that data written to coherent DMA memory will be
visible to the DMA hardware.
This is because the OMAP dma_write() accessor contains no barriers,
necessary on ARMv6 and above. The effect of this can be seen in comments
in the OMAP serial driver, which incorrectly talks about cache flushing
for the coherent DMA stuff.
Rather than adding barriers to the accessors, add it in the DMA support
code just before we enable DMA, and just after we disable DMA. This
avoids having barriers for every DMA register access.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The MMCI driver will not work without two IRQs since this is not
flagged as a single-irq variant. Looking through the complex IRQ
definition for the MMCI on the versatile (including an #if 1
statement forcing MMCI IRQ0 to the VIC) this appears to the the
correct IRQ number for both models.
Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM PCS mandates that the length and stride bits of the fpscr are
cleared on entry to and return from a public interface. Although signal
handlers run asynchronously with respect to the interrupted function,
the handler itself expects to run as though it has been called like a
normal function.
This patch updates the state mirroring the VFP hardware before entry to
a signal handler so that it adheres to the PCS. Furthermore, we disable
VFP to ensure that we trap on any floating point operation performed by
the signal handler and synchronise the hardware appropriately. A check
is inserted after the signal handler to avoid redundant flushing if VFP
was not used.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The user VFP state must be preserved (subject to ucontext modifications)
across invocation of a signal handler and this is currently handled by
vfp_{preserve,restore}_context in signal.c
Since this code requires intimate low-level knowledge of the VFP state,
this patch moves it into vfpmodule.c.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PL310 errata #588369 and #727915 require writes to the debug registers
of the cache controller to work around known problems. Writing these
registers on L220 may cause deadlock, so ensure that we only perform
this operation when we identify a PL310 at probe time.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The workaround for PL310 erratum #753970 can lead to deadlock on systems
with an L220 cache controller.
This patch makes the workaround effective only when the cache controller
is identified as a PL310 at probe time.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Erratum #326103 ("FSR write bit incorrect on a SWP to read-only memory")
only affects the ARM 1136 core prior to r1p0. The workaround
disassembles the faulting instruction to determine whether it was a read
or write access on all v6 cores.
An issue has been reported on the ARM 11MPCore whereby loading the
faulting instruction may happen in parallel with that page being
unmapped, resulting in a deadlock due to the lack of TLB broadcasting
in hardware:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-March/091561.html
This patch limits the workaround so that it is only used on affected
cores, which are known to be UP only. Other v6 cores can rely on the
FSR to indicate the access type correctly.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ensure each button is individually identifiable by using
their correct unique given device names.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This creates Device Tree bindings for the Nomadik GPIO driver.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Split off from the patch actually implementing the bindings]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To allow for proper initialisation of the SMSC9115 Ethernet chip
and other devices which may be connected to the 'external bus',
Device Tree must first enable and traverse though it. This patch
enables the 'external bus' which will facilitate further
initialisation of its suborantate DT nodes.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It is believed that the gpio compatible match entry is too long
and cumbersome in its current form. This patch takes steps to
decrease its length by using ST-Microelectronics' abbreviation ST.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It is believed that the i2c compatible match entry is too long
and cumbersome in its current form. This patch takes steps to
decrease its length by using ST-Microelectronics' abbreviation ST.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Low EMI (Electro-Magnetic Interference) mode means lower slew
rate on the signals. The Nomadik GPIO controller supports
this so create an interface to enable it.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull ARM fixes from Russell King:
"Here's my usual Sunday push, just for one revert which PeterZ hollered
about after last weeks push. Other than that, all seems strangely
quiet as far as fixes go in non-platform ARM land at the moment."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
Revert "ARM: 7359/2: smp_twd: Only wait for reprogramming on active cpus"
We must use pinctrl framework instead of defining per SoC pinmux drivers. This
patch removes existing padmux support present for SPEAr platform.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
The register and irq definitions in mach/*.h for spear3xx and
spear6xx are now mostly obsolete, after the platforms have been
converted to device tree based probing and the data is now
part of the device tree files.
The misc_regs.h contents are moved into clock.c because that is
the only user, aside from the DMA_CHN_CFG that should eventually
get handled differently. Some of the contents of mach/spear.h
still remain, because they are used to set up the static map table,
timer, uart and auxdata tables, but almost everything got removed.
We might remove everything but the map table as the DT conversion
completes, but that is not a priority. I've also made sure to
make both copies of spear.h more or less identical so we can
eventually combine them.
The spear3?0.h files were only used by the spear3?0.c files, so I
merged the contents in there and removed the bits that were unused.
This is something that should still be looked at.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Recently device tree support is added for SPEAr3xx & SPEAr6xx and we must
upgrade defconfig for that to get compiled. This patches does it.
There are few more rearrangements done in defconfig automatically, when i run
make savedefconfig.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Both SPEAr3xx and SPEAr6xx families have one instance of ARM PL080 DMA
controller. This patch adds in support for that.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
This patch adds a generic target for SPEAr3xx machines that can be configured
via the device-tree. Currently the following devices are supported via the
devicetree:
- VIC interrupts
- PL011 UART
- PL061 GPIO
- PL110 CLCD
- SP805 WDT
- Synopsys DW I2C
- Synopsys DW ethernet
- ST FSMC-NAND
- ST SPEAR-SMI
- ST SPEAR-KEYBOARD
- ST SPEAR-RTC
- ARASAN SDHCI-SPEAR
- SPEAR-EHCI
- SPEAR-OHCI
Other peripheral devices will follow in later patches.
This also removes IO_ADDRESS macro and creates 16 MB static mappings instead of
4K for individual peripherals. This is done to have efficient TLB lookup for any
I/O windows that are located closely together. ioremap() on this range will
return this mapping only instead of creating another.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
For better print logs/messages, it is advisable to use pr_*() routines instead
of directly calling printks. This patch removes direct calling of printks for
spear3xx.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
'make dtbs' compiles all dtbs for a family. For this we need to add entries for
all board dtb's in Makefile.boot file. This patch does it.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
This patch adds following clocks: "usbh.0_clk" and "usbh.1_clk". They are used
by ehci and ohci drivers for SPEAr3xx usb host devices.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Change FSMC and SMI clock names to match the ones needed for DT based
probing.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@st.com>
- The biggest improvement of this series is the ability to compile several
AT91 SoCs in one kernel image.
For now on it's limited to the DT-enabled boards but we can compile all
the core together.
- The Kconfig series is stacked before other patches as it is simple and
non-intrusive. Its goal is to remove too restrictive dependencies on
SoC names. This will allow to add support for newer SoC seamlessly.
- Some very "cosmetic" Kconfig changes are also added (entry names,
comments, etc.).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJPjYz4AAoJEAf03oE53VmQ/0wH/3kXJYM/8nX8fqlQ8eTh0SHi
lRsoNL+4arHFKcocYhZyiXEidUKCUMLuQSdvL9MWy1e286+ABsaFgrjfLsp/ZDqE
jDJBCZIxUD6rL94VRnYEHrhWqGzzPKi8/syVZ8JOv/1HGml402CqPcRDKmWY/e4Q
ajl/d463q0ufwfQ4LMP+DsR29TxEdecs4DkxnhwcrRCbJ2hDPLmWVER+tPITPwqp
R8qVGY3K6axG68b964B/hsACjRF7C1lqRQsiQbi8pVPPGEhekmgnW8hF6dNdy1VW
wVo8F0GCST6jLk9YFbirBdKsDRJTLc+WsyP6jUZyWkrrM6p4ycs+voGFDNZbhPw=
=CXyd
-----END PGP SIGNATURE-----
Merge tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Nicolas Ferre <nicolas.ferre@atmel.com> writes:
First batch of AT91 cleanup for 3.5 kernel.
- The biggest improvement of this series is the ability to compile several
AT91 SoCs in one kernel image.
For now on it's limited to the DT-enabled boards but we can compile all
the core together.
- The Kconfig series is stacked before other patches as it is simple and
non-intrusive. Its goal is to remove too restrictive dependencies on
SoC names. This will allow to add support for newer SoC seamlessly.
- Some very "cosmetic" Kconfig changes are also added (entry names,
comments, etc.).
* tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91: (19 commits)
ARM: at91: add defconfig for device tree
ARM: at91/dt: do not specify the board any more
ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
ARM: at91: pm select memory controler at runtime
ARM: at91: move at91_init_leds to board init
ARM: at91: do not pin mux the UARTs in init_early
ARM: at91: drop at91_set_serial_console
ARM: at91: uncompress: autodetect the uart to use
ARM: at91: uncompress Store UART address in a variable
hwrng: Kconfig: remove dependency for atmel-rng driver
Input: Kconfig: remove dependency for atmel_tsadcc driver
rtc: Kconfig: remove dependency for AT91 rtc driver
ARM: at91/Kconfig: website link for AT91SAM9G20-EK
ARM: at91/Kconfig: add AT91SAM9x5 family to AT91_EARLY_DBGU0 entry
ARM: at91/Kconfig: add clarifications to AT91SAM9M10G45-EK entry
ARM: at91/Kconfig: add comment to at91sam9x5 family entry
ARM: at91/Kconfig: change at91sam9g45 entry
ARM: at91: change AT91 Kconfig entry comment
Also updates the cleanup branch to v3.4-rc3.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch updates the defconfig for the LPC32xx SoC after device tree
conversion:
* Adjustment to DT conversion, added new driver support
* Added IPv6
* Increased kernel log buffer
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch adds the dts files for the reference machine of LPC32xx:
* arch/arm/boot/dts/lpc32xx.dtsi: Include for devices based on LPC32xx
* arch/arm/boot/dts/phy3250.dts: Board support for PHYTEC phyCORE-LPC3250
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch adjusts the clocks of the LPC32xx SoC to be picked up correctly by
the respective drivers.
* AMBA dmaengine
* watchdog
* I2C
* TSC
* MMC
* Ethernet
* ADC
* USB Device
(All except the pl08xdmac AMBA dmaengine via DT generated device name)
Signed-off-by: Roland Stigge <stigge@antcom.de>
The platforms using i2c-pnx.c both defined a duplicated i2c.h (used nowhere
else). This patch removes those and integrates the contents into the driver
itself.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
As a precondition for device tree conversion, the platforms using i2c-pnx.c are
converted to using mem and irq resources instead of platform data.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
The sdhci driver is modified to be independent of clk_type member in the sdhci
platform data. Hence, all usage of clk_type in platform code is removed.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc2]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use the of_irq_init() call to setup the gic which also properly
registers the gic device node pointer with gic irq domain,
without which all interrupt specifier translations for gic fail.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
With the addition of platform specific driver data in the sdhci driver
for EXYNOS4 and EXYNOS5, the device name of sdhci controllers on EXYNOS4
and EXYNOS5 are changed accordingly.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc2]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for the kizbox board (based on at91sam9g20 SoC)
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This will avoid the CONFIG_OF on the *_devices.c as this file is deprecated
for DT support.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This will simplify the adding of the A9260.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
We now store the dtb in a nand partition.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add both board revision support 1mmc and 2mmc and use a dtsi for common part.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The at91sam9260 and at91sam9g20 share most of the same IP.
So udpate the node property in the at91sam9g20 only.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Since the VIC was converted to use generic IRQ domains IRQ 0
is silently ignored. This IRQ is used on the U300 so we're
missing it now. Bump all IRQ numbers by one since they are
now decoupled from the hardware IRQ numbers.
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It doesn't make sense to grant permission to change the status of a
regulator that is also set as always on and similarly it doesn't make
sense to allow a driver to change the voltage of a regulator which can
only be set to a single voltage.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkHNvAAoJEMePsQ0LvSpLH5cQALFSa2wEDWpJP9UZzeOPYAfV
BsyNSZCWkYenokaOFZ4UcGZZf8nk+RixVtHb4cEfiVLygbXoiH2uNCzogK56Avil
TMAcnvXPv9/uL//GW/2Mwxzl5qUKK+v9d6yZLP0bzK+nPiw8ALJqcEIPKNunedB6
Q7d2gIwrWAeHvHec+PINV4eR0ix9GTqEU2YxVwvPDhH3yQMMNWPhZLStGcgPSk5k
UGf5zsVLrIgnzZYy7DFbKOoXhODi2QWJ8+11LWH7QZFPjjCutjaCk9kDdAFDxQqd
t4HBs1MzloW0F/Mmc+DN/F2ETuEjXoK0Mugq0SYB3SPXZIQ8zdWqFR5o9vljoy8e
wLhpaxwImZLIy5bLAz4dl4aBMUrKhTMHGXu6XItekiOW3DvnTYLowpaioct5CGst
Eaw4AwPtaT2jMB3lcqWVFKjWuZhb2J6hbXBCrYmGI/qgz5Az+p5cXK014nKCuALo
g4DG/WyZZJFUIWU378wgHurRiwnonWOTNFrtSOtQ84JqmbXYMyc/8J57wiZg0Ea4
tRvUq4DHMFev9aCdpSZlBo47Y1Da8ZbWzGXv8r5ePnLaISWrVHmDv+WpTCQ+eO71
m5xJQTLYhTa3/PLLH5K2Z7AfQWeJhXwEuudk5DCmkt0PpbatD3TnqaP6NzBtK3kQ
uA4d6dh51PJuy1iBwZ1j
=ToTm
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-a-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-hwmod
Add in most of the remaining hwmods (IP block descriptions) for the
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkE3+AAoJEMePsQ0LvSpLzrMQAJV6ie5CZTu8FC+dIVplnn5q
Tv12c1CUb1SRCxSYRFhxVDm+jL5d7sQ99C/HZ7kStz23OVn+r8OlyFmLTLk59Bkl
tf8iBEcMyaB+oMvDddYyzcetjT3gpG0yOZC7FMYkfpwCd8DM2hk+8k4JawXe8cqu
3HzDoeXynbF5QCgZpaORAZT8FH4tmTJl1XMkENIflmuwDV8QvwrKZmcJILnr2r+p
pZhCt972xWV6PZYJ0HvdjgabbQ92jyIFggqNeA/BBNoMhfTXbhUFpZE2Oy/Y5vmu
5qXR8yKFesV7jeXyiOMBzHLhMv9Rf4ivAE6u3aVmSIGrKvYTIPNEX9ric8Ryv1Um
33y6NTLv4SsTeKqmL4gCFmbkTz9aixbonThr1yr9ZCHD7jXwjLUjkxyXyjTZRAOV
BWWgMiTKxXmJ1o2AJ/Y3xEWkWsmeafSdKpEF9aPpLyX6bW5oYObAJ1KorvnUut6W
YLWVP3JOfPFpcLHLFA/wtLbk+FwyKdbkLTyP29qJDvg3mUjJG0JGRaHA20hiZIOC
zvxmq/Or7gMvDFXOY3EY97xnDLFbiM+efT/5KuTXI2sel2ojcL8uVJU6qvxGN86h
5rz+E7RXpdtYafvtF0AKdX65Ntyqpe5EUUSnQJAB1xTC9CkFlVVn21R2PO+1P0+e
xWjiHLK/+amqrZa+zkks
=NqUz
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-hwmod
Clean up various aspects of the OMAP hwmod code, which is the IP block
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
Merge reason: development work has dependency on kvm patches merged
upstream.
Conflicts:
Documentation/feature-removal-schedule.txt
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Add a skeleton hwmod for the DEBUGSS and associated interconnect data.
This is a basic set of data that will need further additions as
further DEBUGSS information becomes available.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the PRCM, CM, PRM, and related hwmod and associated interconnect
data. These IP blocks handle most of the on-chip power, reset, and clock
control.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the System Control Module hwmod and associated interconnect data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP-WP hwmod and associated interconnect data. The OCP-WP,
or OCP watchpoint, can be used to collect interconnect data and
transmit it via the STM port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the OCM RAM IP block and interconnect data. This is an oh-chip
block of SRAM connected directly to the L3 bus.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP2SCP IP block and interconnect data. The OCP2SCP can be
used in conjunction with the on-chip embedded USB PHY, associated with
the OTG controller.
Add the on-chip full-speed USB host controller IP block and
interconnect data.
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the SL2 interface IP block and interconnect data. The SL2 is related
to the IVA-HD subsystem.
Add IP block and interconnect data for the C2C ("Chip-to-chip")
interconnect. This can provide a direct system interconnect link to
other devices stacked on the OMAP package.
Add the ELM IP block and interconnect data. The ELM can be used
to locate errors in NAND flash connected to the GPMC.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the McASP hwmod and associated interconnect data. The McASP is a
general-purpose audio serial port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the Slimbus hwmods and associated interconnect data. The Slimbus
IP blocks implement a two-wire serial interface.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the GPU hwmod and associated interconnect data. The GPU is a
graphics accelerator.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the EMIF1 and 2 hwmods and associated interconnect data. The EMIFs
are SDRAM interface IP blocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the GPMC hwmod and associated interconnect data. The GPMC is a
programmable parallel-bus memory controller.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ/1-wire hwmod and associated interconnect data. The
HDQ/1-wire IP block is a low-speed serial interconnect.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add hwmod data for the OMAP4 FDIF IP block.
This patch also includes a change (originally from Fernando Guzman
Lugo <fernando.lugo@ti.com>) to set a softreset delay for the FDIF IP
block:
http://www.spinics.net/lists/arm-kernel/msg161874.html
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Acked-by: Benoît Cousson <b-cousson@ti.com>
Cc: Fernando Guzman Lugo <fernando.lugo@ti.com>
[paul@pwsan.com: rearranged to match script output; fixed FDIF end address to
match script data; wrote trivial changelog; combined the FDIF portion of
Fernando's srst_udelay patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The PRM and CM implicit clockdomains will soon be used by OMAP44xx.
So, make them common to OMAP2+ and modify the OMAP4 clockdomains code
so use of these clockdomains doesn't crash the system.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
This reverts commit 9f85550347.
Peter Zijlstra says:
| Argh, how did that ever make it upstream, please drop.
|
| Russell, please make that go away upstream.
|
| Like I said, this is both completely the wrong way to solve, and you're
| so not paying attention, see:
|
| 5fbd036b55
| 2baab4e904
| e3831edd59
|
| What's even worse:
|
| git describe --contains 9f85550347 --match "v*"
| v3.4-rc3~1^2~3
|
| that nonsense got merged long after those other commits.
Linus Walleij says:
| My bad, was because the initial patch was submitted march 9th before
| these fixes were merged:
| http://marc.info/?l=linux-arm-kernel&m=133159655513844&w=2
|
| It was pending for a while in Russell's patch tracker and I
| rebased it to -rc2 without paying enough attention to recent
| related scheduler fixes ... lesson learned.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These kconfig entries are already defined in kernel/irq/Kconfig
so select them instead of redefining them.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
vma isn't used and flush_cache_user_range isn't a standard macro that
is used on several archs with the same prototype. In fact only unicore32
has a macro with the same name (with an identical implementation and no
in-tree users).
This is a part of a patch proposed by Dima Zavin (with Message-id:
1272439931-12795-1-git-send-email-dima@android.com) that didn't get
accepted.
Cc: Dima Zavin <dima@android.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This replaces the dynamic device allocator in the ux500 machine
with the common device allocator in the bus code.
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Replace the local amba device allocator with the core code from
the bus driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Replace the local amba device allocator with the core code from
the bus driver.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
N800 logs this message on boot:
[ 0.182281] omap_hwmod: iva: cannot be enabled for reset (3)
Fix by creating basic IVA1 and DSP hwmods for OMAP2420, and a basic IVA2
hwmod for OMAP2430. There is still more information to be added, but
this should resolve the immediate issue.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The IVA hwmod data is missing some fields that cause the following
warning on boot:
[ 0.118011] omap_hwmod: iva: cannot be enabled for reset (3)
Fix by encoding the IP block's main functional clock, reset lines, and
clockdomain.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP3 hwmod data listed iva2_ck as an interface clock between the
IVA and L3. This is incorrect. iva2_ck is not an interface clock.
Since it cannot auto-idle, specifying it here prevents the IVA and at
least one of the CORE clockdomains from going idle, which causes PM
problems such as these upon system suspend:
[ 70.626129] Powerdomain (iva2_pwrdm) didn't enter target state 1
[ 70.626190] Powerdomain (core_pwrdm) didn't enter target state 1
Fix by specifying the actual interface clock in the hwmod data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Several struct omap_hwmod_ocp_if records can be shared between OMAP2420
and OMAP2430. Move these shared records out of the chip-specific files
into mach-omap2/omap_hwmod_2xxx_interconnect_data.c. This should save some
memory and source lines, at the cost of readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
After the link registration conversion, it's much easier to share some
hwmod data between OMAP2420 and 2430. Move the shareable data into a
common file. This should save some memory and lines of source, at the
cost of readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Reorganize the hwmod data to declare the IP blocks first and the
interconnects second. This allows us to remove the forward
declarations, which this patch also does. Saves some lines of source
data. While here, take the opportunity to synchronize the order of
the OMAP44xx hwmod data with the autogenerator output -- it's slightly
different due to past mismerges -- and fix a few minor typos and
whitespace problems in the files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Now that the data has been converted to use interface registration, we
can remove the (now unused) direct hwmod registration code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Register interconnect links between IP blocks, rather than the IP
blocks themselves. (The IP blocks will be registered as a side-effect
of registering the links.)
The objective is to reduce the number of lines of static data and
facilitate the sharing of IP block data between different SoCs. These
objectives come at the penalty of increased boot time due to increased
computation.
While here, fix a few whitespace problems and inaccurate variable names.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Add support for direct IP block interconnect ("link") registration to
the hwmod code via a new function, omap_hwmod_register_links(). This
will replace direct registration of hwmods, and a subsequent patch
will remove omap_hwmod_register().
This change will allow a subsequent patch to remove the hwmod data
link arrays. This will reduce the size of the hwmod static data and
also make it easier to generate the data files. It will also make it
possible to share some of the struct omap_hwmod records across
multiple SoCs, since the link array pointers will be removed from the
struct omap_hwmod.
The downside is that boot time will increase. Minimizing boot time
was the reason why the link arrays were originally introduced.
Removing them will require extra computation during boot to allocate
memory and associate IP blocks with their interconnects. However,
since the current kernel development focus is on reducing the number
of lines in arch/arm/mach-omap2/, boot time impact is now seemingly
considered a lower priority.
This patch contains additional complexity to reduce the number of
memory allocations required for this change. This reduces the boot
time impact: total hwmod link registration time was ~ 2655
microseconds with a simple allocation strategy, but is now ~ 549
microseconds[1] with the approach taken by this patch.
1. Measured on a BeagleBoard 35xx @ 500MHz MPU/333 MHz CORE, average
of 7 samples. Total uncertainty is +/- 61 microseconds.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
An IP block's MPU interface port only needs to be found once. The result
can be cached to speed further lookups. This patch consolidates these
two steps into a single function.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
To reduce the number of lines of data in the OMAP portion of the Linux
code base, subsequent patches will remove the lists of hwmod
interconnect links from the static hwmod data. These lists will be
built dynamically during boot. To ease this transition, this patch
centralizes the way that interconnect links are iterated into a single
function, _fetch_next_ocp_if().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Most IP blocks on the OMAP SoC have an interconnect link that is
intended to be used by the MPU to communicate with the IP block.
Several parts of the hwmod code need to be able to identify this link.
Currently, this is open-coded. However, future patches will change
the way that interconnect links are represented and will make
identifying the link more complex. So to avoid code duplication, this
patch centralizes the MPU port link identification code into a new
function, _find_mpu_rt_port().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Extend the OCP_* register offsets in the struct
omap_hwmod_class_sysconfig to 32 bits. This is required to add the
OMAP4+ GPU hwmod, which uses OCP_* register offsets larger than 16
bits.
Another possible solution may be to simply add a single 16 bit offset
field in this structure, and to add code to factor that offset into
all OCP_* register accesses. This would save some memory, since
almost no modules need 32 bit offsets.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Some hwmods were commented out from the OMAP4 data, under the theory
that they shouldn't be added until drivers were ready. But part of
the utility of the hwmod code is that it can reset and properly
initialize IP blocks that have no drivers associated with them.
Rather than commenting the links in the future hwmod data conversion
patches, discussing this with Benoit, it seems best to simply
uncomment them now.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
One of the OMAP4 links was missing OCP_USER flags, since it was only
used by the DSP initiator, and we did not have an OCP_USER_DSP flag.
Future patches will switch the hwmod code and data to register
interfaces, rather than hwmods, and it will be mandatory for all
interfaces to have at least one user bit set. This patch resolves the
issue by adding OCP_USER_DSP and marking the DSP-IVA interface
appropriately.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Commit 407a6888f7 ("OMAP4: hwmod data:
Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU") adds a
hwmod for the bandgap die temperature sensor IP block. This IP block
has no interconnect port or firewall region, nor does it have an
independent register space or OCP control registers. Its registers
are embedded in the System Control Module (SCM) IP block. So it
appears that the bandgap device should be created by the SCM driver.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
GPTIMER12 is attached to the L4 SEC interconnect, not directly to L4 WKUP.
Add the L4 SEC interconnect and attach GPTIMER12 to it.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP3 hwmod data was missing a DSS->L3 interconnect link for the
OMAP3430 ES1 DSS hwmod. Since the hwmod code and data is being modified
to register interfaces rather than hwmods, this would result in the DSS hwmod
not being registered correctly on OMAP3430ES1.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Commit a52e2ab66d ("ARM: OMAP3: hwmod
data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1")
didn't link the MMC hwmods to the interconnects correctly. Future
patches will register hwmods by interface, so if this is not fixed,
the MMC IP blocks won't be registered. Update the interface data
records to point to the correct IP blocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Some of the 2xxx and 3xxx hwmod data files use the old naming style
for hwmods, ending in a "_hwmod". These names are used by the OMAP
integration code to map hwmods to platform_devices, so they need to be
consistent, or the platform_devices won't be created. Remove the
_hwmod suffix to conform with the rest of the OMAP SoC data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/timer.c pokes around inside the hwmod data
structures. Since the hwmod data structures are about to change, this
code will break. This patch modifies the timer code to use
recently-added hwmod functions instead.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
The timer integration code pokes around in hwmod data structures.
Those data structures are about to change. Define a function,
omap_hwmod_get_resource_byname(), for the timer integration code to
use instead.
The original patch has been changed to use struct resource by Tony's
request, although the caller of this function should not be a driver._
Platform drivers should get their data through the regular platform_*
functions; DT drivers through the appropriate of_* functions. This a
function is only for use by OMAP core code in arch/arm/*omap*.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
A subsequent patch will need to know the struct omap_hwmod_addr_space
record corresponding to the module's register target, used by the MPU.
So, convert _find_mpu_rt_base() into _find_mpu_rt_addr_space(). Then
modify its sole current user, _populate_mpu_rt_base(), to extract the
MPU RT base address itself from the struct omap_hwmod_addr_space record.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Change the way that hardreset lines are handled by the hwmod code.
Hardreset lines are generally associated with initiator IP blocks.
Prior to this change, the hwmod code expected to control hardreset
lines itself, asserting them on shutdown and deasserting them upon
enable. But driver authors inside TI have commented to us that their
drivers require direct control over these lines. Unfortunately, these
drivers haven't been posted publicly yet, so it's hard to determine
exactly what is needed, a priori. This change attempts to set forth
some reasonable semantics that should be an improvement over the
current code.
The semantics implemented by this patch are as follows:
- If the hwmod is not marked with HWMOD_INIT_NO_RESET, then assert all
associated hardreset lines during IP block setup. This is intended
to place the IP blocks into a known state that will not interfere
with other devices during kernel boot.
- IP blocks with hardreset lines will not be automatically enabled or
idled during setup. Instead, they will be left in the INITIALIZED
state.
- When the hwmod code is asked to enable, idle, or shutdown an IP
block with asserted hardreset lines, the hwmod code will do nothing.
The driver integration code must do the remaining work needed to
control these IP blocks. Once this driver integration code is posted
to the lists, hopefully we can consolidate it and move it inside the
hwmod code.
Custom reset functions for IP blocks with hardreset lines still should
be supported and are strongly endorsed. It is intended that every
subsystem with hardreset lines should have a custom reset function
that can place their subsystem into quiescent idle with the hardreset
lines deasserted.
This reverts most of commit 5365efbe29
("OMAP: hwmod: Add hardreset management support"). Later code
reorganizations caused the sequencing of the code from this patch to
be changed, anyway.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Reorganize the code involved in resetting and configuring an IP block
to make it easier to read and maintain. This involves improving
documentation, splitting some large functions up into smaller ones to
better conform with Documentation/CodingStyle, and removing some
unnecessary code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Reorganize the code involved in initializing the internal data for
each hwmod to make it easier to read and maintain. This involves
improving documentation and removing some duplicated and unnecessary
code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Revise the IP block reset process. This patch ensures that the
OCP_SYSCONFIG registers are reloaded after a custom reset. Since
OCP_SYSCONFIG bits are cleared during reset, they should be
reprogrammed unless the IP block is being left in reset. (The only IP
blocks that are left in reset are IP blocks with hardreset lines and
no custom reset function.) If the IP block is left in reset, then it
is inaccessible to the MPU, and an access to the OCP_SYSCONFIG
register will cause an abort.
This version incorporates comments from Omar Ramirez Luna
<omar.ramirez@ti.com> to skip the OCP_SYSCONFIG access after asserting
hardreset lines. This allows the MMU (IOMMU) IP block, which has
both hardreset lines and an OCP_SYSCONFIG register.
Also, ignore _ocp_softreset() errors if the IP block doesn't include a
softreset bit. This is needed since a subsequent patch will start
taking the return value of the _reset() function seriously.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
We experienced some issues while compiling some drivers as modules: Joachim has
corrected several of them. We may reduce this number of exported values by
reworking some drivers, in the future.
Some drivers are also modified here, I would like to keep them in the series
as the modifications are really related with our recent move to irqdomains or
simply related with compiler annotations.
I keep dmaengine Kconfig modification in this "fixes" series. The DMA
driver will not be available for 9x5 SoC family otherwise.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJPjYSrAAoJEAf03oE53VmQC4gH/3iCpaf1A5tJoGjiPnTetHXK
ziu0f84/sPoxh/l9zXklVaF6AsoHzZzxFfQ1cSh1yHQPjh4pJZSQ68nioNwhXeAq
1uwQjfbbpcIOved/sYzKLBY1v8rnFISXm+yHIYSIcFcZmSWn7eVzYYWb3vilquK/
nzr+2f0Jz2xNIrpfC95ogct7LHrtMEPgYgKpUUQNT3+eE6GwqRqJby5fZQMHNuqV
ECzWPCalxo4C0qW0EXuMMAukdyCo5YKoKNt10P2klyNL33Z1cIEPGkKdcIJP5yiJ
y4Qs1e5xlQeMW0SlEImoRPEObOI/mn5PFxs6nwtDlE6JEW0npjHjB9g2jTi0tGE=
=R4q6
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
Here is another fixes series for AT91 designed for 3.4-rc.
We experienced some issues while compiling some drivers as modules: Joachim has
corrected several of them. We may reduce this number of exported values by
reworking some drivers, in the future.
Some drivers are also modified here, I would like to keep them in the series
as the modifications are really related with our recent move to irqdomains or
simply related with compiler annotations.
I keep dmaengine Kconfig modification in this "fixes" series. The DMA
driver will not be available for 9x5 SoC family otherwise.
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
dmaengine: Kconfig: fix Atmel at_hdmac entry
USB: gadget/at91_udc: add gpio_to_irq() function to vbus interrupt
USB: ohci-at91: change annotations for probe/remove functions
leds-atmel-pwm.c: Make pwmled_probe() __devinit
ARM: at91: fix at91sam9261ek Ethernet dm9000 irq
ARM: at91: fix rm9200ek flash size
ARM: at91: remove empty at91_init_serial function
ARM: at91: fix typo in at91_pmc_base assembly declaration
ARM: at91: Export at91_matrix_base
ARM: at91: Export at91_pmc_base
ARM: at91: Export at91_ramc_base
ARM: at91: Export at91_st_base
* 'fixes-for-arm-soc-20120416' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: update defconfig
ARM: ux500: Fix unmet direct dependency
ARM: ux500: wake secondary cpu via resched
Revert one softreset regression and few other minor fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPje8aAAoJEBvUPslcq6VzBUwP/A+wAxBJFpp5Og8nv6A3dHIC
Wf/kSMk5wx5Qtyi1Q6ySOZ/QyDbE5RJIXhqRfE5fRru7xiVRaNCkvDl8Nf3Z8I9F
Yg9TtWXlO3zK2k9eGYflJASt+Rgms5qZ2VK9wT2sH/SNY5XgJuTdhzVdvJGWb9d1
CcKpOZU/WHZIfCn05PfWOGlwI//hUqb0HMTBsAOFFYfSdGcSDOYPTzQupCooaLuD
seg3W2ZVHGLyNrw7kUrEbYd41TbbWo1pZq5JE56qjMS6x+5rgyggum+kCVCrCXPy
Y9KCedbmAvZGSerEgyNGuK/iMwKNHjacs1lqm52Z66qOt14RmdEVzQ1iVPnEa34Z
PXFXFAANFUzzab0gaP2CuZzoQCwjB0atpnZZgmo6zJ0pkY+AnPQjHby+YXZj1XyU
d/anseZ9UFZ6zPWP0B3WugbuqzH4S359THCGzNvYa04BgeBR8Bi5yaeO0J1CE7Hy
YbmDT7n8hn4K4b+ETKX785BoNfmAytfyJK2Oir0cTyKiqF+49mtWerSP0sY4NAAq
r5Uuotj27idJkXHzASrEYXGKb4Hv8AwnCsRvSGl7b9JU86lPiP7JCxpOGdnNqBzz
jG71RjNMRh0Tyi9PjmXn3enq+sxWJmxx7NOhzBUlzInuUGWxBcedUHHL3g1NW9+2
wTO1I4SUzQDXU+hJyQoY
=WQ2B
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fix regression for bad uart muxing and oops when PM is not set.
Revert one softreset regression and few other minor fixes.
* tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: DMTIMER: fix broken timer clock source selection
ARM: OMAP: serial: Fix the ocp smart idlemode handling bug
ARM: OMAP2+: UART: Fix incorrect population of default uart pads
ARM: OMAP: sram: fix BUG in dpll code for !PM case
ARM: OMAP2/3: VENC hwmods: Remove OCPIF_SWSUP_IDLE flag from VENC slave interface
ARM: OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status"
ARM: OMAP2+: hwmod: add softreset delay field and OMAP4 data
ARM: OMAP1: mux: add missing include
This error appeared in the bcmring_defconfig build:
CC arch/arm/mach-bcmring/core.o
arch/arm/mach-bcmring/core.c:55: error: macro "AMBA_APB_DEVICE" requires 6 arguments, but only 5 given
arch/arm/mach-bcmring/core.c:55: warning: type defaults to 'int' in declaration of 'AMBA_APB_DEVICE'
arch/arm/mach-bcmring/core.c:56: error: macro "AMBA_APB_DEVICE" requires 6 arguments, but only 5 given
arch/arm/mach-bcmring/core.c:56: warning: type defaults to 'int' in declaration of 'AMBA_APB_DEVICE'
arch/arm/mach-bcmring/core.c:134: error: 'uartA_device' undeclared here (not in a function)
arch/arm/mach-bcmring/core.c:135: error: 'uartB_device' undeclared here (not in a function)
make[2]: *** [arch/arm/mach-bcmring/core.o] Error 1
It appeared as of commit 8ede1ae65e
"ARM: amba: bcmring: use common amba device initializers"
Note that in include/linux/amba/bus.h we have:
#define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) ...
There is an a --> A case error in the busid and a missing zero
placeholder for the id field.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
[olof: reworded patch subject]
Signed-off-by: Olof Johansson <olof@lixom.net>
Remove the pseudo-hwmods associated with hardreset lines from the
OMAP4 data file. Future patches will convert this data to register
hwmods by interfaces, rather than registering hwmods directly. The
pseudo-hwmods aren't associated with any interfaces, so this will
create a problem.
After this change, the hwmod code will reset processor IPs at the
hwmod level, rather than by individual hardreset lines. So, for
example, if the IVA device driver code wishes to place one of the
sequencer cores into reset, while leaving the other active, it must do
so itself by calling the appropriate PRM functions.
This patch will cause a change in the initialization behavior of the
DSP, IVA, and IPU.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Parts of the hwmod code test to see if a module has one and only one
hardreset line before taking an action. It seems more appropriate
to control all hardreset lines associated with a hwmod, not just one.
It so happens that with the current hwmod data, this patch will not
change any behavior, since hwmods with hardreset lines have only one
hardreset line associated with them, and 'pseudo-hwmods' are used to
handle the other hardreset lines. But future hwmod data patches to
remove the pseudo-hwmods will change this.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
The "KT" serial port has another use case for a "received break" quirk,
so before adding another special case to the 8250 core take this
opportunity to push such quirks out of the core and into a uart_port op.
Stephen says:
"If the callback function is to no longer live in 8250.c itself,
arch/arm/mach-tegra/devices.c isn't logically a good place to put it,
and that file will be going away once we get rid of all the board files
and move solely to device tree."
...so since 8250_pci.c houses all the quirks for pci serial devices this
quirk is similarly housed in of_serial.c. Once the open firmware
conversion completes the infrastructure details
(include/linux/of_serial.h, and the export) can all be removed to make
this self contained to of_serial.c.
Cc: Nhan H Mai <nhan.h.mai@intel.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
[stephen: kill CONFIG_SERIAL_TEGRA in favor just using CONFIG_ARCH_TEGRA]
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sudhakar Mamillapalli <sudhakar@fb.com>
Reported-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Currently the errata is populated based on cpu checks this can
be removed and replaced with module version check of uart ip block.
MVR reg is provided within the uart reg map use the same
to populate the errata and thus now errata population and handling
can be managed within the driver itself.
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
spi_board_info is not modified in any of the spi registeration
functions and passed along as-is to the generic SPI layer.
Mark spi_board_info arguments as const to signal this.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[nsekhar@ti.com: extended for dm365 and dm355]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
