Add definition for high-speed MMC/SD device and add to SMDK2443
device list.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reduce the Twrph0 timing slightly to fit on an SMDK2443. This
should still produce valid timings for the NAND devices as it
is still over the smallest device fitted to these boards.
Signed-off-by: Ben Dooks <(address hidden)>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Change the name of the S3C2443_SDI1 to S3C2443_HSMMC to ensure
that it is correctly identified.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the clocks missing form HCLKCON back into the set of
clocks being registered at initalisation time.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Include <linux/sysdev.h> in any machines that use the PM functions
which require struct sys_device.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We don't need valid_phys_addr_range() or valid_mmap_phys_addr_range()
for the !CONFIG_MMU case.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix the formating of the "CPU part" field to be consistent with
the other fields for pre-ARM7 parts. One tab to many for them to
all line up.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Presently, we check for the minimum ARM architecture that we're
building for to determine whether we need ASID support. This is
wrong - if we're going to support a range of CPUs which include
ARMv6 or higher, we need the ASID.
Convert the checks to use a new configuration symbol, and arrange
for ARMv6 and higher CPU entries to select it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If DEBUG_LL is enabled, we want to use get_irq_regs(), but this
causes a build error due to the inline function missing. Add
the necessary header file.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
No need for the cascade irq function to have a "fastcall" annotation.
Fix the range checking for valid IRQ numbers - comparing the value
returned by the GIC with NR_IRQS is meaningless since we translate
the GIC irq number to a Linux IRQ number afterwards.
Check the GIC returned IRQ number is within limits first, then add
the IRQ offset, and only then compare with NR_IRQS.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-omap1/Kconfig:41:warning: 'select' used by config
symbol 'MACH_OMAP_H3' refers to undefined symbol 'GPIOEXPANDER_OMAP'
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add utimensat, signalfd, timerfd, eventfd syscalls. Add ignore
defines for sync_file_range and fadvise64_64 which we implement
differently.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Change the SPI Channel 1 register offset in s3c_spi1_resource[], and
s3c2412_dma_mappings[]. Offset has to be 0x100 in s3c2412/13's case.
Also, total SPI memory resource size changed to 0x24 for s3c2412/13.
Signed-off-by: Sandeep Patil <psandeep.s@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
WARNING: arch/arm/mach-iop13xx/built-in.o - Section mismatch: reference to
.init.text:iop13xx_pcie_map_irq from .text between 'iop13xx_pci_setup' (at
offset 0x7fc) and 'iop13xx_map_pci_memory'
While fixing this warning I also recalled Adrian Bunk's recommendation to
not use inline in .c files, as 'iop13xx_map_pci_memory' is needlessly
inlined.
Removing 'inline' uncovered some dead code so that is cleaned up as well.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
updates iop13xx msi support for a msi api change in 2.6.22
rev7:
* update for Michael Ellerman's "MSI: arch must connect the irq and the
msi_desc" patch
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Integrator/CP SMP platform support was never fully merged, and now
it's causing build breakage. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A fix for a really stupid typo in the KS8695 serial driver.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Selects GENERIC_GPIO for ARCH_IXP4XX in Kconfig.
IXP4XX has generic GPIO support; however, ARCH_IXP4XX
Kconfig entry currently does not select GENERIC_GPIO like other
arch entries.
Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix compile warnings from sharpsl_pm.c. Attribute registration failure
doesn't stop the driver working so just warn about it.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
__NR_syscall_max is done in x86_64 asm-offsets; do an equivalent in
uml kern_constants.h
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: Jeff Dike <jdike@addtoit.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
it depends on elimination of unreachable branches in switch (by object
size), so we must declare it always_inline
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
.. because video-buf.c requires PCI, and VIDEO_EM28XX selects it.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
stuff that does select USB should depend on USB_ARCH_HAS_HCD, or we'll
end up with unbuildable configs.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
need it for page_private(), not all targets have it pulled indirectly
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6:
Use menuconfig objects: IDE
sl82c105: Switch to ref counting API
ide: remove ide_use_dma()
ide: add missing validity checks for identify words 62 and 63
ide: remove ide_dma_enable()
sl82c105: add speedproc() method and MWDMA0/1 support
cs5530/sc1200: add ->speedproc support
cs5530/sc1200: DMA support cleanup
ide: use ide_tune_dma() part #2
cs5530/sc1200: add ->udma_filter methods
ide: always disable DMA before tuning it
pdc202xx_new: use ide_tune_dma()
alim15x3: use ide_tune_dma()
sis5513: PIO mode setup fixes
serverworks: PIO mode setup fixes
pdc202xx_old: rewrite mode programming code (v2)
It's not necessarily a very sane configuration, but people running "make
randconfig" noticed it wouldn't compile. This fixes some obvious
problems in discontig.c to allow a clean compile.
Acked-by: andrew hendry <andrew.hendry@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Use menuconfigs instead of menus, so the whole menu can be disabled at once
instead of going through all options.
Signed-off-by: Jan Engelhardt <jengelh@gmx.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Not sure how this one got missed in the great purge some time ago but it did.
Signed-off-by: Alan Cox <alan@redhat.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
ide_use_dma() duplicates a lot of ide_max_dma_mode() functionality
and as all users of ide_use_dma() were converted to use ide_tune_dma()
now it is possible to add missing checks to ide_tune_dma() and remove
ide_use_dma() completely, so do it.
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* check ->speedproc return value in ide_tune_dma()
* use ide_tune_dma() in cmd64x/cs5530/sc1200/siimage/sl82c105/scc_pata drivers
* remove no longer needed ide_dma_enable()
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Add the speedproc() method for setting transfer modes, modify config_for_dma()
to call it and use ide_max_dma_mode() to select the best DMA mode.
Add support for the multiword DMA modes 0 and 1, using the upper half of the
'drive_data' field to store the DMA timings to program into the drive control
register when DMA is turned on for real.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* add {cs5530,sc1200}_tunepio() for programming PIO timings
* add {cs5530,sc1200}_tune_chipset() (->speedproc method) for setting
transfer mode and convert {cs5530,sc1200}_config_dma() to use it
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
sc1200.c:
* remove open-coded variant of ide_dma_host_off() (== ->dma_host_off),
it is not needed because ->dma_off_quietly calls ->dma_host_off
* use ->dma_host_on (== ide_dma_host_on() for this driver) instead of
open-coded variant, call it from the users of sc1200_config_dma2()
[ there is no need to call ->dma_host_on in sc1200_config_dma() because
core code takes care of calling ->ide_dma_on on successful execution
of ->ide_dma_check ]
* add comment about ->tuneproc interface abuse
cs5530.c/sc1200.c:
* core code takes care of calling ->dma_off_quietly before calling
->ide_dma_check so there is no need to call it in ->ide_dma_check methods
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
CS5530/SC1200 specifies that two drives on the same cable cannot mix
UDMA/MDMA. Add {cs5530,sc1200}_udma_filter() to handle this. This also
makes it possible to remove open-coded best DMA mode selection and use
standard ide_use_dma()/ide_max_dma_mode() helpers. While at it bump
version numbers.
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
ide_start_power_step() and set_using_dma() were missing ->dma_off_quietly
call (comment in probe_hwif() states that DMA should be always cleared before
tuning is attempted). Fix it.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* remove code enabling IORDY and prefetch from config_chipset_for_dma(),
as the comment states it has no real effect because these settings are
overriden when the PIO mode is set (and for this driver ->autotune == 1
so PIO mode is always programmed)
* use ide_tune_dma() in pdcnew_config_drive_xfer_rate() and remove no longer
needed config_chipset_for_dma()
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Use ide_tune_dma() in ali15x3_config_drive_for_dma() and remove all the open
coded DMA tuning code and also config_chipset_for_dma(). Set ->atapi_dma flag
correctly in init_hwif_common_ali15x3() so ide_tune_dma() can take care of
checking if ATAPI DMA is allowed and remove open coded ATAPI DMA check from
ali15x3_config_drive_for_dma().
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
to program PIO5 by config_art_rwp_pio() could result in incorrect PIO
timings being programmed and possibly the data corruption (for < ATA100
family chipsets PIO0 timings were used, for ATA100 and ATA100a - the random
content of test1 variable was used, for ATA133 - MWDMA0 timings were used)
* BUG() in sis5513_tune_chipset() if somebody tries to force unsupported PIO5,
also cleanup this function a bit while at it
* add comment about PIO0 timings for < ATA100 family chipsets
* remove open-coded best PIO mode selection from config_art_rwp_pio(),
it contained numerous bugs:
- it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
before using them
- it tried to found out maximum PIO mode basing on minimum IORDY cycle time
(moreover wrong cycle times were used for PIO1/5)
- it was overriding PIO blacklist and conservative PIO "downgrade" done
by ide_get_best_pio_mode()
* use sis5513_tune_drive() instead of config_art_rwp_pio()
in sis5513_config_xfer_rate() so the correct PIO mode is also set
on drive even if the device is not IORDY/DMA capable
* config_art_rwp_pio() was always setting the best possible mode and not
the wanted one - fix it and move ide_get_best_pio_mode() call to
config_chipset_for_pio()
* don't use ide_find_best_mode() in config_chipset_for_pio(), it was being
overriden by config_art_rwp_pio() for the host timings anyway + we need to
set the same PIO mode on the device and the host
* pass correct "pio" argument (255 instead of 5) to sis5513_tune_drive() call
in sis5513_config_xfer_rate() so the best PIO mode is set on the drive
and not PIO4
* rename sis5513_tune_drive() to sis5513_tuneproc()
and config_chipset_for_pio() to sis5513_tune_driver()
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
to program PIO5 by svwks_tune_chipset() could result in incorrect PIO
timings being programmed and possibly the data corruption (it seems that
the minimum possible values were used but I lack the datasheets to be sure)
* select best PIO mode in svwks_tune_drive() and not in svwks_tune_chipset()
when doing PIO autotuning (pio == 255)
* don't try to tune PIO in config_chipset_for_dma() as ide_dma_enable() could
return 1 if DMA was previously enabled (svwks_config_drive_xfer_rate()
takes care of PIO tuning if no suitable DMA mode is found)
* remove config_chipset_for_pio() and use svwks_tune_drive() instead,
config_chipset_for_pio() contained numerous bugs when selecting PIO mode
(luckily it was only used for devices limited to PIO by capabilities/BIOS):
- it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
before using them
- it tried to found out maximum PIO mode basing on minimum IORDY cycle time
(moreover wrong cycle times were used for PIO0/1/5)
- it was overriding PIO blacklist and conservative PIO "downgrade" done
by ide_get_best_pio_mode()
- if the max drive PIO was PIO5 then XFER_PIO_0/XFER_PIO_SLOW was selected
(XFER_PIO_SLOW is not supported by svwks_tune_chipset() so the result
was the same as if using XFER_PIO_5 => wrong PIO timings were set)
- it was overriding drive->current_speed
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This patch is based on the documentation (I would like to thank Promise
for it) and also partially on the older vendor driver.
Rewrite mode programming code:
* disable 66MHz clock in pdc202xx_tune_chipset() so it is correctly disabled
even if both devices on the channel are not DMA capable and after reset
* enable/disable IORDY and PREFETCH bits in pdc202xx_tune_chipset()
as they need to be setup correctly also for PIO only devices, plus IORDY
wasn't disabled for non-IORDY devices and PREFETCH wasn't disabled for
ATAPI devices
* remove dead code for setting SYNC_ERDDY_EN bits from config_chipset_for_dma()
(driver sets ->autotune to 1 so PIO modes are always programmed => lower
nibble of register A never equals 4 => "chipset_is_set" is always true)
* enable PIO mode programming for all ATAPI devices
(it was limited to ->media == ide_cdrom devices)
* remove extra reads of registers A/B/C, don't read register D et all
* do clearing / programming of registers A/B/C in one go
(gets rid of extra PCI config space read/write cycle)
* set initial values of drive_conf/AP/BP/CP variables to zero
(paranoia for the case when PCI reads fail)
* remove XFER_UDMA6 to XFER_UDMA5 remapping case - it can't happen
(ide_rate_filter() takes care of it)
* fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)
* fix bitmasks for clearing bits of register B:
- when programming DMA mode bit 0x10 of register B was cleared which
resulted in overclocked PIO timing setting (iff PIO0 was used)
- when programming PIO mode bits 0x18 weren't cleared so suboptimal
timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)
* add FIXME comment about missing locking for 66MHz clock register
Also while at it:
* remove unused defines
* do a few cosmetic / CodingStyle fixes
* bump driver version
v2:
* in pdc202xx_tune_chipset() the old content of drive configuration
registers is used only by the debugging code so cover "drive_conf"
PCI registers read by #if PDC202XX_DEBUG_DRIVE_INFO
(Noticed by Sergei Shtylyov)
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
