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311379 commits

Author SHA1 Message Date
Paulo Zanoni
40579abed0 drm/i915: don't ironlake_init_pch_refclk() on LPT
This function is used to set the PCH_DREF_CONTROL register, which does
not exist on LPT anymore.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:06 +02:00
Paulo Zanoni
45e6e3a1cd drm/i915: get rid of dev_priv->info->has_pch_split
Previously we had has_pch_split to tell us whether we had a PCH or not
and we also had dev_priv->pch_type to tell us which kind of PCH it
was, but it could only be used if we were 100% sure we did have a PCH.
Now that PCH_NONE was added to dev_priv->pch_type we don't need
has_pch_split anymore: we can just check for pch_type != PCH_NONE.

The HAS_PCH_{IBX,CPT,LPT} macros use dev_priv->pch_type, so they can
only be called after intel_detect_pch. The HAS_PCH_SPLIT macro looks
at dev_priv->info->has_pch_split, which is available earlier.

Since the goal is to implement HAS_PCH_SPLIT using dev_priv->pch_type
instead of dev_priv->info->has_pch_split, we need to make sure that
intel_detect_pch is called before any calls to HAS_PCH_SPLIT are made.
So we moved the intel_detect_pch call to an earlier stage.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:05 +02:00
Paulo Zanoni
f035083055 drm/i915: add PCH_NONE to enum intel_pch
And rely on the fact that it's 0 to assume that machines without a PCH
will have PCH_NONE as dev_priv->pch_type.

Just today I finally realized that HAS_PCH_IBX is true for machines
without a PCH. IMHO this is totally counter-intuitive and I don't
think it's a good idea to assume that we're going to check for
HAS_PCH_IBX only after we check for HAS_PCH_SPLIT.

I believe that in the future we'll have more PCH types and checks
like:

    if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))

will become more and more common. There's a good chance that we may
break non-PCH machines by adding these checks in code that runs on all
machines. I also believe that the HAS_PCH_SPLIT check will become less
common as we add more and more different PCH types. We'll probably
start replacing checks like:

    if (HAS_PCH_SPLIT(dev))
        foo();
    else
        bar();

with:

    if (HAS_PCH_NEW(dev))
        baz();
    else if (HAS_PCH_OLD(dev) || HAS_PCH_IBX(dev))
        foo();
    else
        bar();

and this may break gen 2/3/4.

As far as we have investigated, this patch will affect the behavior of
intel_hdmi_dpms and intel_dp_link_down on gen 4. In both functions the
code inside the HAS_PCH_IBX check is for IBX-specific workarounds, so
we should be safe. If we start bisecting gen 2/3/4 bugs to this commit
we should consider replacing the HAS_PCH_IBX checks with something
else.

V2: Improve commit message, list possible side effects and solution.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:05 +02:00
Jesse Barnes
2514bc510d drm/i915: prefer wide & slow to fast & narrow in DP configs
High frequency link configurations have the potential to cause trouble
with long and/or cheap cables, so prefer slow and wide configurations
instead.  This patch has the potential to cause trouble for eDP
configurations that lie about available lanes, so if we run into that we
can make it conditional on eDP.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45801
Tested-by: peter@colberg.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:05 +02:00
Daniel Vetter
930ebb4624 drm/i915: fix up ilk rc6 disabling confusion
While creating the new enable/disable_gt_powersave functions in

commit 8090c6b9da
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sun Jun 24 16:42:32 2012 +0200

    drm/i915: wrap up gt powersave enabling functions

I've botched up the handling of ironlake_disable_rc6. Fix this up by
calling it at the right place. Note though that ironlake_disable_rc6
does a bit more than just disabling rc6 - it also tears down all the
allocated context objects.

Hence we need to move intel_teardown_rc6 out and directly call it from
intel_modeset_cleanup.

Also properly mark ironlake_enable_rc6 as static and kill the un-used
declaration in i915_drv.h.

Note: In review a question popped out why disable_rc6 also tears down
the backing object and why we should move that out - it's simply for
consistency with gen6+ rps code, which does it that way.

Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:04 +02:00
Eugeni Dodonov
6590190d12 drm/i915: move force wake support into intel_pm
This commit moves force wake support routines into intel_pm modules, and
exports the gen6_gt_check_fifodbg routine (used in I915_READ).

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:04 +02:00
Eugeni Dodonov
1544d9d573 drm/i915: enable RC6 workaround on Haswell
For Haswell, on some of the early hardware revisions, it is possible to
run into issues when RC6 state is enabled and when pipes change state.

v2: add comment saying that this is for early revisions only.

v3: beautify as suggested by Daniel Vetter.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:03 +02:00
Eugeni Dodonov
cad2a2d776 drm/i915: introduce haswell_init_clock_gating
This is based on Ivy Bridge clock gating for now, but is subject to
changes in the future.

Note: Compared to the ivb clock gating this drops the the IDICOS
medium uncore sharing tuned in

commit 208482232d
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Fri May 4 18:58:59 2012 -0700

    drm/i915: set IDICOS to medium uncore resources

Eugeni wants to benchmark the effect of this first.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
[danvet: added note]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:03 +02:00
Eugeni Dodonov
8850948450 drm/i915: disable RC6 when disabling rps
We weren't disabling RC6 bits when bringing down RPS.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:02 +02:00
Eugeni Dodonov
4a637c2c83 drm/i915: enable RC6 by default on Haswell
It should be working so let's turn it on by default and catch any possible
issues faster.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:02 +02:00
Eugeni Dodonov
7cf50fc8d7 drm/i915: slightly improve gt enable/disable routines
Just a cosmetic change to simplify the if statement.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:56:02 +02:00
Eugeni Dodonov
5a7dc92a0b drm/i915: add RPS configuration for Haswell
Most of the RPS and RC6 enabling functionality is similar to what we had
on Gen6/Gen7, so we preserve most of the registers.

Note that Haswell only has RC6, so account for that as well. As suggested
by Daniel Vetter, to reduce the amount of changes in the patch, we still
write the RC6p/RC6pp thresholds, but those are ignored on Haswell.

Note: Some discussion about the nature of the new tuning constants
popped up in review - the answer is that we don't know why they've
changed, but the guide from VPG with the magic numbers simply has
different values now.

v2: Squash fix for ?: vs | operation precende bug into this patch.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Added note to commit message. Squashed fix.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-05 09:55:16 +02:00
Eugeni Dodonov
e7911c48a0 drm/i915: support Haswell force waking
There is a different ACK register for force wake on Haswell, so account
for that.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-03 22:15:21 +02:00
Chris Wilson
c4de7b0ffd drm/i915: Implement w/a for sporadic read failures on waking from rc6
As a w/a to prevent reads sporadically returning 0, we need to wait for
the GT thread to return to TC0 before proceeding to read the registers.

v2: adapt for Haswell changes (Eugeni).

v3: use wait_for_atomic_us for thread status polling.

v3: *really* use wait_for_atomic for polling.

References: https://bugs.freedesktop.org/show_bug.cgi?id=50243
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-03 22:09:21 +02:00
Chris Wilson
990bbdadab drm/i915: Group the GT routines together in both code and vtable
Tidy up the routines for interacting with the GT (in particular the
forcewake dance) which are scattered throughout the code in a single
structure.

v2: use wait_for_atomic for polling.

v3: *really* use wait_for_atomic for polling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-03 22:08:46 +02:00
Ben Widawsky
146937e582 drm/i915: linuxify create_hw_context()
Daniel complained about this on initial review, but he graciously moved
the patches forward. As promised, I am delivering the desired cleanup
now.

Hopefully I didn't screw the trivial patch up ;-)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-29 19:43:59 +02:00
Paulo Zanoni
e486fad913 drm/i915: fix PIPE_WM_LINETIME definition
Looks like a copy/paste error.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-28 21:39:28 +02:00
Daniel Vetter
97f209bcfc drm/i915: "Flush Me Harder" required on gen6+
The prep to remove the flushing list in

commit cc889e0f6c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jun 13 20:45:19 2012 +0200

    drm/i915: disable flushing_list/gpu_write_list

causes quite some decent regressions. We can fix this by setting the
CS_STALL bit to ensure that the following seqno write happens only
after the cache flush has completed. But only do that when the caller
actually wants the flush (and not also when we invalidate caches
before starting the next batch).

I've looked through all our ancient scrolls about gen6+ pipe control
workarounds, and this seems to be indeed a legal combination: We're
allowed to set the CS_STALL bit when we flush the render cache (which
we do).

While yelling at this code, also pass back the return value from
intel_emit_post_sync_nonzero_flush properly.

v2: Instead of emitting more pipe controls, set the CS_STALL bit on
the write flush as suggested by Chris Wilson. It seems to work, too.

Cc: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51436
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51429
Tested-by: Lu Hua <huax.lu@intel.com>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-28 21:06:25 +02:00
Jesper Juhl
a8b0bbabf7 drm/i915/sprite: Fix mem leak in intel_plane_init()
If we ever hit the default case in the switch statement we'll return
from the function without freeing the memory we just allocated to
'intel_plane' (but that has not been used).

This patch gets rid of the leak by freeing the memory just before we
return.

Signed-off-by: Jesper Juhl <jj@chaosbits.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-27 17:03:24 +02:00
Jesse Barnes
f4d7105648 drm/i915: correct IVB default sprite format
We shouldn't hit this path anyway, but make it use the IVB sprite format
definition to avoid confusion.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-27 17:03:23 +02:00
Jesse Barnes
e86fe0d317 drm/i915: mask tiled bit when updating IVB sprites
Or going from tiled to untiled may break.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-27 17:03:23 +02:00
Daniel Vetter
25c0af768c agp/intel-agp: remove snb+ host bridge pciids
drm/i915 now takes care itself of setting up the gtt for
these chips.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 21:10:35 +02:00
Daniel Vetter
01a06850fb drm/i915: disable drm agp support for !gen3 with kms enabled
This is the quick&dirty way Dave Airlie suggested to workaround the
midlayer drm agp brain-damange. Note that i915_probe is only called
when the driver has ksm enabled, so no need to check for that.

We also need to move the intel_agp_enabled check at the right place.
Note that the only thing this does is enforce the correct module load
order (by using a symbol from intel-agp.ko) to ensure that the fake
agp driver is ready before the drm core tries to set up the agp stuff.

v2: Add a comment to explain why gen3 needs all this legacy fake agp
stuff - we've shipped an XvMC library with a kms-enabled ddx that
requires it (but only on gen3).

v3: Make it clear that this is only a gen3 issue in the comment.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 21:10:14 +02:00
Daniel Vetter
87207ca20e drm/i915: don't use dev->agp
This single leftover use is due to a patch that went into 3.5 through
-fixes. With the fake agp stuff on demise, at least for gen6+ we can't
use this any more.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 21:08:44 +02:00
Daniel Vetter
79f5b2c759 drm/i915: make enable/disable_gt_powersave locking consistent
The enable functions grabbed dev->struct_mutex themselves, whereas
the disable functions expected dev->struct_mutex to be held by the
caller. Move the locking out to the (currently only) callsite of
intel_enable_gt_powersave to make this more consistent.

Originally this was prep work for future patches, but I've chased down
a totally wrong alley. Still, I think this is a sensible
clarification.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 21:07:29 +02:00
Daniel Vetter
8090c6b9da drm/i915: wrap up gt powersave enabling functions
... instead of calling each one for each generation indiviudally.

Notice that we've already managed to be inconsistent, the resume path
is missing an IS_VLV check. As a nice benefit we can mark all the
platform specific enable/disable functions as static and hide them in
intel_pm.c

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 21:07:03 +02:00
Daniel Vetter
7b0cfee1a2 Linux 3.5-rc4
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Merge tag 'v3.5-rc4' into drm-intel-next-queued

I want to merge the "no more fake agp on gen6+" patches into
drm-intel-next (well, the last pieces). But a patch in 3.5-rc4 also
adds a new use of dev->agp. Hence the backmarge to sort this out, for
otherwise drm-intel-next merged into Linus' tree would conflict in the
relevant code, things would compile but nicely OOPS at driver load :(

Conflicts in this merge are just simple cases of "both branches
changed/added lines at the same place". The only tricky part is to
keep the order correct wrt the unwind code in case of errors in
intel_ringbuffer.c (and the MI_DISPLAY_FLIP #defines in i915_reg.h
together, obviously).

Conflicts:
	drivers/gpu/drm/i915/i915_reg.h
	drivers/gpu/drm/i915/intel_ringbuffer.c

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-25 19:10:36 +02:00
Linus Torvalds
6b16351acb Linux 3.5-rc4 2012-06-24 12:53:04 -07:00
Anatol Pomozov
02b7d83436 Fix typo in printed messages
Coult -> Could

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-06-24 11:03:52 -07:00
Linus Torvalds
104452f052 Merge git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Avi Kivity:
 "Fixing a scheduling-while-atomic bug in the ppc code, and a bug which
  allowed pci bridges to be assigned to guests."

* git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: PPC: Book3S HV: Drop locks around call to kvmppc_pin_guest_page
  KVM: Fix PCI header check on device assignment
2012-06-24 11:02:09 -07:00
Linus Torvalds
08d49c46cf InfiniBand/RDMA fixes for 3.5-rc:
- Fixes to new ocrdma driver
  - Typo in test in CMA
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Merge tag 'rdma-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

Pull InfiniBand/RDMA fixes from Roland Dreier:
 - Fixes to new ocrdma driver
 - Typo in test in CMA

* tag 'rdma-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband:
  RDMA/cma: QP type check on received REQs should be AND not OR
  RDMA/ocrdma: Fix off by one in ocrdma_query_gid()
  RDMA/ocrdma: Fixed RQ error CQE polling
  RDMA/ocrdma: Correct queue SGE calculation
  RDMA/ocrdma: Correct reported max queue sizes
  RDMA/ocrdma: Fixed GID table for vlan and events
2012-06-24 11:00:07 -07:00
Linus Torvalds
a4a20fd981 ARM: SoC fixes
Nothing very controversial in here. Most of the fixes are for OMAP this time
 around, with some orion/kirkwood and a tegra patch mixed in.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Nothing very controversial in here.  Most of the fixes are for OMAP
  this time around, with some orion/kirkwood and a tegra patch mixed in."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: Orion: Fix Virtual/Physical mixup with watchdog
  ARM: Kirkwood: clk_register_gate_fn: add fn assignment
  ARM: Orion5x - Restore parts of io.h, with rework
  ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
  ARM: OMAP2+: mux: fix sparse warning
  ARM: OMAP2+: CM: increase the module disable timeout
  ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
  ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
  ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
  ARM: OMAP: Fix Beagleboard DVI reset gpio
  arm/dts: OMAP2: Fix interrupt controller binding
  ARM: OMAP2: Fix tusb6010 GPIO interrupt for n8x0
  ARM: OMAP2+: Fix MUSB ifdefs for platform init code
  ARM: tegra: make tegra_cpu_reset_handler_enable() __init
  ARM: OMAP: PM: Lock clocks list while generating summary
  ARM: iconnect: Remove include of removed linux/spi/orion_spi.h
2012-06-24 10:57:59 -07:00
Linus Torvalds
2ecedc478e Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
 "Nothing major in here, one radeon SI fix for tiling, and one uninit
  var fix, two minor header file fixes."

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm: drop comment about this header being autogenerated.
  drm/edid: don't return stack garbage from supports_rb
  vga_switcheroo: Add include guard
  drm/radeon: SI tiling fixes for display
2012-06-24 10:57:15 -07:00
Roland Dreier
2e51fd3c13 Merge branches 'cma' and 'ocrdma' into for-linus 2012-06-24 04:59:59 -07:00
Andrew Lunn
0fa1f0609a ARM: Orion: Fix Virtual/Physical mixup with watchdog
The orion watchdog is expecting to be passed the physcial address of
the hardware, and will ioremap() it to give a virtual address it will
use as the base address for the hardware. However, when creating the
platform resource record, a virtual address was being used.

Add the necassary #define's so we can pass the physical address as
expected.

Tested on Kirkwood and Orion5x.

Cc: stable <stable@vger.kernel.org>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-23 16:19:21 -07:00
Marc Kleine-Budde
5fb2ce119c ARM: Kirkwood: clk_register_gate_fn: add fn assignment
In commit:
    98d9986 ARM: Kirkwood: Replace clock gating
the kirkwood clock gating has been reworked. A custom variant of
clock gating, that calls a custom function before gating the clock
off, has been introduced. However in clk_register_gate_fn() this
custom function "fn" is never assigned.

This patch adds the missing fn assignment.

Cc: stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@blackshift.org>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-23 16:19:02 -07:00
Andrew Lunn
b5e12229a4 ARM: Orion5x - Restore parts of io.h, with rework
Commit 4d5fc58dbe (ARM: remove bunch of
now unused mach/io.h files) removed the orion5x io.h. Unfortunately,
this is still needed for the definition of IO_SPACE_LIMIT which
overrides the default 64K. All Orion based systems have 1Mbyte of IO
space per PCI[e] bus, and try to request_resource() this size. Orion5x
has two such PCI buses.

It is likely that the original, removed version, was broken. This
version might be less broken. However, it has not been tested on
hardware with a PCI card, let alone hardware with a PCI card with IO
capabilities.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-23 16:18:17 -07:00
Olof Johansson
a34a3b7264 Some uncontroversial OMAP clock, hwmod, and compiler warning fixes for 3.5-rc
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Merge tag 'omap-fixes-a-for-3.5rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes

From Paul Walmsley (as per Tony Lindgren's request):
 "Some uncontroversial OMAP clock, hwmod, and compiler warning fixes for 3.5-rc"

* tag 'omap-fixes-a-for-3.5rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
  ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
  ARM: OMAP2+: mux: fix sparse warning
  ARM: OMAP2+: CM: increase the module disable timeout
  ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
  ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
  ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
  ARM: OMAP: PM: Lock clocks list while generating summary
2012-06-23 16:16:29 -07:00
Olof Johansson
e23d7096f9 Here are a few fixes with the biggest one being fix for Beagle DVI
reset. All of them are regression fixes, except for the missing omap2
 interrupt controller binding that somehow got missed earlier.
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Merge tag 'omap-fixes-for-v3.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren:
"Here are a few fixes with the biggest one being fix for Beagle DVI
 reset. All of them are regression fixes, except for the missing omap2
 interrupt controller binding that somehow got missed earlier."

* tag 'omap-fixes-for-v3.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: Fix Beagleboard DVI reset gpio
  arm/dts: OMAP2: Fix interrupt controller binding
  ARM: OMAP2: Fix tusb6010 GPIO interrupt for n8x0
  ARM: OMAP2+: Fix MUSB ifdefs for platform init code
2012-06-23 16:11:50 -07:00
Linus Torvalds
002b758b6d Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client
Pull Ceph fixes from Sage Weil:
 "There are a couple of fixes from Yan for bad pointer dereferences in
  the messenger code and when fiddling with page->private after page
  migration, a fix from Alex for a use-after-free in the osd client
  code, and a couple fixes for the message refcounting and shutdown
  ordering."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client:
  libceph: flush msgr queue during mon_client shutdown
  rbd: Clear ceph_msg->bio_iter for retransmitted message
  libceph: use con get/put ops from osd_client
  libceph: osd_client: don't drop reply reference too early
  ceph: check PG_Private flag before accessing page->private
2012-06-22 17:47:08 -07:00
Linus Torvalds
369c4f542f Fixes for 3.5-rc
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Merge tag 'for-linus-Jun-21-2012' of git://oss.sgi.com/xfs/xfs

Pull XFS fixes from Ben Myers:
 - Fix stale data exposure with unwritten extents
 - Fix a warning in xfs_alloc_vextent with ODEBUG
 - Fix overallocation and alignment of pages for xfs_bufs
 - Fix a cursor leak
 - Fix a log hang
 - Fix a crash related to xfs_sync_worker
 - Rename xfs log structure from struct log to struct xlog so we can use
   crash dumps effectively

* tag 'for-linus-Jun-21-2012' of git://oss.sgi.com/xfs/xfs:
  xfs: rename log structure to xlog
  xfs: shutdown xfs_sync_worker before the log
  xfs: Fix overallocation in xfs_buf_allocate_memory()
  xfs: fix allocbt cursor leak in xfs_alloc_ag_vextent_near
  xfs: check for stale inode before acquiring iflock on push
  xfs: fix debug_object WARN at xfs_alloc_vextent()
  xfs: xfs_vm_writepage clear iomap_valid when !buffer_uptodate (REV2)
2012-06-22 11:07:55 -07:00
Linus Torvalds
a11637194a Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf updates from Ingo Molnar.

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  ftrace: Make all inline tags also include notrace
  perf: Use css_tryget() to avoid propping up css refcount
  perf tools: Fix synthesizing tracepoint names from the perf.data headers
  perf stat: Fix default output file
  perf tools: Fix endianity swapping for adds_features bitmask
2012-06-22 10:58:57 -07:00
Dave Airlie
59bbe27ba0 drm: drop comment about this header being autogenerated.
This comment is well out of date.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-22 11:04:55 +01:00
Sjoerd Simons
9756fe38d1 drm/i915: no lvds quirk for Zotac ZDBOX SD ID12/ID13
This box claims to have an LVDS interface but doesn't
actually have one.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-22 10:41:17 +02:00
Ricardo Neri
dc57aef503 ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
As per the OMAP4 documentation, audio over HDMI must be transmitted in
no-idle mode. This patch adds the HWMOD_SWSUP_SIDLE so that omap_hwmod uses
no-idle/force-idle settings instead of smart-idle mode.

This is required as the DSS interface clock is used as functional clock
for the HDMI wrapper audio FIFO. If no-idle mode is not used, audio could
be choppy, have bad quality or not be audible at all.

Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
[b-cousson@ti.com: Update the subject and align the .flags
location with the script template]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-21 18:08:47 -06:00
Paul Walmsley
65e25976b7 ARM: OMAP2+: mux: fix sparse warning
Commit bbd707acee ("ARM: omap2: use
machine specific hook for late init") resulted in the addition of this
sparse warning:

arch/arm/mach-omap2/mux.c:791:12: warning: symbol 'omap_mux_late_init' was not declared. Should it be static?

Fix by including the header file containing the prototype.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Tony Lindgren <tony@atomide.com>
2012-06-21 18:08:47 -06:00
Paul Walmsley
b8f15b7e1d ARM: OMAP2+: CM: increase the module disable timeout
Increase the timeout for disabling an IP block to five milliseconds.
This is to handle the usb_host_fs idle latency, which takes almost
four milliseconds after a host controller reset.

This is the second of two patches needed to resolve the following
boot warning:

omap_hwmod: usb_host_fs: _wait_target_disable failed

Thanks to Sergei Shtylyov <sshtylyov@mvista.com> for finding
an unrelated hunk in a previous version of this patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Tero Kristo <t-kristo@ti.com>
2012-06-21 18:08:47 -06:00
Paul Walmsley
9a47d32d5c ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
Until the OMAP4 code is converted to disable the use of the clock
framework-based clockdomain enable/disable sequence, any clock used as
a hwmod main_clk must have a clockdomain associated with it.  This
patch populates some clock structure clockdomain names to resolve the
following warnings during kernel init:

omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
omap_hwmod: trace_clk_div_ck: missing clockdomain for trace_clk_div_ck.
omap_hwmod: l3_div_ck: missing clockdomain for l3_div_ck.
omap_hwmod: ddrphy_ck: missing clockdomain for ddrphy_ck.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2012-06-21 18:08:47 -06:00
Paul Walmsley
252a4c5443 ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
The 32k sync timer IP block target idle modes in the hwmod data are
incorrect.  The IP block does not support any smart-idle modes.
Update the data to reflect the correct modes.

This problem was initially identified and a diff fragment posted to
the lists by Benoît Cousson <b-cousson@ti.com>.  A patch description
bug in the first version was also identified by Benoît.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
2012-06-21 18:08:47 -06:00
Djamil Elaidi
561038f0a8 ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
If an IP is configured in Smart-Standby-Wakeup, when disabling wakeup feature the
IP will not go back to Smart-Standby, but will remain in Smart-Standby-Wakeup.

Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-21 18:08:46 -06:00