Commit graph

287435 commits

Author SHA1 Message Date
Alan Cox
09016a11fc gma500: suspend/resume support for Cedartrail
Update our tree to match the current driver head.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-15 09:46:22 +00:00
Alan Cox
50d44a5237 gma500: Fix resume paths
We fall apart somewhat on resume because we don't invoke all the resume
methods as we should. Fix the silly error in the logic.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-15 09:46:02 +00:00
Dave Airlie
f1377998ee drm/nouveau: add userspace fallback hints.
This lets the modesetting driver work better.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-15 09:39:03 +00:00
Dave Airlie
abd32008ff Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-core-next
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (57 commits)
  drm/nouveau: map first page of mmio early and determine chipset earlier
  drm/nvd0/disp: disconnect encoders before reprogramming them
  drm/nvd0/disp: move syncs/magic setup to or mode_set
  drm/nouveau/dp: account for channel coding overhead in link training
  drm/nvd0/disp: fix dcb sor link matching in supervisor handler
  drm/nvd0/disp: initial implementation of displayport
  drm/nouveau/dp: make dp dpms function common, call from sor code instead
  drm/nv50/hwsq: some nv92 fixes
  drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.c
  drm/nouveau/dp: make functions for executing various bios tables
  drm/nouveau/pm: fix oops if chipset has no pm support at all
  drm/nouveau/bios: rework vbios shadowing
  drm/nouveau/bios: attempt acpi rom fetch before pcirom
  drm/nvd0/disp: attempt to handle more than 2 crtcs if possible
  drm/nvc0/vram: get part count from PUNITS
  drm/nv40/pm: fix fanspeed regression
  drm/nouveau/pm: several fixes for nvc0 memory timings
  drm/nvc0/pm: restrict pll mode to clocks that can actually use it
  drm/nouveau/dp: fix bad comparison in dp_link_train_commit()
  drm/nouveau/mxm: call mxmi to determine revision before calling mxms
  ...
2012-03-13 10:16:06 +00:00
Ben Skeggs
2f5394c3ed drm/nouveau: map first page of mmio early and determine chipset earlier
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:07 +10:00
Ben Skeggs
4cbb0f8d2b drm/nvd0/disp: disconnect encoders before reprogramming them
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:07 +10:00
Ben Skeggs
3488c57b98 drm/nvd0/disp: move syncs/magic setup to or mode_set
NVIDIA appear to do these around the same place they do the MODE_CTRL
methods, and for DP at least we need to bash some extra bits in "syncs"
to keep EVO happy.

It's a bit of a guess as to the 6/8bpc, but i have no better idea yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:06 +10:00
Ben Skeggs
6860dc8251 drm/nouveau/dp: account for channel coding overhead in link training
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:05 +10:00
Ben Skeggs
c674844bab drm/nvd0/disp: fix dcb sor link matching in supervisor handler
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:05 +10:00
Ben Skeggs
6e83fda2c0 drm/nvd0/disp: initial implementation of displayport
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:04 +10:00
Ben Skeggs
f14d9a4dda drm/nouveau/dp: make dp dpms function common, call from sor code instead
GF119 will use this too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:04 +10:00
Martin Peres
e436d1bb0a drm/nv50/hwsq: some nv92 fixes
The shift from hwsq_data = 0x1400 to 0x080000 actually happened in nv94, not nv92
This fixes some reclocking issues on my newly acquired nv92

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:03 +10:00
Ben Skeggs
8663bc7cde drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.c
Off-chip encoders (which we don't support yet anyway), and newer chipsets
(such as NVD9...), will need their own code for this.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:03 +10:00
Ben Skeggs
8c1dcb6573 drm/nouveau/dp: make functions for executing various bios tables
More code to do the same thing, but will make it easier to handle various
changes that could possibly happen the the VBIOS tables.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:02 +10:00
Ben Skeggs
c11dd0da52 drm/nouveau/pm: fix oops if chipset has no pm support at all
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:02 +10:00
Ben Skeggs
4489b9835a drm/nouveau/bios: rework vbios shadowing
Refactored to allow shadowing of VBIOS images longer than 64KiB, which
allows us to pass the VBIOS checksum test on certain boards.

There's also a workaround for reading the PROM VBIOS on some chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:01 +10:00
Ben Skeggs
05a7c15d48 drm/nouveau/bios: attempt acpi rom fetch before pcirom
There's cards out there with completely messed up PCIROM images that have
a perfectly valid signature.. Sigh!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:01 +10:00
Ben Skeggs
7c5f6a87b2 drm/nvd0/disp: attempt to handle more than 2 crtcs if possible
Theoretically handles CRTC2/CRTC3, should any GF119 out there actually
have them enabled.  The room is there for the regs etc, so why not :)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:00 +10:00
Ben Skeggs
29181d2f7b drm/nvc0/vram: get part count from PUNITS
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:00 +10:00
Ben Skeggs
8b83d67c2e drm/nv40/pm: fix fanspeed regression
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:59 +10:00
Roy Spliet
e6084257d0 drm/nouveau/pm: several fixes for nvc0 memory timings
This patch fixes two small issues in timing generation as spotted on
several NVCx cards.

In addition, the header of the file is updated to also contain (some of)
the current developers of this code.

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:59 +10:00
Ben Skeggs
1ae73f2f16 drm/nvc0/pm: restrict pll mode to clocks that can actually use it
Fixes reclocking failure on some chips where we attempted to set PDAEMON
to PLL mode.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:58 +10:00
Xi Wang
44ab8cc56c drm/nouveau/dp: fix bad comparison in dp_link_train_commit()
The comparison (lpre == DP_TRAIN_PRE_EMPHASIS_9_5) is always false:
lpre is initialized as (lane & 0x0c) >> 2, which is at most 3, while
DP_TRAIN_PRE_EMPHASIS_9_5 is defined as (3 << 3).

Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:58 +10:00
Ben Skeggs
84ddfda6d4 drm/nouveau/mxm: call mxmi to determine revision before calling mxms
There's a HP laptop out there where the MXM version in the VBIOS doesn't
match what the ACPI implementation is expecting.  These tables will accept
0x00 to MXMS to return latest version, but *only* if MXMI has been called
first..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:57 +10:00
Ben Skeggs
7d3a766b6a drm/nouveau/pm: init only after display subsystem has been created
This patch fixes an oops cause by pm_trigger accessing the (uninitialised)
crtc list.

Reported-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:57 +10:00
Ben Skeggs
950c44b6dd drm/nvc0/fb: detect presense of second rank
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:56 +10:00
Christoph Bumiller
df26bc9c32 drm/nv50/display: expose color vibrance control
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:56 +10:00
Ben Skeggs
990449c77c drm/nv50-nvc0/vm: support unsnooped system memory
v2 (Emil Velikov <emil.l.velikov@gmail.com>):
- Fixed a regression on certain nv50 IGP due to not passing the correct
  target type to nv50_vm_addr()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Johannes Obermayr <johannesobermayr@gmx.de>
2012-03-13 17:14:06 +10:00
Ben Skeggs
4abb410a13 drm/nouveau: recognise DCB connector type for DP+DVI+VGA DMS-59
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:09:23 +10:00
Ben Skeggs
070be296b6 drm/nouveau/mem: handle dll_off for ddr2/ddr3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:14 +10:00
Ben Skeggs
25c53c1068 drm/nouveau/pm: extend profile interface for destroy/init/fini
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:11 +10:00
Ben Skeggs
8d7bb40063 drm/nouveau/pm: rework to allow selecting separate profiles for ac/battery
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:04 +10:00
Ben Skeggs
b830973b68 drm/nouveau/pm: fix dll off -> dll on transitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:00 +10:00
Ben Skeggs
a9bc247cbb drm/nouveau/pm: detect when we need dll disabled for gddr3
Fixes minor flickering on NVS295 when at perflvl 0.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:54 +10:00
Ben Skeggs
0ce7141558 drm/nv50: fix detection of second vram rank
Goes a long way to correcting NVS295 memory reclocking issues.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:51 +10:00
Ben Skeggs
1a7287ea6f drm/nouveau/pm: track mr2 for gddr3
There's some "extended" GDDR3 chipsets out there with EMRS2 settings that
change the layout of MRS/EMRS1 bitmaps.. Sigh.. Still need to track down
how exactly we're supposed to handle this.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:44 +10:00
Martin Peres
c57ebf5ef3 drm/nv50/pm: wait for all fifo-connected engines to idle before reclocking
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:08:38 +10:00
Ben Skeggs
496a73bbec drm/nv50/pm: use hwsq for engine reclocking too
Idea from Martin Peres, different implementation by me.

v2: Martin Peres:
- fix mast calculation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:32 +10:00
Ben Skeggs
e495d0d7e3 drm/nv50/disp: more accurate function to determine active crtcs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:29 +10:00
Ben Skeggs
6bdf68c9a4 drm/nv50/pm: initial work towards proper memory reclocking, with timings
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:18 +10:00
Ben Skeggs
2d85bc8855 drm/nouveau/pm: introduce ram reclocking helper
This will probably result in more lines of code, however, we're going to
have at least 3 slightly different implementations of this very soon and
I'd rather keep the ram reclocking logic separate from the hw specifics.

DDR2/DDR3/GDDR3 implemented thus far, others will be added as necessary.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:13 +10:00
Ben Skeggs
085028ce3b drm/nouveau/pm: embed timings into perflvl structs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:06 +10:00
Ben Skeggs
fd99fd6100 drm/nouveau/pm: calculate memory timings at perflvl creation time
Statically generating the PFB register and MR values for each timing set
turns out to be insufficient.  There's at least one (so far) known piece
of information which effects MR values which is stored in the perflvl
entry on some chipsets (and in another table on later ones), which is
disconnected from the timing table entries.

After this change we will generate a timing set based on an input clock
frequency instead, and have this data stored in the performance level
data.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:03 +10:00
Ben Skeggs
68a64cad07 drm/nouveau/pm: readback boot perflvl *before* parsing vbios
We might want/need the boot data to generate the other perflevels.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:07:55 +10:00
Roy Spliet
c7c039fd31 drm/nouveau/pm: implement DDR2/DDR3/GDDR3/GDDR5 MR generation and validation
Roy Spliet:
- Implement according to specs
- Simplify
- Make array for mc latency registers

Martin Peres:
- squash and split all the commits from Roy
- rework following Ben Skeggs comments
- add a form of timings validation
- store the initial timings for later use

Ben Skeggs
- merge slightly modified tidy-up patch with this one
- remove perflvl-dropping logic for the moment

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:07:50 +10:00
Ben Skeggs
03ddf04bdb drm/nouveau/pm: restructure bios table parsing
It turns out we need access to some additional information in various VBIOS
tables to handle PFB memory timings correctly.

Rather than hack in parsing of the new stuff in some kludgy way, I've
restructured the VBIOS parsing to be more primitive, so we can use them in
more flexible ways in the future.

The perflvl->timing association code is disabled for the moment until it can
be reworked.  We don't use this stuff yet anyway, so no harm done.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:07:00 +10:00
Ben Skeggs
3d8a408c43 drm/nouveau/pm: avoid potential divide-by-zero
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:06:53 +10:00
Jean Delvare
1a5f985c17 drm/nouveau: Fix module parameter description formats
Module parameter descriptions don't take a trailing \n, otherwise it
breaks formatting of modinfo's output. Also remove trailing space.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: David Airlie <airlied@linux.ie>
Cc: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:38 +10:00
Roy Spliet
bfb3146524 drm/nouveau/pm: improve memory timing generation
- Rename several VBIOS entries to closer match the real world
- Add the missing 0x100238 and 0x100240 register values
- Parse bit 14 of the VBIOS timing table
- "Magic value" -> tCWL, fixing some minor bugs in the process
- Also name a few more by their name rather than their number.
- Some values seem to be dependent on the memory type. Fix

Edits by Martin Peres <martin.peres@labri.fr>:
- this is a squash commit
- reworked for fixing some style issues

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:26 +10:00
Martin Peres
b010374709 drm/nouveau/pm: improve the reclocking logs' readability
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:19 +10:00