diff --git a/firmware/scripts/audio_convert.py b/firmware/scripts/audio_convert.py
index d0dad2c..6862bf5 100644
--- a/firmware/scripts/audio_convert.py
+++ b/firmware/scripts/audio_convert.py
@@ -16,7 +16,7 @@ if len(data_in.shape)>1:
 print("resampling...")
 
 converter = 'sinc_best'  # or 'sinc_fastest', ...
-desired_sample_rate = 22000.0
+desired_sample_rate = 44000.0
 ratio = desired_sample_rate/datasamplerate
 data_out = samplerate.resample(data_in, ratio, converter)
 
diff --git a/firmware/src/audio.cpp b/firmware/src/audio.cpp
index 5bf4bc5..ed66e7e 100644
--- a/firmware/src/audio.cpp
+++ b/firmware/src/audio.cpp
@@ -43,8 +43,8 @@ void pwm_interrupt_handler() {
 
 // 11 KHz is fine for speech. Phone lines generally sample at 8 KHz
 #define SYS_CLOCK 125000000.0f
-#define AUDIO_WRAP 250.0f
-#define AUDIO_CLK_DIV (SYS_CLOCK / AUDIO_WRAP / 8 / AUDIO_RATE)
+#define AUDIO_WRAP 256.0f
+#define AUDIO_CLK_DIV (SYS_CLOCK / AUDIO_WRAP / 8.0f / AUDIO_RATE)
 
 void init_audio() {
     gpio_set_function(AUDIO_PIN, GPIO_FUNC_PWM);
@@ -63,7 +63,7 @@ void init_audio() {
     pwm_config config = pwm_get_default_config();
 
     pwm_config_set_clkdiv(&config, AUDIO_CLK_DIV);
-    pwm_config_set_wrap(&config, 250);
+    pwm_config_set_wrap(&config, AUDIO_WRAP);
     pwm_init(audio_pin_slice, /*0,*/ &config, true);
 
     pwm_set_gpio_level(AUDIO_PIN, 0);
diff --git a/firmware/src/audio.h b/firmware/src/audio.h
index 3aa5638..208cb38 100644
--- a/firmware/src/audio.h
+++ b/firmware/src/audio.h
@@ -5,8 +5,8 @@
 
 #define AUDIO_PIN 8
 
-#define AUDIO_RATE 22000.0f
-#define BUFFER_LEN 512*4
+#define AUDIO_RATE 44000.0f
+#define BUFFER_LEN 512*16
 #define BUFFER_LEN_MS (BUFFER_LEN / AUDIO_RATE) * 1000.0f
 
 extern uint8_t wav_buffer_0[BUFFER_LEN];
diff --git a/firmware/src/leds.cpp b/firmware/src/leds.cpp
index a46f337..15112cd 100644
--- a/firmware/src/leds.cpp
+++ b/firmware/src/leds.cpp
@@ -158,27 +158,26 @@ void leds_init() {
   pinMode(COL_SER, OUTPUT);
   pinMode(COL_OE, OUTPUT);
   outputEnable(ROW_OE, false);
-  // pinMode(COL_RCLK, OUTPUT);
-  pinMode(RCLK, OUTPUT);
+  pinMode(COL_RCLK, OUTPUT);
   pinMode(COL_SRCLK, OUTPUT);
-  pinMode(COL_SRCLR, OUTPUT);
+  pinMode(COL_RCLK, OUTPUT);
 
   // set up row pins
   pinMode(ROW_SER, OUTPUT);
   pinMode(ROW_OE, OUTPUT);
   outputEnable(ROW_OE, false);
-  // pinMode(ROW_RCLK, OUTPUT);
+  pinMode(ROW_RCLK, OUTPUT);
   pinMode(ROW_SRCLK, OUTPUT);
   pinMode(ROW_SRCLR, OUTPUT);
 
-  // clear output - cols
+  // clear output
   clearShiftReg(COL_SRCLK, COL_SRCLR);
-  pulsePin(RCLK);
-  outputEnable(COL_OE, true); // this is fine, because we control OE via rows only
-
-  // clear output - rows
   clearShiftReg(ROW_SRCLK, ROW_SRCLR);
-  pulsePin(RCLK);
+
+  pulsePin(COL_RCLK);
+  pulsePin(ROW_RCLK);
+
+  outputEnable(COL_OE, true); // this is fine, because we control OE via rows only
 }
 
 void leds_disable() {
@@ -282,9 +281,9 @@ void leds_initPusher() {
   pio_sm_set_consecutive_pindirs(pio, sm, COL_SRCLK, 1, true);
 
   // Set SET (RCLK) pin, connect to pad, set as output
-  sm_config_set_set_pins(&config, RCLK, 1);
-  pio_gpio_init(pio, RCLK);
-  pio_sm_set_consecutive_pindirs(pio, sm, RCLK, 1, true);
+  sm_config_set_set_pins(&config, ROW_RCLK, 1);
+  pio_gpio_init(pio, ROW_RCLK);
+  pio_sm_set_consecutive_pindirs(pio, sm, ROW_RCLK, 1, true);
 
   // Load our configuration, and jump to the start of the program
   pio_sm_init(pio, sm, offset, &config);
diff --git a/firmware/src/leds.h b/firmware/src/leds.h
index d9aacdb..bea1f32 100644
--- a/firmware/src/leds.h
+++ b/firmware/src/leds.h
@@ -4,18 +4,48 @@
 
 #include <Arduino.h>
 
-#define COL_SER 21
-#define COL_OE 22
-// #define COL_RCLK 23
-#define RCLK 23
-#define COL_SRCLK 24
-#define COL_SRCLR 25
+#define COMMON_SER 21
+// #define COMMON_RCLK 23
+#define COMMON_SRCLR 25
 
-#define ROW_SER 14
+// #define COL_SER 21
+#define COL_OE 22
+#define COL_RCLK 23
+#define COL_SRCLK 24
+// #define COL_SRCLR 25
+
+// #define ROW_SER 14
 #define ROW_OE 13
-// #define ROW_RCLK 20
+#define ROW_RCLK 20
 #define ROW_SRCLK 18
-#define ROW_SRCLR 15
+// #define ROW_SRCLR 15
+
+#if defined(COMMON_SER) && (defined(ROW_SER) || defined(COL_SER))
+#error "COMMON_SER and ROW_SER/COL_SER cannot be defined at the same time"
+#endif
+
+#if defined(COMMON_SER)
+#define COL_SER COMMON_SER
+#define ROW_SER COMMON_SER
+#endif
+
+#if defined(COMMON_RCLK) && (defined(ROW_RCLK) || defined(COL_RCLK))
+#error "COMMON_RCLK and ROW_RCLK/COL_RCLK cannot be defined at the same time"
+#endif
+
+#if defined(COMMON_RCLK)
+#define COL_RCLK COMMON_RCLK
+#define ROW_RCLK COMMON_RCLK
+#endif
+
+#if defined(COMMON_SRCLR) && (defined(ROW_SRCLR) || defined(COL_SRCLR))
+#error "COMMON_SRCLR and ROW_SRCLR/COL_SRCLR cannot be defined at the same time"
+#endif
+
+#if defined(COMMON_SRCLR)
+#define COL_SRCLR COMMON_SRCLR
+#define ROW_SRCLR COMMON_SRCLR
+#endif
 
 #define ROW_MODULES 2
 #define ROW_COUNT ROW_MODULES * 20