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jlcpcb production fixes

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radex 2024-03-10 20:53:54 +01:00
parent 035e2e4bb8
commit 8f4c55d71d
Signed by: radex
SSH Key Fingerprint: SHA256:hvqRXAGG1h89yqnS+cyFTLKQbzjWD4uXIqw7Y+0ws30
4 changed files with 53 additions and 7 deletions

2
PCB/.gitignore vendored
View File

@ -17,6 +17,8 @@ _autosave-*
*-save.pro
*-save.kicad_pcb
fp-info-cache
\#auto_saved_files#
production
# Netlist files (exported from Eeschema)
*.net

View File

@ -1953,7 +1953,7 @@
(at -1.4625 0 270)
(size 1.125 1.75)
(layers "F.Cu" "F.Paste" "F.Mask")
(roundrect_rratio 0.222222)
(roundrect_rratio 0.2222222222)
(net 6 "VBUS")
(pintype "passive")
(uuid "791290f1-cdf1-48a2-b3f1-0ca9222a65b2")
@ -1962,7 +1962,7 @@
(at 1.4625 0 270)
(size 1.125 1.75)
(layers "F.Cu" "F.Paste" "F.Mask")
(roundrect_rratio 0.222222)
(roundrect_rratio 0.2222222222)
(net 5 "+5V")
(pintype "passive")
(uuid "b3e6764d-02c9-4cf2-8ebc-86603e590aa0")
@ -3552,28 +3552,28 @@
(at -0.6375 -0.6375)
(size 1.084435 1.084435)
(layers "F.Paste")
(roundrect_rratio 0.230535)
(roundrect_rratio 0.2305347946)
(uuid "9a94882f-117c-4c96-aa90-f639deb523e6")
)
(pad "" smd roundrect
(at -0.6375 0.6375)
(size 1.084435 1.084435)
(layers "F.Paste")
(roundrect_rratio 0.230535)
(roundrect_rratio 0.2305347946)
(uuid "3e13ead1-5ece-4a7d-9909-a533cdba8aa2")
)
(pad "" smd roundrect
(at 0.6375 -0.6375)
(size 1.084435 1.084435)
(layers "F.Paste")
(roundrect_rratio 0.230535)
(roundrect_rratio 0.2305347946)
(uuid "4a3871cc-4c32-47a4-8142-f049ce37fd6e")
)
(pad "" smd roundrect
(at 0.6375 0.6375)
(size 1.084435 1.084435)
(layers "F.Paste")
(roundrect_rratio 0.230535)
(roundrect_rratio 0.2305347946)
(uuid "d5c31226-549b-4013-88e4-26fad54f30b9")
)
(pad "1" smd roundrect
@ -8036,6 +8036,19 @@
)
)
)
(property "JLCPCB Rotation Offset" "90"
(at 0 0 0)
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "b6d733c9-1e92-4bfb-b01d-e8672e36b432")
(effects
(font
(size 1 1)
(thickness 0.15)
)
)
)
(property ki_fp_filters "TO-???* *_Diode_* *SingleDiode* D_*")
(path "/a7279dbb-fa7d-4fe1-8e3b-1875bbe4e3c4/d7445302-156e-4038-b3f4-91a9336c28e2")
(sheetname "USBC")
@ -10031,6 +10044,19 @@
)
)
)
(property "JLCPCB Position Offset" "0,1.42"
(at 0 0 180)
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "945504b0-f298-4214-aa90-44bf7563e5ae")
(effects
(font
(size 1 1)
(thickness 0.15)
)
)
)
(property ki_fp_filters "USB*C*Receptacle*")
(path "/a7279dbb-fa7d-4fe1-8e3b-1875bbe4e3c4/8492c1d5-6cd1-4176-8a77-cf7690a372aa")
(sheetname "USBC")

View File

@ -136,7 +136,7 @@
"min_via_diameter": 0.6,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
"solder_mask_to_copper_clearance": 0.005,
"use_height_for_length_calcs": true
},
"teardrop_options": [

View File

@ -2629,6 +2629,15 @@
(hide yes)
)
)
(property "JLCPCB Position Offset" "0,1.42"
(at 27.94 46.99 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(pin "A1"
(uuid "edaa4050-f681-4e42-a026-b6cae10068dd")
)
@ -2962,6 +2971,15 @@
(hide yes)
)
)
(property "JLCPCB Rotation Offset" "90"
(at 95.25 54.61 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(pin "4"
(uuid "9f40f5b9-5dfe-4c5c-a072-ef021e7888d2")
)