From c1fd5a6c120d2a2b0babeccf9e826c88850c9eef Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Sergiusz=20=27q3k=27=20Baza=C5=84ski?= <q3k@q3k.org>
Date: Sat, 4 Jan 2014 13:56:21 +0100
Subject: [PATCH] Working tests

---
 Makefile | 11 +++++++++++
 README   |  3 +++
 2 files changed, 14 insertions(+)
 create mode 100644 Makefile

diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..63fb6dc
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,11 @@
+obj_dir/Vcpu.cpp: cpu.v test_main.cpp
+	verilator -Wall -cc cpu.v --exe test_main.cpp
+
+obj_dir/Vcpu: obj_dir/Vcpu.cpp
+	cd obj_dir; make -j -f Vcpu.mk Vcpu
+
+test: obj_dir/Vcpu
+	obj_dir/Vcpu
+
+clean:
+	rm -rf obj_dir
diff --git a/README b/README
index b4dcbbb..eece553 100644
--- a/README
+++ b/README
@@ -1,3 +1,6 @@
 A WIP Chip8 Verilog CPU.
 
 May, in the future, contain other components (VGA, SRAM, PS2 and SD card) in order to synthesize this as a console on a Spartan devboard or something.
+
+To run tests:
+    make test