Added sci-electronics/verilator-3.845
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DIST verilator-3.845.tgz 1873811 SHA256 7372f749b4317332088e1256eee6cb3aed20956e760b650c98007859f15891e7 SHA512 11b0713cefd3a3c0575da5f1410f4ab989a90bcdf566e13c9f7da57c4762e6b70515aa1c4e11cb62d83dc1e25d5326ed67df87580fe716727eef0a0cac4f9767 WHIRLPOOL ec61f1c1ba86a1fd4bb71b3848650c87217a57553ca48598924a76f4e8d8a33202ffafb87ecfc922ccd797de4bf6a56b2b5bf3fda989c68cf89fa2500211230f
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EBUILD verilator-3.845.ebuild 693 SHA256 242a90efdd5c084601477ae6fc51520d61fad2a17e5a515b939b4f3217710d6d SHA512 8d53241af82876ca9cfbc77927ec1539bae0182c4a0433a0c2dfcfbc4cbfb6629b8db52cff9e984ccae3b536f26d45d429a8570f2fcf20b87e45927a8e280bce WHIRLPOOL 55b2523727fa17b869a7f4695daa2898e9164050fb4b886f77a81151ef89979fad9539da1b251deffd08946209a6529a07c773d9fe684d89105780224e0f24f2
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# Copyright 1999-2013 Gentoo Foundation
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# Distributed under the terms of the GNU General Public License v2
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# $Header: $
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EAPI=4
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DESCRIPTION="Verilator is a fast Verilog HDL simulator that compiles
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synthesizable Verilog into C++ or SystemC."
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HOMEPAGE="http://www.veripool.org/wiki/verilator"
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SRC_URI="http://www.veripool.org/ftp/${P}.tgz"
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LICENSE="|| ( LGPL-3 Artistic-2 )"
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SLOT="0"
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KEYWORDS="~amd64"
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IUSE="test"
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DEPEND="sys-devel/flex
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sys-devel/bison
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dev-lang/perl
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test? ( sys-devel/gdb )"
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RDEPEND="dev-lang/perl"
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src_configure() {
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econf
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}
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src_install() {
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emake DESTDIR="${D}" install
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dodoc Changes README TODO
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dohtml internals.html verilator.html
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}
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src_test() {
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emake -j1 test
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}
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