1f8081f539
Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
47 lines
1.2 KiB
ArmAsm
47 lines
1.2 KiB
ArmAsm
/*
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* arch/arm/mach-mv78xx0/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for Marvell MV78xx0 platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <mach/mv78xx0.h>
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =IRQ_VIRT_BASE
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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@ check low interrupts
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ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
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ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
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mov \irqnr, #31
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ands \irqstat, \irqstat, \tmp
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bne 1001f
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@ if no low interrupts set, check high interrupts
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ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
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ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
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mov \irqnr, #63
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ands \irqstat, \irqstat, \tmp
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bne 1001f
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@ if no high interrupts set, check error interrupts
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ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
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ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
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mov \irqnr, #95
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ands \irqstat, \irqstat, \tmp
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@ find first active interrupt source
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1001: clzne \irqstat, \irqstat
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subne \irqnr, \irqnr, \irqstat
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.endm
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