5e6557722e
This converts the usage of struct of_match to struct of_device_id, similar to pci_device_id. This allows a device table to be generated, which can be parsed by depmod(8) to generate a map file for module loading. In order for hotplug to work with macio devices, patches to module-init-tools and hotplug must be applied. Those patches are available at: ftp://ftp.suse.com/pub/people/jeffm/linux/macio-hotplug/ Signed-off-by: Jeff Mahoney <jeffm@suse.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
766 lines
19 KiB
C
766 lines
19 KiB
C
/*
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i2c Support for Apple Keywest I2C Bus Controller
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Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Original work by
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Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Changes:
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2001/12/13 BenH New implementation
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2001/12/15 BenH Add support for "byte" and "quick"
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transfers. Add i2c_xfer routine.
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2003/09/21 BenH Rework state machine with Paulus help
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2004/01/21 BenH Merge in Greg KH changes, polled mode is back
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2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
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My understanding of the various modes supported by keywest are:
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- Dumb mode : not implemented, probably direct tweaking of lines
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- Standard mode : simple i2c transaction of type
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S Addr R/W A Data A Data ... T
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- Standard sub mode : combined 8 bit subaddr write with data read
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S Addr R/W A SubAddr A Data A Data ... T
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- Combined mode : Subaddress and Data sequences appended with no stop
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S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
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Currently, this driver uses only Standard mode for i2c xfer, and
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smbus byte & quick transfers ; and uses StandardSub mode for
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other smbus transfers instead of combined as we need that for the
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sound driver to be happy
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/timer.h>
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#include <linux/spinlock.h>
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/pmac_feature.h>
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#include <asm/pmac_low_i2c.h>
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#include "i2c-keywest.h"
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#undef POLLED_MODE
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/* Some debug macros */
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#define WRONG_STATE(name) do {\
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pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
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name, __kw_state_names[iface->state], isr); \
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} while(0)
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#ifdef DEBUG
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static const char *__kw_state_names[] = {
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"state_idle",
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"state_addr",
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"state_read",
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"state_write",
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"state_stop",
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"state_dead"
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};
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#endif /* DEBUG */
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static int probe;
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MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
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MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
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MODULE_LICENSE("GPL");
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module_param(probe, bool, 0);
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#ifdef POLLED_MODE
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/* Don't schedule, the g5 fan controller is too
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* timing sensitive
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*/
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static u8
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wait_interrupt(struct keywest_iface* iface)
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{
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int i;
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u8 isr;
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for (i = 0; i < 200000; i++) {
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isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
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if (isr != 0)
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return isr;
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udelay(10);
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}
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return isr;
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}
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#endif /* POLLED_MODE */
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static void
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do_stop(struct keywest_iface* iface, int result)
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{
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write_reg(reg_control, KW_I2C_CTL_STOP);
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iface->state = state_stop;
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iface->result = result;
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}
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/* Main state machine for standard & standard sub mode */
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static void
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handle_interrupt(struct keywest_iface *iface, u8 isr)
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{
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int ack;
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if (isr == 0) {
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if (iface->state != state_stop) {
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pr_debug("KW: Timeout !\n");
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do_stop(iface, -EIO);
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}
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if (iface->state == state_stop) {
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ack = read_reg(reg_status);
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if (!(ack & KW_I2C_STAT_BUSY)) {
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iface->state = state_idle;
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write_reg(reg_ier, 0x00);
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#ifndef POLLED_MODE
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complete(&iface->complete);
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#endif /* POLLED_MODE */
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}
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}
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return;
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}
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if (isr & KW_I2C_IRQ_ADDR) {
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ack = read_reg(reg_status);
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if (iface->state != state_addr) {
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write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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WRONG_STATE("KW_I2C_IRQ_ADDR");
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do_stop(iface, -EIO);
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return;
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}
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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iface->state = state_stop;
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iface->result = -ENODEV;
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pr_debug("KW: NAK on address\n");
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} else {
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/* Handle rw "quick" mode */
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if (iface->datalen == 0) {
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do_stop(iface, 0);
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} else if (iface->read_write == I2C_SMBUS_READ) {
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iface->state = state_read;
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if (iface->datalen > 1)
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write_reg(reg_control, KW_I2C_CTL_AAK);
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} else {
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iface->state = state_write;
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write_reg(reg_data, *(iface->data++));
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iface->datalen--;
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}
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}
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write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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}
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if (isr & KW_I2C_IRQ_DATA) {
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if (iface->state == state_read) {
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*(iface->data++) = read_reg(reg_data);
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write_reg(reg_isr, KW_I2C_IRQ_DATA);
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iface->datalen--;
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if (iface->datalen == 0)
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iface->state = state_stop;
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else if (iface->datalen == 1)
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write_reg(reg_control, 0);
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} else if (iface->state == state_write) {
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/* Check ack status */
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ack = read_reg(reg_status);
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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pr_debug("KW: nack on data write (%x): %x\n",
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iface->data[-1], ack);
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do_stop(iface, -EIO);
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} else if (iface->datalen) {
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write_reg(reg_data, *(iface->data++));
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iface->datalen--;
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} else {
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write_reg(reg_control, KW_I2C_CTL_STOP);
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iface->state = state_stop;
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iface->result = 0;
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}
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write_reg(reg_isr, KW_I2C_IRQ_DATA);
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} else {
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write_reg(reg_isr, KW_I2C_IRQ_DATA);
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WRONG_STATE("KW_I2C_IRQ_DATA");
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if (iface->state != state_stop)
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do_stop(iface, -EIO);
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}
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}
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if (isr & KW_I2C_IRQ_STOP) {
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write_reg(reg_isr, KW_I2C_IRQ_STOP);
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if (iface->state != state_stop) {
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WRONG_STATE("KW_I2C_IRQ_STOP");
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iface->result = -EIO;
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}
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iface->state = state_idle;
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write_reg(reg_ier, 0x00);
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#ifndef POLLED_MODE
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complete(&iface->complete);
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#endif /* POLLED_MODE */
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}
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if (isr & KW_I2C_IRQ_START)
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write_reg(reg_isr, KW_I2C_IRQ_START);
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}
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#ifndef POLLED_MODE
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/* Interrupt handler */
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static irqreturn_t
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keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct keywest_iface *iface = (struct keywest_iface *)dev_id;
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unsigned long flags;
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spin_lock_irqsave(&iface->lock, flags);
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del_timer(&iface->timeout_timer);
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handle_interrupt(iface, read_reg(reg_isr));
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if (iface->state != state_idle) {
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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}
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spin_unlock_irqrestore(&iface->lock, flags);
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return IRQ_HANDLED;
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}
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static void
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keywest_timeout(unsigned long data)
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{
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struct keywest_iface *iface = (struct keywest_iface *)data;
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unsigned long flags;
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pr_debug("timeout !\n");
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spin_lock_irqsave(&iface->lock, flags);
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handle_interrupt(iface, read_reg(reg_isr));
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if (iface->state != state_idle) {
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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}
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spin_unlock_irqrestore(&iface->lock, flags);
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}
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#endif /* POLLED_MODE */
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/*
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* SMBUS-type transfer entrypoint
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*/
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static s32
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keywest_smbus_xfer( struct i2c_adapter* adap,
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u16 addr,
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unsigned short flags,
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char read_write,
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u8 command,
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int size,
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union i2c_smbus_data* data)
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{
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struct keywest_chan* chan = i2c_get_adapdata(adap);
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struct keywest_iface* iface = chan->iface;
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int len;
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u8* buffer;
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u16 cur_word;
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int rc = 0;
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if (iface->state == state_dead)
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return -ENXIO;
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/* Prepare datas & select mode */
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iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
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switch (size) {
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case I2C_SMBUS_QUICK:
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len = 0;
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buffer = NULL;
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iface->cur_mode |= KW_I2C_MODE_STANDARD;
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break;
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case I2C_SMBUS_BYTE:
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len = 1;
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buffer = &data->byte;
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iface->cur_mode |= KW_I2C_MODE_STANDARD;
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break;
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case I2C_SMBUS_BYTE_DATA:
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len = 1;
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buffer = &data->byte;
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iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
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break;
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case I2C_SMBUS_WORD_DATA:
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len = 2;
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cur_word = cpu_to_le16(data->word);
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buffer = (u8 *)&cur_word;
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iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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len = data->block[0];
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buffer = &data->block[1];
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iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
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break;
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default:
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return -1;
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}
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/* Turn a standardsub read into a combined mode access */
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if (read_write == I2C_SMBUS_READ
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&& (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
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iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
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iface->cur_mode |= KW_I2C_MODE_COMBINED;
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}
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/* Original driver had this limitation */
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if (len > 32)
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len = 32;
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if (pmac_low_i2c_lock(iface->node))
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return -ENXIO;
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pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
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chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
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iface->data = buffer;
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iface->datalen = len;
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iface->state = state_addr;
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iface->result = 0;
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iface->read_write = read_write;
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/* Setup channel & clear pending irqs */
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write_reg(reg_isr, read_reg(reg_isr));
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write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
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write_reg(reg_status, 0);
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/* Set up address and r/w bit */
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write_reg(reg_addr,
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(addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
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/* Set up the sub address */
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if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
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|| (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
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write_reg(reg_subaddr, command);
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#ifndef POLLED_MODE
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/* Arm timeout */
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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#endif
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/* Start sending address & enable interrupt*/
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write_reg(reg_control, KW_I2C_CTL_XADDR);
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write_reg(reg_ier, KW_I2C_IRQ_MASK);
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#ifdef POLLED_MODE
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pr_debug("using polled mode...\n");
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/* State machine, to turn into an interrupt handler */
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while(iface->state != state_idle) {
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unsigned long flags;
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u8 isr = wait_interrupt(iface);
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spin_lock_irqsave(&iface->lock, flags);
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handle_interrupt(iface, isr);
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spin_unlock_irqrestore(&iface->lock, flags);
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}
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#else /* POLLED_MODE */
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pr_debug("using interrupt mode...\n");
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wait_for_completion(&iface->complete);
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#endif /* POLLED_MODE */
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rc = iface->result;
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pr_debug("transfer done, result: %d\n", rc);
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if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
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data->word = le16_to_cpu(cur_word);
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/* Release sem */
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pmac_low_i2c_unlock(iface->node);
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return rc;
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}
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/*
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* Generic i2c master transfer entrypoint
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*/
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static int
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keywest_xfer( struct i2c_adapter *adap,
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struct i2c_msg *msgs,
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int num)
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{
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struct keywest_chan* chan = i2c_get_adapdata(adap);
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struct keywest_iface* iface = chan->iface;
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struct i2c_msg *pmsg;
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int i, completed;
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int rc = 0;
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if (iface->state == state_dead)
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return -ENXIO;
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if (pmac_low_i2c_lock(iface->node))
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return -ENXIO;
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/* Set adapter to standard mode */
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iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
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iface->cur_mode |= KW_I2C_MODE_STANDARD;
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completed = 0;
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for (i = 0; rc >= 0 && i < num;) {
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u8 addr;
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pmsg = &msgs[i++];
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addr = pmsg->addr;
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if (pmsg->flags & I2C_M_TEN) {
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printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
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rc = -EINVAL;
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break;
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}
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pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
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chan->chan_no,
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pmsg->flags & I2C_M_RD ? "read" : "write",
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pmsg->len, addr, i, num);
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/* Setup channel & clear pending irqs */
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write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
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write_reg(reg_isr, read_reg(reg_isr));
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write_reg(reg_status, 0);
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iface->data = pmsg->buf;
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iface->datalen = pmsg->len;
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iface->state = state_addr;
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iface->result = 0;
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if (pmsg->flags & I2C_M_RD)
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iface->read_write = I2C_SMBUS_READ;
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else
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iface->read_write = I2C_SMBUS_WRITE;
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/* Set up address and r/w bit */
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if (pmsg->flags & I2C_M_REV_DIR_ADDR)
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addr ^= 1;
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write_reg(reg_addr,
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(addr << 1) |
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((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
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#ifndef POLLED_MODE
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/* Arm timeout */
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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#endif
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/* Start sending address & enable interrupt*/
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write_reg(reg_ier, KW_I2C_IRQ_MASK);
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write_reg(reg_control, KW_I2C_CTL_XADDR);
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#ifdef POLLED_MODE
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pr_debug("using polled mode...\n");
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/* State machine, to turn into an interrupt handler */
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while(iface->state != state_idle) {
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u8 isr = wait_interrupt(iface);
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handle_interrupt(iface, isr);
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}
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#else /* POLLED_MODE */
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pr_debug("using interrupt mode...\n");
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wait_for_completion(&iface->complete);
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#endif /* POLLED_MODE */
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rc = iface->result;
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if (rc == 0)
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completed++;
|
|
pr_debug("transfer done, result: %d\n", rc);
|
|
}
|
|
|
|
/* Release sem */
|
|
pmac_low_i2c_unlock(iface->node);
|
|
|
|
return completed;
|
|
}
|
|
|
|
static u32
|
|
keywest_func(struct i2c_adapter * adapter)
|
|
{
|
|
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
|
|
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
|
|
I2C_FUNC_SMBUS_BLOCK_DATA;
|
|
}
|
|
|
|
/* For now, we only handle combined mode (smbus) */
|
|
static struct i2c_algorithm keywest_algorithm = {
|
|
.name = "Keywest i2c",
|
|
.id = I2C_ALGO_SMBUS,
|
|
.smbus_xfer = keywest_smbus_xfer,
|
|
.master_xfer = keywest_xfer,
|
|
.functionality = keywest_func,
|
|
};
|
|
|
|
|
|
static int
|
|
create_iface(struct device_node *np, struct device *dev)
|
|
{
|
|
unsigned long steps;
|
|
unsigned bsteps, tsize, i, nchan, addroffset;
|
|
struct keywest_iface* iface;
|
|
u32 *psteps, *prate;
|
|
int rc;
|
|
|
|
if (np->n_intrs < 1 || np->n_addrs < 1) {
|
|
printk(KERN_ERR "%s: Missing interrupt or address !\n",
|
|
np->full_name);
|
|
return -ENODEV;
|
|
}
|
|
if (pmac_low_i2c_lock(np))
|
|
return -ENODEV;
|
|
|
|
psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
|
|
steps = psteps ? (*psteps) : 0x10;
|
|
|
|
/* Hrm... maybe we can be smarter here */
|
|
for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
|
|
steps >>= 1;
|
|
|
|
if (np->parent->name[0] == 'u') {
|
|
nchan = 2;
|
|
addroffset = 3;
|
|
} else {
|
|
addroffset = 0;
|
|
nchan = 1;
|
|
}
|
|
|
|
tsize = sizeof(struct keywest_iface) +
|
|
(sizeof(struct keywest_chan) + 4) * nchan;
|
|
iface = (struct keywest_iface *) kmalloc(tsize, GFP_KERNEL);
|
|
if (iface == NULL) {
|
|
printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
|
|
pmac_low_i2c_unlock(np);
|
|
return -ENOMEM;
|
|
}
|
|
memset(iface, 0, tsize);
|
|
spin_lock_init(&iface->lock);
|
|
init_completion(&iface->complete);
|
|
iface->node = of_node_get(np);
|
|
iface->bsteps = bsteps;
|
|
iface->chan_count = nchan;
|
|
iface->state = state_idle;
|
|
iface->irq = np->intrs[0].line;
|
|
iface->channels = (struct keywest_chan *)
|
|
(((unsigned long)(iface + 1) + 3UL) & ~3UL);
|
|
iface->base = ioremap(np->addrs[0].address + addroffset,
|
|
np->addrs[0].size);
|
|
if (!iface->base) {
|
|
printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
|
|
kfree(iface);
|
|
pmac_low_i2c_unlock(np);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
#ifndef POLLED_MODE
|
|
init_timer(&iface->timeout_timer);
|
|
iface->timeout_timer.function = keywest_timeout;
|
|
iface->timeout_timer.data = (unsigned long)iface;
|
|
#endif
|
|
|
|
/* Select interface rate */
|
|
iface->cur_mode = KW_I2C_MODE_100KHZ;
|
|
prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
|
|
if (prate) switch(*prate) {
|
|
case 100:
|
|
iface->cur_mode = KW_I2C_MODE_100KHZ;
|
|
break;
|
|
case 50:
|
|
iface->cur_mode = KW_I2C_MODE_50KHZ;
|
|
break;
|
|
case 25:
|
|
iface->cur_mode = KW_I2C_MODE_25KHZ;
|
|
break;
|
|
default:
|
|
printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
|
|
(long)*prate);
|
|
}
|
|
|
|
/* Select standard mode by default */
|
|
iface->cur_mode |= KW_I2C_MODE_STANDARD;
|
|
|
|
/* Write mode */
|
|
write_reg(reg_mode, iface->cur_mode);
|
|
|
|
/* Switch interrupts off & clear them*/
|
|
write_reg(reg_ier, 0x00);
|
|
write_reg(reg_isr, KW_I2C_IRQ_MASK);
|
|
|
|
#ifndef POLLED_MODE
|
|
/* Request chip interrupt */
|
|
rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
|
|
if (rc) {
|
|
printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
|
|
iounmap(iface->base);
|
|
kfree(iface);
|
|
pmac_low_i2c_unlock(np);
|
|
return -ENODEV;
|
|
}
|
|
#endif /* POLLED_MODE */
|
|
|
|
pmac_low_i2c_unlock(np);
|
|
dev_set_drvdata(dev, iface);
|
|
|
|
for (i=0; i<nchan; i++) {
|
|
struct keywest_chan* chan = &iface->channels[i];
|
|
u8 addr;
|
|
|
|
sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
|
|
chan->iface = iface;
|
|
chan->chan_no = i;
|
|
chan->adapter.id = I2C_ALGO_SMBUS;
|
|
chan->adapter.algo = &keywest_algorithm;
|
|
chan->adapter.algo_data = NULL;
|
|
chan->adapter.client_register = NULL;
|
|
chan->adapter.client_unregister = NULL;
|
|
i2c_set_adapdata(&chan->adapter, chan);
|
|
chan->adapter.dev.parent = dev;
|
|
|
|
rc = i2c_add_adapter(&chan->adapter);
|
|
if (rc) {
|
|
printk("i2c-keywest.c: Adapter %s registration failed\n",
|
|
chan->adapter.name);
|
|
i2c_set_adapdata(&chan->adapter, NULL);
|
|
}
|
|
if (probe) {
|
|
printk("Probe: ");
|
|
for (addr = 0x00; addr <= 0x7f; addr++) {
|
|
if (i2c_smbus_xfer(&chan->adapter,addr,
|
|
0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
|
|
printk("%02x ", addr);
|
|
}
|
|
printk("\n");
|
|
}
|
|
}
|
|
|
|
printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
|
|
np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
dispose_iface(struct device *dev)
|
|
{
|
|
struct keywest_iface *iface = dev_get_drvdata(dev);
|
|
int i, rc;
|
|
|
|
/* Make sure we stop all activity */
|
|
if (pmac_low_i2c_lock(iface->node))
|
|
return -ENODEV;
|
|
|
|
#ifndef POLLED_MODE
|
|
spin_lock_irq(&iface->lock);
|
|
while (iface->state != state_idle) {
|
|
spin_unlock_irq(&iface->lock);
|
|
msleep(100);
|
|
spin_lock_irq(&iface->lock);
|
|
}
|
|
#endif /* POLLED_MODE */
|
|
iface->state = state_dead;
|
|
#ifndef POLLED_MODE
|
|
spin_unlock_irq(&iface->lock);
|
|
free_irq(iface->irq, iface);
|
|
#endif /* POLLED_MODE */
|
|
|
|
pmac_low_i2c_unlock(iface->node);
|
|
|
|
/* Release all channels */
|
|
for (i=0; i<iface->chan_count; i++) {
|
|
struct keywest_chan* chan = &iface->channels[i];
|
|
if (i2c_get_adapdata(&chan->adapter) == NULL)
|
|
continue;
|
|
rc = i2c_del_adapter(&chan->adapter);
|
|
i2c_set_adapdata(&chan->adapter, NULL);
|
|
/* We aren't that prepared to deal with this... */
|
|
if (rc)
|
|
printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
|
|
}
|
|
iounmap(iface->base);
|
|
dev_set_drvdata(dev, NULL);
|
|
of_node_put(iface->node);
|
|
kfree(iface);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
create_iface_macio(struct macio_dev* dev, const struct of_device_id *match)
|
|
{
|
|
return create_iface(dev->ofdev.node, &dev->ofdev.dev);
|
|
}
|
|
|
|
static int
|
|
dispose_iface_macio(struct macio_dev* dev)
|
|
{
|
|
return dispose_iface(&dev->ofdev.dev);
|
|
}
|
|
|
|
static int
|
|
create_iface_of_platform(struct of_device* dev, const struct of_device_id *match)
|
|
{
|
|
return create_iface(dev->node, &dev->dev);
|
|
}
|
|
|
|
static int
|
|
dispose_iface_of_platform(struct of_device* dev)
|
|
{
|
|
return dispose_iface(&dev->dev);
|
|
}
|
|
|
|
static struct of_device_id i2c_keywest_match[] =
|
|
{
|
|
{
|
|
.type = "i2c",
|
|
.compatible = "keywest"
|
|
},
|
|
{},
|
|
};
|
|
|
|
static struct macio_driver i2c_keywest_macio_driver =
|
|
{
|
|
.name = "i2c-keywest",
|
|
.match_table = i2c_keywest_match,
|
|
.probe = create_iface_macio,
|
|
.remove = dispose_iface_macio
|
|
};
|
|
|
|
static struct of_platform_driver i2c_keywest_of_platform_driver =
|
|
{
|
|
.name = "i2c-keywest",
|
|
.match_table = i2c_keywest_match,
|
|
.probe = create_iface_of_platform,
|
|
.remove = dispose_iface_of_platform
|
|
};
|
|
|
|
static int __init
|
|
i2c_keywest_init(void)
|
|
{
|
|
of_register_driver(&i2c_keywest_of_platform_driver);
|
|
macio_register_driver(&i2c_keywest_macio_driver);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit
|
|
i2c_keywest_cleanup(void)
|
|
{
|
|
of_unregister_driver(&i2c_keywest_of_platform_driver);
|
|
macio_unregister_driver(&i2c_keywest_macio_driver);
|
|
}
|
|
|
|
module_init(i2c_keywest_init);
|
|
module_exit(i2c_keywest_cleanup);
|