1a9ebc0cd2
Currently USB Host isn't functional on the MPC8315E boards, for two reasons as described below. MPC8315 Reference Manual says: "The USB DR unit must have the same clock ratio as the encryption core unit, unless one of them has its clock disabled." The encryption core also drives I2C clock, so it is enabled and is equal to 01. That means USBDRCM should be 01 here. Plus, according to MPC8315E-RDB schematics, USB unit consumes CLK_IN clock from the 24.00MHz oscillator, which means we must adjust REFSEL bits as well. p.s. Idially we should rework whole 83xx/usb.c code, in two steps: 1. Move SCCR code to the U-Boot; 2. Implement fsl,usb-clock property in the device tree, so usb.c could decide what clock exactly to use on per-board basis. Though, today we're not in a hurry since there is just one 8315e board out there. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
64 lines
2.2 KiB
C
64 lines
2.2 KiB
C
#ifndef __MPC83XX_H__
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#define __MPC83XX_H__
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#include <linux/init.h>
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#include <linux/device.h>
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#include <asm/pci-bridge.h>
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/* System Clock Control Register */
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#define MPC83XX_SCCR_OFFS 0xA08
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#define MPC83XX_SCCR_USB_MASK 0x00f00000
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#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
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#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
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#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
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#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
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#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
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#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
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#define MPC8315_SCCR_USB_MASK 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_01 0x00400000
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#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
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/* system i/o configuration register low */
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#define MPC83XX_SICRL_OFFS 0x114
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#define MPC834X_SICRL_USB_MASK 0x60000000
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#define MPC834X_SICRL_USB0 0x40000000
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#define MPC834X_SICRL_USB1 0x20000000
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#define MPC831X_SICRL_USB_MASK 0x00000c00
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#define MPC831X_SICRL_USB_ULPI 0x00000800
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#define MPC837X_SICRL_USB_MASK 0xf0000000
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#define MPC837X_SICRL_USB_ULPI 0x50000000
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/* system i/o configuration register high */
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#define MPC83XX_SICRH_OFFS 0x118
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#define MPC834X_SICRH_USB_UTMI 0x00020000
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#define MPC831X_SICRH_USB_MASK 0x000000e0
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#define MPC831X_SICRH_USB_ULPI 0x000000a0
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/* USB Control Register */
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#define FSL_USB2_CONTROL_OFFS 0x500
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#define CONTROL_UTMI_PHY_EN 0x00000200
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#define CONTROL_REFSEL_24MHZ 0x00000040
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#define CONTROL_REFSEL_48MHZ 0x00000080
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#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
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#define CONTROL_OTG_PORT 0x00000020
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/* USB PORTSC Registers */
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#define FSL_USB2_PORTSC1_OFFS 0x184
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#define FSL_USB2_PORTSC2_OFFS 0x188
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#define PORTSCX_PTW_16BIT 0x10000000
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#define PORTSCX_PTS_UTMI 0x00000000
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#define PORTSCX_PTS_ULPI 0x80000000
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/*
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* Declaration for the various functions exported by the
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* mpc83xx_* files. Mostly for use by mpc83xx_setup
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*/
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extern int mpc83xx_add_bridge(struct device_node *dev);
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extern void mpc83xx_restart(char *cmd);
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extern long mpc83xx_time_init(void);
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extern int mpc834x_usb_cfg(void);
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extern int mpc831x_usb_cfg(void);
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#endif /* __MPC83XX_H__ */
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