222 lines
7.4 KiB
C
222 lines
7.4 KiB
C
/***************************************************************************
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* Copyright (c) 2005-2009, Broadcom Corporation.
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*
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* Name: crystalhd_misc . h
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*
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* Description:
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* BCM70012 Linux driver general purpose routines.
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* Includes reg/mem read and write routines.
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*
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* HISTORY:
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*
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**********************************************************************
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* This file is part of the crystalhd device driver.
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 2 of the License.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver. If not, see <http://www.gnu.org/licenses/>.
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**********************************************************************/
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#ifndef _CRYSTALHD_MISC_H_
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#define _CRYSTALHD_MISC_H_
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#include "crystalhd.h"
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/ioctl.h>
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#include <linux/dma-mapping.h>
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#include <linux/sched.h>
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#include "bc_dts_glob_lnx.h"
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/* Global log level variable defined in crystal_misc.c file */
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extern uint32_t g_linklog_level;
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/* Global element pool for all Queue management.
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* TX: Active = BC_TX_LIST_CNT, Free = BC_TX_LIST_CNT.
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* RX: Free = BC_RX_LIST_CNT, Active = 2
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* FW-CMD: 4
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*/
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#define BC_LINK_ELEM_POOL_SZ ((BC_TX_LIST_CNT * 2) + BC_RX_LIST_CNT + 2 + 4)
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/* Driver's IODATA pool count */
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#define CHD_IODATA_POOL_SZ (BC_IOCTL_DATA_POOL_SIZE * BC_LINK_MAX_OPENS)
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/* Scatter Gather memory pool size for Tx and Rx */
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#define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT)
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enum crystalhd_dio_sig {
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crystalhd_dio_inv = 0,
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crystalhd_dio_locked,
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crystalhd_dio_sg_mapped,
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};
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struct crystalhd_dio_user_info {
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void *xfr_buff;
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uint32_t xfr_len;
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uint32_t uv_offset;
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bool dir_tx;
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uint32_t uv_sg_ix;
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uint32_t uv_sg_off;
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int comp_sts;
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int ev_sts;
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uint32_t y_done_sz;
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uint32_t uv_done_sz;
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uint32_t comp_flags;
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bool b422mode;
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};
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struct crystalhd_dio_req {
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uint32_t sig;
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uint32_t max_pages;
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struct page **pages;
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struct scatterlist *sg;
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int sg_cnt;
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int page_cnt;
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int direction;
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struct crystalhd_dio_user_info uinfo;
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void *fb_va;
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uint32_t fb_size;
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dma_addr_t fb_pa;
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struct crystalhd_dio_req *next;
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};
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#define BC_LINK_DIOQ_SIG (0x09223280)
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struct crystalhd_elem {
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struct crystalhd_elem *flink;
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struct crystalhd_elem *blink;
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void *data;
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uint32_t tag;
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};
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typedef void (*crystalhd_data_free_cb)(void *context, void *data);
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struct crystalhd_dioq {
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uint32_t sig;
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struct crystalhd_adp *adp;
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struct crystalhd_elem *head;
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struct crystalhd_elem *tail;
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uint32_t count;
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spinlock_t lock;
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wait_queue_head_t event;
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crystalhd_data_free_cb data_rel_cb;
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void *cb_context;
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};
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typedef void (*hw_comp_callback)(struct crystalhd_dio_req *,
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wait_queue_head_t *event, enum BC_STATUS sts);
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/*========= Decoder (7412) register access routines.================= */
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uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t);
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void bc_dec_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
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/*========= Link (70012) register access routines.. =================*/
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uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t);
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void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
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/*========= Decoder (7412) memory access routines..=================*/
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enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
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enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
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/*==========Link (70012) PCIe Config access routines.================*/
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enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
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enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t);
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/*========= Linux Kernel Interface routines. ======================= */
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void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *);
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void bc_kern_dma_free(struct crystalhd_adp *, uint32_t,
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void *, dma_addr_t);
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#define crystalhd_create_event(_ev) init_waitqueue_head(_ev)
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#define crystalhd_set_event(_ev) wake_up_interruptible(_ev)
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#define crystalhd_wait_on_event(ev, condition, timeout, ret, nosig) \
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do { \
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DECLARE_WAITQUEUE(entry, current); \
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unsigned long end = jiffies + ((timeout * HZ) / 1000); \
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ret = 0; \
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add_wait_queue(ev, &entry); \
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for (;;) { \
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__set_current_state(TASK_INTERRUPTIBLE); \
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if (condition) { \
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break; \
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} \
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if (time_after_eq(jiffies, end)) { \
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ret = -EBUSY; \
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break; \
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} \
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schedule_timeout((HZ / 100 > 1) ? HZ / 100 : 1); \
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if (!nosig && signal_pending(current)) { \
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ret = -EINTR; \
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break; \
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} \
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} \
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__set_current_state(TASK_RUNNING); \
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remove_wait_queue(ev, &entry); \
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} while (0)
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/*================ Direct IO mapping routines ==================*/
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extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t);
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extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *);
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extern enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t,
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uint32_t, bool, bool, struct crystalhd_dio_req**);
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extern enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, struct crystalhd_dio_req*);
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#define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix])))
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#define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix])))
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/*================ General Purpose Queues ==================*/
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extern enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, struct crystalhd_dioq **, crystalhd_data_free_cb , void *);
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extern void crystalhd_delete_dioq(struct crystalhd_adp *, struct crystalhd_dioq *);
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extern enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data, bool wake, uint32_t tag);
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extern void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq);
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extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag);
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extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs, uint32_t *sig_pend);
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#define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0)
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extern int crystalhd_create_elem_pool(struct crystalhd_adp *, uint32_t);
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extern void crystalhd_delete_elem_pool(struct crystalhd_adp *);
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/*================ Debug routines/macros .. ================================*/
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extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff, uint32_t dwcount);
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enum _chd_log_levels {
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BCMLOG_ERROR = 0x80000000, /* Don't disable this option */
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BCMLOG_DATA = 0x40000000, /* Data, enable by default */
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BCMLOG_SPINLOCK = 0x20000000, /* Spcial case for Spin locks*/
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/* Following are allowed only in debug mode */
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BCMLOG_INFO = 0x00000001, /* Generic informational */
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BCMLOG_DBG = 0x00000002, /* First level Debug info */
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BCMLOG_SSTEP = 0x00000004, /* Stepping information */
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};
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#define BCMLOG(trace, fmt, args...) \
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do { \
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if (g_linklog_level & trace) \
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printk(fmt, ##args); \
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} while (0)
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#define BCMLOG_ERR(fmt, args...) \
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do { \
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if (g_linklog_level & BCMLOG_ERROR) \
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printk(KERN_ERR "*ERR*:%s:%d: "fmt, \
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__FILE__, __LINE__, ##args); \
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} while (0)
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#endif
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