219 lines
6.4 KiB
C
219 lines
6.4 KiB
C
/*
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* External Interrupt Controller on Spider South Bridge
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*
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* Author: Arnd Bergmann <arndb@de.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/pgtable.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include "interrupt.h"
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/* register layout taken from Spider spec, table 7.4-4 */
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enum {
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TIR_DEN = 0x004, /* Detection Enable Register */
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TIR_MSK = 0x084, /* Mask Level Register */
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TIR_EDC = 0x0c0, /* Edge Detection Clear Register */
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TIR_PNDA = 0x100, /* Pending Register A */
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TIR_PNDB = 0x104, /* Pending Register B */
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TIR_CS = 0x144, /* Current Status Register */
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TIR_LCSA = 0x150, /* Level Current Status Register A */
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TIR_LCSB = 0x154, /* Level Current Status Register B */
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TIR_LCSC = 0x158, /* Level Current Status Register C */
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TIR_LCSD = 0x15c, /* Level Current Status Register D */
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TIR_CFGA = 0x200, /* Setting Register A0 */
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TIR_CFGB = 0x204, /* Setting Register B0 */
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/* 0x208 ... 0x3ff Setting Register An/Bn */
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TIR_PPNDA = 0x400, /* Packet Pending Register A */
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TIR_PPNDB = 0x404, /* Packet Pending Register B */
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TIR_PIERA = 0x408, /* Packet Output Error Register A */
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TIR_PIERB = 0x40c, /* Packet Output Error Register B */
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TIR_PIEN = 0x444, /* Packet Output Enable Register */
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TIR_PIPND = 0x454, /* Packet Output Pending Register */
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TIRDID = 0x484, /* Spider Device ID Register */
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REISTIM = 0x500, /* Reissue Command Timeout Time Setting */
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REISTIMEN = 0x504, /* Reissue Command Timeout Setting */
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REISWAITEN = 0x508, /* Reissue Wait Control*/
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};
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static void __iomem *spider_pics[4];
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static void __iomem *spider_get_pic(int irq)
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{
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int node = irq / IIC_NODE_STRIDE;
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irq %= IIC_NODE_STRIDE;
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if (irq >= IIC_EXT_OFFSET &&
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irq < IIC_EXT_OFFSET + IIC_NUM_EXT &&
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spider_pics)
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return spider_pics[node];
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return NULL;
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}
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static int spider_get_nr(unsigned int irq)
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{
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return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET;
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}
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static void __iomem *spider_get_irq_config(int irq)
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{
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void __iomem *pic;
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pic = spider_get_pic(irq);
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return pic + TIR_CFGA + 8 * spider_get_nr(irq);
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}
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static void spider_unmask_irq(unsigned int irq)
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{
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int nodeid = (irq / IIC_NODE_STRIDE) * 0x10;
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void __iomem *cfg = spider_get_irq_config(irq);
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irq = spider_get_nr(irq);
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/* FIXME: Most of that is configuration and has nothing to do with enabling/disable,
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* besides, it's also partially bogus.
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*/
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out_be32(cfg, (in_be32(cfg) & ~0xf0)| 0x3107000eu | nodeid);
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out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq);
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}
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static void spider_mask_irq(unsigned int irq)
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{
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void __iomem *cfg = spider_get_irq_config(irq);
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irq = spider_get_nr(irq);
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out_be32(cfg, in_be32(cfg) & ~0x30000000u);
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}
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static void spider_ack_irq(unsigned int irq)
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{
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/* Should reset edge detection logic but we don't configure any edge interrupt
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* at the moment.
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*/
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}
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static struct irq_chip spider_pic = {
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.typename = " SPIDER ",
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.unmask = spider_unmask_irq,
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.mask = spider_mask_irq,
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.ack = spider_ack_irq,
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};
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static int spider_get_irq(int node)
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{
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unsigned long cs;
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void __iomem *regs = spider_pics[node];
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cs = in_be32(regs + TIR_CS) >> 24;
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if (cs == 63)
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return -1;
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else
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return cs;
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}
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static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs)
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{
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int node = (int)(long)desc->handler_data;
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int cascade_irq;
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cascade_irq = spider_get_irq(node);
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generic_handle_irq(cascade_irq, regs);
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desc->chip->eoi(irq);
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}
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/* hardcoded part to be compatible with older firmware */
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static void __init spider_init_one(int node, unsigned long addr)
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{
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int n, irq;
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spider_pics[node] = ioremap(addr, 0x800);
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if (spider_pics[node] == NULL)
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panic("spider_pic: can't map registers !");
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printk(KERN_INFO "spider_pic: mapped for node %d, addr: 0x%lx mapped to %p\n",
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node, addr, spider_pics[node]);
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for (n = 0; n < IIC_NUM_EXT; n++) {
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if (n == IIC_EXT_CASCADE)
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continue;
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irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
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set_irq_chip_and_handler(irq, &spider_pic, handle_level_irq);
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get_irq_desc(irq)->status |= IRQ_LEVEL;
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}
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/* do not mask any interrupts because of level */
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out_be32(spider_pics[node] + TIR_MSK, 0x0);
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/* disable edge detection clear */
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/* out_be32(spider_pics[node] + TIR_EDC, 0x0); */
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/* enable interrupt packets to be output */
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out_be32(spider_pics[node] + TIR_PIEN,
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in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
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/* Hook up cascade */
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irq = IIC_EXT_CASCADE + node * IIC_NODE_STRIDE;
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set_irq_data(irq, (void *)(long)node);
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set_irq_chained_handler(irq, spider_irq_cascade);
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/* Enable the interrupt detection enable bit. Do this last! */
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out_be32(spider_pics[node] + TIR_DEN,
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in_be32(spider_pics[node] + TIR_DEN) | 0x1);
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}
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void __init spider_init_IRQ(void)
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{
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unsigned long *spider_reg;
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struct device_node *dn;
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char *compatible;
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int node = 0;
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/* XXX node numbers are totally bogus. We _hope_ we get the device nodes in the right
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* order here but that's definitely not guaranteed, we need to get the node from the
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* device tree instead. There is currently no proper property for it (but our whole
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* device-tree is bogus anyway) so all we can do is pray or maybe test the address
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* and deduce the node-id
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*/
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for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
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compatible = (char *)get_property(dn, "compatible", NULL);
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if (!compatible)
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continue;
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if (strstr(compatible, "CBEA,platform-spider-pic"))
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spider_reg = (unsigned long *)get_property(dn, "reg", NULL);
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else if (strstr(compatible, "sti,platform-spider-pic") && (node < 2)) {
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static long hard_coded_pics[] = { 0x24000008000, 0x34000008000 };
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spider_reg = &hard_coded_pics[node];
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} else
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continue;
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if (spider_reg == NULL)
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printk(KERN_ERR "spider_pic: No address for node %d\n", node);
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spider_init_one(node, *spider_reg);
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node++;
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}
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}
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