ae63b13bbe
This patch adds support for PCA9541, an I2C Bus Master Selector. The driver is modeled as single channel I2C Multiplexer to be able to utilize the I2C multiplexer framework. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Reviewed-by: Tom Grennan <tom.grennan@ericsson.com> Acked-by: Jean Delvare <khali@linux-fr.org>
411 lines
10 KiB
C
411 lines
10 KiB
C
/*
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* I2C multiplexer driver for PCA9541 bus master selector
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*
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* Copyright (c) 2010 Ericsson AB.
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*
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* Author: Guenter Roeck <guenter.roeck@ericsson.com>
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*
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* Derived from:
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* pca954x.c
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*
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* Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
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* Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/jiffies.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-mux.h>
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#include <linux/i2c/pca954x.h>
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/*
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* The PCA9541 is a bus master selector. It supports two I2C masters connected
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* to a single slave bus.
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*
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* Before each bus transaction, a master has to acquire bus ownership. After the
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* transaction is complete, bus ownership has to be released. This fits well
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* into the I2C multiplexer framework, which provides select and release
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* functions for this purpose. For this reason, this driver is modeled as
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* single-channel I2C bus multiplexer.
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*
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* This driver assumes that the two bus masters are controlled by two different
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* hosts. If a single host controls both masters, platform code has to ensure
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* that only one of the masters is instantiated at any given time.
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*/
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#define PCA9541_CONTROL 0x01
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#define PCA9541_ISTAT 0x02
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#define PCA9541_CTL_MYBUS (1 << 0)
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#define PCA9541_CTL_NMYBUS (1 << 1)
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#define PCA9541_CTL_BUSON (1 << 2)
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#define PCA9541_CTL_NBUSON (1 << 3)
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#define PCA9541_CTL_BUSINIT (1 << 4)
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#define PCA9541_CTL_TESTON (1 << 6)
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#define PCA9541_CTL_NTESTON (1 << 7)
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#define PCA9541_ISTAT_INTIN (1 << 0)
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#define PCA9541_ISTAT_BUSINIT (1 << 1)
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#define PCA9541_ISTAT_BUSOK (1 << 2)
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#define PCA9541_ISTAT_BUSLOST (1 << 3)
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#define PCA9541_ISTAT_MYTEST (1 << 6)
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#define PCA9541_ISTAT_NMYTEST (1 << 7)
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#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
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#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
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#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
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#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
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/* arbitration timeouts, in jiffies */
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#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
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#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
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/* arbitration retry delays, in us */
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#define SELECT_DELAY_SHORT 50
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#define SELECT_DELAY_LONG 1000
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struct pca9541 {
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struct i2c_adapter *mux_adap;
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unsigned long select_timeout;
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unsigned long arb_timeout;
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};
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static const struct i2c_device_id pca9541_id[] = {
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{"pca9541", 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, pca9541_id);
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/*
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* Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
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* as they will try to lock the adapter a second time.
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*/
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static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
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{
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struct i2c_adapter *adap = client->adapter;
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int ret;
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if (adap->algo->master_xfer) {
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struct i2c_msg msg;
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char buf[2];
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msg.addr = client->addr;
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msg.flags = 0;
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msg.len = 2;
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buf[0] = command;
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buf[1] = val;
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msg.buf = buf;
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ret = adap->algo->master_xfer(adap, &msg, 1);
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} else {
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union i2c_smbus_data data;
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data.byte = val;
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ret = adap->algo->smbus_xfer(adap, client->addr,
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client->flags,
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I2C_SMBUS_WRITE,
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command,
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I2C_SMBUS_BYTE_DATA, &data);
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}
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return ret;
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}
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/*
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* Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
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* as they will try to lock adapter a second time.
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*/
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static int pca9541_reg_read(struct i2c_client *client, u8 command)
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{
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struct i2c_adapter *adap = client->adapter;
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int ret;
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u8 val;
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if (adap->algo->master_xfer) {
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struct i2c_msg msg[2] = {
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{
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.addr = client->addr,
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.flags = 0,
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.len = 1,
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.buf = &command
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},
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{
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.addr = client->addr,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = &val
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}
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};
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ret = adap->algo->master_xfer(adap, msg, 2);
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if (ret == 2)
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ret = val;
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else if (ret >= 0)
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ret = -EIO;
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} else {
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union i2c_smbus_data data;
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ret = adap->algo->smbus_xfer(adap, client->addr,
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client->flags,
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I2C_SMBUS_READ,
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command,
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I2C_SMBUS_BYTE_DATA, &data);
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if (!ret)
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ret = data.byte;
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}
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return ret;
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}
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/*
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* Arbitration management functions
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*/
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/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
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static void pca9541_release_bus(struct i2c_client *client)
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{
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int reg;
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reg = pca9541_reg_read(client, PCA9541_CONTROL);
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if (reg >= 0 && !busoff(reg) && mybus(reg))
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pca9541_reg_write(client, PCA9541_CONTROL,
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(reg & PCA9541_CTL_NBUSON) >> 1);
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}
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/*
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* Arbitration is defined as a two-step process. A bus master can only activate
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* the slave bus if it owns it; otherwise it has to request ownership first.
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* This multi-step process ensures that access contention is resolved
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* gracefully.
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*
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* Bus Ownership Other master Action
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* state requested access
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* ----------------------------------------------------
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* off - yes wait for arbitration timeout or
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* for other master to drop request
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* off no no take ownership
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* off yes no turn on bus
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* on yes - done
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* on no - wait for arbitration timeout or
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* for other master to release bus
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*
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* The main contention point occurs if the slave bus is off and both masters
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* request ownership at the same time. In this case, one master will turn on
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* the slave bus, believing that it owns it. The other master will request
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* bus ownership. Result is that the bus is turned on, and master which did
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* _not_ own the slave bus before ends up owning it.
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*/
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/* Control commands per PCA9541 datasheet */
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static const u8 pca9541_control[16] = {
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4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
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};
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/*
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* Channel arbitration
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*
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* Return values:
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* <0: error
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* 0 : bus not acquired
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* 1 : bus acquired
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*/
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static int pca9541_arbitrate(struct i2c_client *client)
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{
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struct pca9541 *data = i2c_get_clientdata(client);
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int reg;
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reg = pca9541_reg_read(client, PCA9541_CONTROL);
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if (reg < 0)
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return reg;
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if (busoff(reg)) {
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int istat;
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/*
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* Bus is off. Request ownership or turn it on unless
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* other master requested ownership.
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*/
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istat = pca9541_reg_read(client, PCA9541_ISTAT);
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if (!(istat & PCA9541_ISTAT_NMYTEST)
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|| time_is_before_eq_jiffies(data->arb_timeout)) {
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/*
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* Other master did not request ownership,
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* or arbitration timeout expired. Take the bus.
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*/
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pca9541_reg_write(client,
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PCA9541_CONTROL,
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pca9541_control[reg & 0x0f]
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| PCA9541_CTL_NTESTON);
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data->select_timeout = SELECT_DELAY_SHORT;
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} else {
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/*
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* Other master requested ownership.
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* Set extra long timeout to give it time to acquire it.
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*/
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data->select_timeout = SELECT_DELAY_LONG * 2;
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}
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} else if (mybus(reg)) {
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/*
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* Bus is on, and we own it. We are done with acquisition.
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* Reset NTESTON and BUSINIT, then return success.
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*/
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if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
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pca9541_reg_write(client,
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PCA9541_CONTROL,
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reg & ~(PCA9541_CTL_NTESTON
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| PCA9541_CTL_BUSINIT));
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return 1;
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} else {
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/*
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* Other master owns the bus.
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* If arbitration timeout has expired, force ownership.
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* Otherwise request it.
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*/
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data->select_timeout = SELECT_DELAY_LONG;
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if (time_is_before_eq_jiffies(data->arb_timeout)) {
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/* Time is up, take the bus and reset it. */
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pca9541_reg_write(client,
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PCA9541_CONTROL,
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pca9541_control[reg & 0x0f]
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| PCA9541_CTL_BUSINIT
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| PCA9541_CTL_NTESTON);
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} else {
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/* Request bus ownership if needed */
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if (!(reg & PCA9541_CTL_NTESTON))
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pca9541_reg_write(client,
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PCA9541_CONTROL,
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reg | PCA9541_CTL_NTESTON);
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}
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}
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return 0;
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}
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static int pca9541_select_chan(struct i2c_adapter *adap, void *client, u32 chan)
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{
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struct pca9541 *data = i2c_get_clientdata(client);
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int ret;
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unsigned long timeout = jiffies + ARB2_TIMEOUT;
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/* give up after this time */
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data->arb_timeout = jiffies + ARB_TIMEOUT;
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/* force bus ownership after this time */
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do {
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ret = pca9541_arbitrate(client);
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if (ret)
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return ret < 0 ? ret : 0;
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if (data->select_timeout == SELECT_DELAY_SHORT)
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udelay(data->select_timeout);
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else
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msleep(data->select_timeout / 1000);
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} while (time_is_after_eq_jiffies(timeout));
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return -ETIMEDOUT;
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}
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static int pca9541_release_chan(struct i2c_adapter *adap,
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void *client, u32 chan)
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{
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pca9541_release_bus(client);
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return 0;
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}
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/*
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* I2C init/probing/exit functions
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*/
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static int pca9541_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct i2c_adapter *adap = client->adapter;
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struct pca954x_platform_data *pdata = client->dev.platform_data;
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struct pca9541 *data;
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int force;
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int ret = -ENODEV;
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if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
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goto err;
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data = kzalloc(sizeof(struct pca9541), GFP_KERNEL);
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if (!data) {
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ret = -ENOMEM;
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goto err;
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}
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i2c_set_clientdata(client, data);
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/*
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* I2C accesses are unprotected here.
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* We have to lock the adapter before releasing the bus.
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*/
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i2c_lock_adapter(adap);
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pca9541_release_bus(client);
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i2c_unlock_adapter(adap);
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/* Create mux adapter */
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force = 0;
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if (pdata)
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force = pdata->modes[0].adap_id;
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data->mux_adap = i2c_add_mux_adapter(adap, client, force, 0,
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pca9541_select_chan,
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pca9541_release_chan);
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if (data->mux_adap == NULL) {
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dev_err(&client->dev, "failed to register master selector\n");
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goto exit_free;
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}
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dev_info(&client->dev, "registered master selector for I2C %s\n",
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client->name);
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return 0;
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exit_free:
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kfree(data);
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err:
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return ret;
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}
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static int pca9541_remove(struct i2c_client *client)
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{
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struct pca9541 *data = i2c_get_clientdata(client);
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i2c_del_mux_adapter(data->mux_adap);
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kfree(data);
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return 0;
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}
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static struct i2c_driver pca9541_driver = {
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.driver = {
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.name = "pca9541",
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.owner = THIS_MODULE,
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},
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.probe = pca9541_probe,
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.remove = pca9541_remove,
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.id_table = pca9541_id,
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};
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static int __init pca9541_init(void)
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{
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return i2c_add_driver(&pca9541_driver);
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}
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static void __exit pca9541_exit(void)
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{
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i2c_del_driver(&pca9541_driver);
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}
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module_init(pca9541_init);
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module_exit(pca9541_exit);
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MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
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MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
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MODULE_LICENSE("GPL v2");
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