793 lines
21 KiB
C
793 lines
21 KiB
C
/**************************************************************************
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* Copyright (c) 2009, Intel Corporation.
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* All Rights Reserved.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Benjamin Defnet <benjamin.r.defnet@intel.com>
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* Rajesh Poornachandran <rajesh.poornachandran@intel.com>
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*
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*/
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#include "psb_powermgmt.h"
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#include "psb_drv.h"
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#include "psb_intel_reg.h"
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#include <linux/mutex.h>
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#include <linux/pm_runtime.h>
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#undef OSPM_GFX_DPK
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extern u32 gui32SGXDeviceID;
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extern u32 gui32MRSTDisplayDeviceID;
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extern u32 gui32MRSTMSVDXDeviceID;
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extern u32 gui32MRSTTOPAZDeviceID;
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struct drm_device *gpDrmDevice = NULL;
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static struct mutex power_mutex;
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static bool gbSuspendInProgress = false;
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static bool gbResumeInProgress = false;
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static int g_hw_power_status_mask;
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static atomic_t g_display_access_count;
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static atomic_t g_graphics_access_count;
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static atomic_t g_videoenc_access_count;
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static atomic_t g_videodec_access_count;
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int allow_runtime_pm = 0;
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void ospm_power_island_up(int hw_islands);
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void ospm_power_island_down(int hw_islands);
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static bool gbSuspended = false;
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bool gbgfxsuspended = false;
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/*
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* ospm_power_init
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*
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* Description: Initialize this ospm power management module
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*/
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void ospm_power_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = (struct drm_psb_private *)dev->dev_private;
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gpDrmDevice = dev;
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dev_priv->apm_base = dev_priv->apm_reg & 0xffff;
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dev_priv->ospm_base &= 0xffff;
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mutex_init(&power_mutex);
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g_hw_power_status_mask = OSPM_ALL_ISLANDS;
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atomic_set(&g_display_access_count, 0);
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atomic_set(&g_graphics_access_count, 0);
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atomic_set(&g_videoenc_access_count, 0);
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atomic_set(&g_videodec_access_count, 0);
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}
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/*
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* ospm_power_uninit
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*
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* Description: Uninitialize this ospm power management module
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*/
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void ospm_power_uninit(void)
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{
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mutex_destroy(&power_mutex);
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pm_runtime_disable(&gpDrmDevice->pdev->dev);
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pm_runtime_set_suspended(&gpDrmDevice->pdev->dev);
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}
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/*
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* save_display_registers
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*
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* Description: We are going to suspend so save current display
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* register state.
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*/
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static int save_display_registers(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct drm_crtc * crtc;
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struct drm_connector * connector;
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/* Display arbitration control + watermarks */
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dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
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dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
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dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
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dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
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dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
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dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
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dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
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dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
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/*save crtc and output state*/
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mutex_lock(&dev->mode_config.mutex);
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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if(drm_helper_crtc_in_use(crtc)) {
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crtc->funcs->save(crtc);
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}
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}
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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connector->funcs->save(connector);
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}
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mutex_unlock(&dev->mode_config.mutex);
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/* Interrupt state */
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/*
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* Handled in psb_irq.c
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*/
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return 0;
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}
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/*
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* restore_display_registers
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*
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* Description: We are going to resume so restore display register state.
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*/
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static int restore_display_registers(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct drm_crtc * crtc;
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struct drm_connector * connector;
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/* Display arbitration + watermarks */
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PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
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PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
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PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
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PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
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PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
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PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
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PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
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PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
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/*make sure VGA plane is off. it initializes to on after reset!*/
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PSB_WVDC32(0x80000000, VGACNTRL);
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mutex_lock(&dev->mode_config.mutex);
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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if(drm_helper_crtc_in_use(crtc))
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crtc->funcs->restore(crtc);
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}
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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connector->funcs->restore(connector);
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}
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mutex_unlock(&dev->mode_config.mutex);
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/*Interrupt state*/
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/*
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* Handled in psb_irq.c
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*/
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return 0;
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}
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/*
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* powermgmt_suspend_display
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*
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* Description: Suspend the display hardware saving state and disabling
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* as necessary.
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*/
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void ospm_suspend_display(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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int pp_stat, ret=0;
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printk(KERN_ALERT "%s \n", __func__);
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "%s \n", __func__);
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#endif
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if (!(g_hw_power_status_mask & OSPM_DISPLAY_ISLAND))
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return;
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save_display_registers(dev);
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if (dev_priv->iLVDS_enable) {
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/*shutdown the panel*/
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PSB_WVDC32(0, PP_CONTROL);
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do {
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pp_stat = PSB_RVDC32(PP_STATUS);
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} while (pp_stat & 0x80000000);
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/*turn off the plane*/
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PSB_WVDC32(0x58000000, DSPACNTR);
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PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
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/*wait ~4 ticks*/
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msleep(4);
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/*turn off pipe*/
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PSB_WVDC32(0x0, PIPEACONF);
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/*wait ~8 ticks*/
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msleep(8);
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/*turn off PLLs*/
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PSB_WVDC32(0, MRST_DPLL_A);
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} else {
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PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
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PSB_WVDC32(0x0, PIPEACONF);
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PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
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while (REG_READ(0x70008) & 0x40000000);
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while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
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!= DPI_FIFO_EMPTY);
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PSB_WVDC32(0, DEVICE_READY_REG);
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/* turn off panel power */
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ret = 0;
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}
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ospm_power_island_down(OSPM_DISPLAY_ISLAND);
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}
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/*
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* ospm_resume_display
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*
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* Description: Resume the display hardware restoring state and enabling
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* as necessary.
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*/
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void ospm_resume_display(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_gtt *pg = dev_priv->pg;
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printk(KERN_ALERT "%s \n", __func__);
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "%s \n", __func__);
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#endif
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if (g_hw_power_status_mask & OSPM_DISPLAY_ISLAND)
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return;
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/* turn on the display power island */
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ospm_power_island_up(OSPM_DISPLAY_ISLAND);
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PSB_WVDC32(pg->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
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pci_write_config_word(pdev, PSB_GMCH_CTRL,
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pg->gmch_ctrl | _PSB_GMCH_ENABLED);
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/* Don't reinitialize the GTT as it is unnecessary. The gtt is
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* stored in memory so it will automatically be restored. All
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* we need to do is restore the PGETBL_CTL which we already do
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* above.
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*/
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/*psb_gtt_init(dev_priv->pg, 1);*/
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restore_display_registers(dev);
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}
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#if 1
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/*
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* ospm_suspend_pci
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*
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* Description: Suspend the pci device saving state and disabling
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* as necessary.
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*/
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static void ospm_suspend_pci(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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struct drm_psb_private *dev_priv = dev->dev_private;
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int bsm, vbt;
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if (gbSuspended)
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return;
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "ospm_suspend_pci\n");
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#endif
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pci_save_state(pdev);
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pci_read_config_dword(pdev, 0x5C, &bsm);
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dev_priv->saveBSM = bsm;
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pci_read_config_dword(pdev, 0xFC, &vbt);
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dev_priv->saveVBT = vbt;
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pci_read_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, &dev_priv->msi_addr);
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pci_read_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, &dev_priv->msi_data);
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pci_disable_device(pdev);
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pci_set_power_state(pdev, PCI_D3hot);
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gbSuspended = true;
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gbgfxsuspended = true;
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}
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/*
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* ospm_resume_pci
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*
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* Description: Resume the pci device restoring state and enabling
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* as necessary.
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*/
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static bool ospm_resume_pci(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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struct drm_psb_private *dev_priv = dev->dev_private;
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int ret = 0;
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if (!gbSuspended)
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return true;
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "ospm_resume_pci\n");
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#endif
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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pci_write_config_dword(pdev, 0x5c, dev_priv->saveBSM);
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pci_write_config_dword(pdev, 0xFC, dev_priv->saveVBT);
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/* retoring MSI address and data in PCIx space */
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pci_write_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, dev_priv->msi_addr);
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pci_write_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, dev_priv->msi_data);
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ret = pci_enable_device(pdev);
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if (ret != 0)
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printk(KERN_ALERT "ospm_resume_pci: pci_enable_device failed: %d\n", ret);
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else
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gbSuspended = false;
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return !gbSuspended;
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}
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#endif
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/*
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* ospm_power_suspend
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*
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* Description: OSPM is telling our driver to suspend so save state
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* and power down all hardware.
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*/
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int ospm_power_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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int ret = 0;
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int graphics_access_count;
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int videoenc_access_count;
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int videodec_access_count;
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int display_access_count;
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bool suspend_pci = true;
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if(gbSuspendInProgress || gbResumeInProgress)
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{
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "OSPM_GFX_DPK: %s system BUSY \n", __func__);
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#endif
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return -EBUSY;
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}
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mutex_lock(&power_mutex);
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if (!gbSuspended) {
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graphics_access_count = atomic_read(&g_graphics_access_count);
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videoenc_access_count = atomic_read(&g_videoenc_access_count);
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videodec_access_count = atomic_read(&g_videodec_access_count);
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display_access_count = atomic_read(&g_display_access_count);
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if (graphics_access_count ||
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videoenc_access_count ||
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videodec_access_count ||
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display_access_count)
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ret = -EBUSY;
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if (!ret) {
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gbSuspendInProgress = true;
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psb_irq_uninstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
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ospm_suspend_display(gpDrmDevice);
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if (suspend_pci == true) {
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ospm_suspend_pci(pdev);
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}
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gbSuspendInProgress = false;
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} else {
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printk(KERN_ALERT "ospm_power_suspend: device busy: graphics %d videoenc %d videodec %d display %d\n", graphics_access_count, videoenc_access_count, videodec_access_count, display_access_count);
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}
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}
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mutex_unlock(&power_mutex);
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return ret;
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}
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/*
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* ospm_power_island_up
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*
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* Description: Restore power to the specified island(s) (powergating)
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*/
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void ospm_power_island_up(int hw_islands)
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{
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u32 pwr_cnt = 0;
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u32 pwr_sts = 0;
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u32 pwr_mask = 0;
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struct drm_psb_private *dev_priv =
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(struct drm_psb_private *) gpDrmDevice->dev_private;
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if (hw_islands & OSPM_DISPLAY_ISLAND) {
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pwr_mask = PSB_PWRGT_DISPLAY_MASK;
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pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
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pwr_cnt &= ~pwr_mask;
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outl(pwr_cnt, (dev_priv->ospm_base + PSB_PM_SSC));
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while (true) {
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pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
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if ((pwr_sts & pwr_mask) == 0)
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break;
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else
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udelay(10);
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}
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}
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g_hw_power_status_mask |= hw_islands;
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}
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/*
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* ospm_power_resume
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*/
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int ospm_power_resume(struct pci_dev *pdev)
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{
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if(gbSuspendInProgress || gbResumeInProgress)
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{
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "OSPM_GFX_DPK: %s hw_island: Suspend || gbResumeInProgress!!!! \n", __func__);
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#endif
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return 0;
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}
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mutex_lock(&power_mutex);
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#ifdef OSPM_GFX_DPK
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printk(KERN_ALERT "OSPM_GFX_DPK: ospm_power_resume \n");
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#endif
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gbResumeInProgress = true;
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ospm_resume_pci(pdev);
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ospm_resume_display(gpDrmDevice->pdev);
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psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
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psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
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gbResumeInProgress = false;
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mutex_unlock(&power_mutex);
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return 0;
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}
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/*
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* ospm_power_island_down
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*
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* Description: Cut power to the specified island(s) (powergating)
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*/
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void ospm_power_island_down(int islands)
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{
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#if 0
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u32 pwr_cnt = 0;
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u32 pwr_mask = 0;
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u32 pwr_sts = 0;
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struct drm_psb_private *dev_priv =
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(struct drm_psb_private *) gpDrmDevice->dev_private;
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g_hw_power_status_mask &= ~islands;
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if (islands & OSPM_GRAPHICS_ISLAND) {
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pwr_cnt |= PSB_PWRGT_GFX_MASK;
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pwr_mask |= PSB_PWRGT_GFX_MASK;
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if (dev_priv->graphics_state == PSB_PWR_STATE_ON) {
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dev_priv->gfx_on_time += (jiffies - dev_priv->gfx_last_mode_change) * 1000 / HZ;
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dev_priv->gfx_last_mode_change = jiffies;
|
|
dev_priv->graphics_state = PSB_PWR_STATE_OFF;
|
|
dev_priv->gfx_off_cnt++;
|
|
}
|
|
}
|
|
if (islands & OSPM_VIDEO_ENC_ISLAND) {
|
|
pwr_cnt |= PSB_PWRGT_VID_ENC_MASK;
|
|
pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
|
|
}
|
|
if (islands & OSPM_VIDEO_DEC_ISLAND) {
|
|
pwr_cnt |= PSB_PWRGT_VID_DEC_MASK;
|
|
pwr_mask |= PSB_PWRGT_VID_DEC_MASK;
|
|
}
|
|
if (pwr_cnt) {
|
|
pwr_cnt |= inl(dev_priv->apm_base);
|
|
outl(pwr_cnt, dev_priv->apm_base + PSB_APM_CMD);
|
|
while (true) {
|
|
pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
|
|
|
|
if ((pwr_sts & pwr_mask) == pwr_mask)
|
|
break;
|
|
else
|
|
udelay(10);
|
|
}
|
|
}
|
|
|
|
if (islands & OSPM_DISPLAY_ISLAND) {
|
|
pwr_mask = PSB_PWRGT_DISPLAY_MASK;
|
|
|
|
outl(pwr_mask, (dev_priv->ospm_base + PSB_PM_SSC));
|
|
|
|
while (true) {
|
|
pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
|
|
if ((pwr_sts & pwr_mask) == pwr_mask)
|
|
break;
|
|
else
|
|
udelay(10);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
|
|
/*
|
|
* ospm_power_is_hw_on
|
|
*
|
|
* Description: do an instantaneous check for if the specified islands
|
|
* are on. Only use this in cases where you know the g_state_change_mutex
|
|
* is already held such as in irq install/uninstall. Otherwise, use
|
|
* ospm_power_using_hw_begin().
|
|
*/
|
|
bool ospm_power_is_hw_on(int hw_islands)
|
|
{
|
|
return ((g_hw_power_status_mask & hw_islands) == hw_islands) ? true:false;
|
|
}
|
|
|
|
/*
|
|
* ospm_power_using_hw_begin
|
|
*
|
|
* Description: Notify PowerMgmt module that you will be accessing the
|
|
* specified island's hw so don't power it off. If force_on is true,
|
|
* this will power on the specified island if it is off.
|
|
* Otherwise, this will return false and the caller is expected to not
|
|
* access the hw.
|
|
*
|
|
* NOTE *** If this is called from and interrupt handler or other atomic
|
|
* context, then it will return false if we are in the middle of a
|
|
* power state transition and the caller will be expected to handle that
|
|
* even if force_on is set to true.
|
|
*/
|
|
bool ospm_power_using_hw_begin(int hw_island, UHBUsage usage)
|
|
{
|
|
return 1; /*FIXMEAC */
|
|
#if 0
|
|
bool ret = true;
|
|
bool island_is_off = false;
|
|
bool b_atomic = (in_interrupt() || in_atomic());
|
|
bool locked = true;
|
|
struct pci_dev *pdev = gpDrmDevice->pdev;
|
|
u32 deviceID = 0;
|
|
bool force_on = usage ? true: false;
|
|
/*quick path, not 100% race safe, but should be enough comapre to current other code in this file */
|
|
if (!force_on) {
|
|
if (hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask))
|
|
return false;
|
|
else {
|
|
locked = false;
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
/* increment pm_runtime_refcount */
|
|
pm_runtime_get(&pdev->dev);
|
|
#endif
|
|
goto increase_count;
|
|
}
|
|
}
|
|
|
|
|
|
if (!b_atomic)
|
|
mutex_lock(&power_mutex);
|
|
|
|
island_is_off = hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask);
|
|
|
|
if (b_atomic && (gbSuspendInProgress || gbResumeInProgress || gbSuspended) && force_on && island_is_off)
|
|
ret = false;
|
|
|
|
if (ret && island_is_off && !force_on)
|
|
ret = false;
|
|
|
|
if (ret && island_is_off && force_on) {
|
|
gbResumeInProgress = true;
|
|
|
|
ret = ospm_resume_pci(pdev);
|
|
|
|
if (ret) {
|
|
switch(hw_island)
|
|
{
|
|
case OSPM_DISPLAY_ISLAND:
|
|
deviceID = gui32MRSTDisplayDeviceID;
|
|
ospm_resume_display(pdev);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
break;
|
|
case OSPM_GRAPHICS_ISLAND:
|
|
deviceID = gui32SGXDeviceID;
|
|
ospm_power_island_up(OSPM_GRAPHICS_ISLAND);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
|
|
break;
|
|
#if 1
|
|
case OSPM_VIDEO_DEC_ISLAND:
|
|
if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
|
|
//printk(KERN_ALERT "%s power on display for video decode use\n", __func__);
|
|
deviceID = gui32MRSTDisplayDeviceID;
|
|
ospm_resume_display(pdev);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
}
|
|
else{
|
|
//printk(KERN_ALERT "%s display is already on for video decode use\n", __func__);
|
|
}
|
|
|
|
if(!ospm_power_is_hw_on(OSPM_VIDEO_DEC_ISLAND)) {
|
|
//printk(KERN_ALERT "%s power on video decode\n", __func__);
|
|
deviceID = gui32MRSTMSVDXDeviceID;
|
|
ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
|
|
}
|
|
else{
|
|
//printk(KERN_ALERT "%s video decode is already on\n", __func__);
|
|
}
|
|
|
|
break;
|
|
case OSPM_VIDEO_ENC_ISLAND:
|
|
if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
|
|
//printk(KERN_ALERT "%s power on display for video encode\n", __func__);
|
|
deviceID = gui32MRSTDisplayDeviceID;
|
|
ospm_resume_display(pdev);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
|
|
}
|
|
else{
|
|
//printk(KERN_ALERT "%s display is already on for video encode use\n", __func__);
|
|
}
|
|
|
|
if(!ospm_power_is_hw_on(OSPM_VIDEO_ENC_ISLAND)) {
|
|
//printk(KERN_ALERT "%s power on video encode\n", __func__);
|
|
deviceID = gui32MRSTTOPAZDeviceID;
|
|
ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
|
|
psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
|
|
psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
|
|
}
|
|
else{
|
|
//printk(KERN_ALERT "%s video decode is already on\n", __func__);
|
|
}
|
|
#endif
|
|
break;
|
|
|
|
default:
|
|
printk(KERN_ALERT "%s unknown island !!!! \n", __func__);
|
|
break;
|
|
}
|
|
|
|
}
|
|
|
|
if (!ret)
|
|
printk(KERN_ALERT "ospm_power_using_hw_begin: forcing on %d failed\n", hw_island);
|
|
|
|
gbResumeInProgress = false;
|
|
}
|
|
increase_count:
|
|
if (ret) {
|
|
switch(hw_island)
|
|
{
|
|
case OSPM_GRAPHICS_ISLAND:
|
|
atomic_inc(&g_graphics_access_count);
|
|
break;
|
|
case OSPM_VIDEO_ENC_ISLAND:
|
|
atomic_inc(&g_videoenc_access_count);
|
|
break;
|
|
case OSPM_VIDEO_DEC_ISLAND:
|
|
atomic_inc(&g_videodec_access_count);
|
|
break;
|
|
case OSPM_DISPLAY_ISLAND:
|
|
atomic_inc(&g_display_access_count);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!b_atomic && locked)
|
|
mutex_unlock(&power_mutex);
|
|
|
|
return ret;
|
|
#endif
|
|
}
|
|
|
|
|
|
/*
|
|
* ospm_power_using_hw_end
|
|
*
|
|
* Description: Notify PowerMgmt module that you are done accessing the
|
|
* specified island's hw so feel free to power it off. Note that this
|
|
* function doesn't actually power off the islands.
|
|
*/
|
|
void ospm_power_using_hw_end(int hw_island)
|
|
{
|
|
#if 0 /* FIXMEAC */
|
|
switch(hw_island)
|
|
{
|
|
case OSPM_GRAPHICS_ISLAND:
|
|
atomic_dec(&g_graphics_access_count);
|
|
break;
|
|
case OSPM_VIDEO_ENC_ISLAND:
|
|
atomic_dec(&g_videoenc_access_count);
|
|
break;
|
|
case OSPM_VIDEO_DEC_ISLAND:
|
|
atomic_dec(&g_videodec_access_count);
|
|
break;
|
|
case OSPM_DISPLAY_ISLAND:
|
|
atomic_dec(&g_display_access_count);
|
|
break;
|
|
}
|
|
|
|
//decrement runtime pm ref count
|
|
pm_runtime_put(&gpDrmDevice->pdev->dev);
|
|
|
|
WARN_ON(atomic_read(&g_graphics_access_count) < 0);
|
|
WARN_ON(atomic_read(&g_videoenc_access_count) < 0);
|
|
WARN_ON(atomic_read(&g_videodec_access_count) < 0);
|
|
WARN_ON(atomic_read(&g_display_access_count) < 0);
|
|
#endif
|
|
}
|
|
|
|
int ospm_runtime_pm_allow(struct drm_device * dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void ospm_runtime_pm_forbid(struct drm_device * dev)
|
|
{
|
|
struct drm_psb_private * dev_priv = dev->dev_private;
|
|
|
|
DRM_INFO("%s\n", __FUNCTION__);
|
|
|
|
pm_runtime_forbid(&dev->pdev->dev);
|
|
dev_priv->rpm_enabled = 0;
|
|
}
|
|
|
|
int psb_runtime_suspend(struct device *dev)
|
|
{
|
|
pm_message_t state;
|
|
int ret = 0;
|
|
state.event = 0;
|
|
|
|
#ifdef OSPM_GFX_DPK
|
|
printk(KERN_ALERT "OSPM_GFX_DPK: %s \n", __func__);
|
|
#endif
|
|
if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
|
|
|| atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count)){
|
|
#ifdef OSPM_GFX_DPK
|
|
printk(KERN_ALERT "OSPM_GFX_DPK: GFX: %d VEC: %d VED: %d DC: %d DSR: %d \n", atomic_read(&g_graphics_access_count),
|
|
atomic_read(&g_videoenc_access_count), atomic_read(&g_videodec_access_count), atomic_read(&g_display_access_count));
|
|
#endif
|
|
return -EBUSY;
|
|
}
|
|
else
|
|
ret = ospm_power_suspend(gpDrmDevice->pdev, state);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int psb_runtime_resume(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int psb_runtime_idle(struct device *dev)
|
|
{
|
|
/*printk (KERN_ALERT "lvds:%d,mipi:%d\n", dev_priv->is_lvds_on, dev_priv->is_mipi_on);*/
|
|
if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
|
|
|| atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count))
|
|
return 1;
|
|
else
|
|
return 0;
|
|
}
|
|
|