96f1050d3d
Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
155 lines
3.3 KiB
ArmAsm
155 lines
3.3 KiB
ArmAsm
/*
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* This file contains sequences of code that will be copied to a
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* fixed location, defined in <asm/fixed_code.h>. The interrupt
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* handlers ensure that these sequences appear to be atomic when
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* executed from userspace.
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* These are aligned to 16 bytes, so that we have some space to replace
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* these sequences with something else (e.g. kernel traps if we ever do
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* BF561 SMP).
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*
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* Copyright 2007-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/unistd.h>
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#include <asm/entry.h>
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__INIT
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ENTRY(_fixed_code_start)
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.align 16
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ENTRY(_sigreturn_stub)
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P0 = __NR_rt_sigreturn;
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EXCPT 0;
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/* Speculative execution paranoia. */
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0: JUMP.S 0b;
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ENDPROC (_sigreturn_stub)
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.align 16
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/*
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* Atomic swap, 8 bit.
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* Inputs: P0: memory address to use
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* R1: value to store
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* Output: R0: old contents of the memory address, zero extended.
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*/
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ENTRY(_atomic_xchg32)
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R0 = [P0];
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[P0] = R1;
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rts;
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ENDPROC (_atomic_xchg32)
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.align 16
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/*
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* Compare and swap, 32 bit.
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* Inputs: P0: memory address to use
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* R1: compare value
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* R2: new value to store
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* The new value is stored if the contents of the memory
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* address is equal to the compare value.
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* Output: R0: old contents of the memory address.
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*/
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ENTRY(_atomic_cas32)
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R0 = [P0];
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CC = R0 == R1;
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IF !CC JUMP 1f;
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[P0] = R2;
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1:
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rts;
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ENDPROC (_atomic_cas32)
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.align 16
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/*
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* Atomic add, 32 bit.
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* Inputs: P0: memory address to use
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* R0: value to add
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* Outputs: R0: new contents of the memory address.
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* R1: previous contents of the memory address.
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*/
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ENTRY(_atomic_add32)
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R1 = [P0];
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R0 = R1 + R0;
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[P0] = R0;
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rts;
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ENDPROC (_atomic_add32)
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.align 16
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/*
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* Atomic sub, 32 bit.
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* Inputs: P0: memory address to use
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* R0: value to subtract
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* Outputs: R0: new contents of the memory address.
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* R1: previous contents of the memory address.
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*/
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ENTRY(_atomic_sub32)
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R1 = [P0];
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R0 = R1 - R0;
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[P0] = R0;
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rts;
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ENDPROC (_atomic_sub32)
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.align 16
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/*
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* Atomic ior, 32 bit.
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* Inputs: P0: memory address to use
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* R0: value to ior
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* Outputs: R0: new contents of the memory address.
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* R1: previous contents of the memory address.
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*/
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ENTRY(_atomic_ior32)
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R1 = [P0];
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R0 = R1 | R0;
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[P0] = R0;
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rts;
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ENDPROC (_atomic_ior32)
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.align 16
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/*
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* Atomic and, 32 bit.
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* Inputs: P0: memory address to use
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* R0: value to and
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* Outputs: R0: new contents of the memory address.
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* R1: previous contents of the memory address.
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*/
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ENTRY(_atomic_and32)
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R1 = [P0];
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R0 = R1 & R0;
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[P0] = R0;
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rts;
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ENDPROC (_atomic_and32)
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.align 16
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/*
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* Atomic xor, 32 bit.
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* Inputs: P0: memory address to use
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* R0: value to xor
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* Outputs: R0: new contents of the memory address.
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* R1: previous contents of the memory address.
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*/
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ENTRY(_atomic_xor32)
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R1 = [P0];
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R0 = R1 ^ R0;
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[P0] = R0;
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rts;
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ENDPROC (_atomic_xor32)
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.align 16
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/*
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* safe_user_instruction
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* Four NOPS are enough to allow the pipeline to speculativily load
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* execute anything it wants. After that, things have gone bad, and
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* we are stuck - so panic. Since we might be in user space, we can't
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* call panic, so just cause a unhandled exception, this should cause
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* a dump of the trace buffer so we can tell were we are, and a reboot
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*/
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ENTRY(_safe_user_instruction)
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NOP; NOP; NOP; NOP;
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EXCPT 0x4;
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ENDPROC(_safe_user_instruction)
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ENTRY(_fixed_code_end)
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__FINIT
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