bf4861cf3e
Adds extra parameter to AT32 at32_map_usart(), so as to reserve RTS/CTS/CLK pins. All boards under arch/avr32/boards have been updated (trivial change), but not all have been tested. Signed-off-by: Peter Ma <pma@mediamatech.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
247 lines
5.9 KiB
C
247 lines
5.9 KiB
C
/*
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* Board-specific setup code for the Miromico Hammerhead board
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*
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* Copyright (C) 2008 Miromico AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/atmel-mci.h>
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#include <linux/clk.h>
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#include <linux/fb.h>
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#include <linux/etherdevice.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/spi/spi.h>
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#include <video/atmel_lcdc.h>
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#include <linux/io.h>
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#include <asm/setup.h>
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#include <mach/at32ap700x.h>
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#include <mach/board.h>
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#include <mach/init.h>
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#include <mach/portmux.h>
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#include <sound/atmel-ac97c.h>
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#include "../../mach-at32ap/clock.h"
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#include "flash.h"
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/* Oscillator frequencies. These are board-specific */
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unsigned long at32_board_osc_rates[3] = {
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[0] = 32768, /* 32.768 kHz on RTC osc */
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[1] = 25000000, /* 25MHz on osc0 */
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[2] = 12000000, /* 12 MHz on osc1 */
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};
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/* Initialized by bootloader-specific startup code. */
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struct tag *bootloader_tags __initdata;
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#ifdef CONFIG_BOARD_HAMMERHEAD_LCD
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static struct fb_videomode __initdata hda350tlv_modes[] = {
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{
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.name = "320x240 @ 75",
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.refresh = 75,
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.xres = 320,
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.yres = 240,
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.pixclock = KHZ2PICOS(6891),
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.left_margin = 48,
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.right_margin = 18,
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.upper_margin = 18,
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.lower_margin = 4,
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.hsync_len = 20,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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};
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static struct fb_monspecs __initdata hammerhead_hda350t_monspecs = {
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.manufacturer = "HAN",
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.monitor = "HDA350T-LV",
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.modedb = hda350tlv_modes,
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.modedb_len = ARRAY_SIZE(hda350tlv_modes),
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.hfmin = 14900,
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.hfmax = 22350,
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.vfmin = 60,
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.vfmax = 90,
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.dclkmax = 10000000,
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};
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struct atmel_lcdfb_info __initdata hammerhead_lcdc_data = {
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.default_bpp = 24,
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.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
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.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
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| ATMEL_LCDC_INVCLK
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| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
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| ATMEL_LCDC_MEMOR_BIG),
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.default_monspecs = &hammerhead_hda350t_monspecs,
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.guard_time = 2,
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};
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#endif
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static struct mci_platform_data __initdata mci0_data = {
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.slot[0] = {
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.bus_width = 4,
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.detect_pin = -ENODEV,
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.wp_pin = -ENODEV,
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},
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};
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struct eth_addr {
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u8 addr[6];
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};
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static struct eth_addr __initdata hw_addr[1];
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static struct eth_platform_data __initdata eth_data[1];
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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* ethernet address. But we need to keep it around for a while until
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* we can be reasonably sure the boot loader does this.
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*
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* The phy_id is ignored as the driver will probe for it.
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*/
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static int __init parse_tag_ethernet(struct tag *tag)
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{
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int i = tag->u.ethernet.mac_index;
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if (i < ARRAY_SIZE(hw_addr))
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memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
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sizeof(hw_addr[i].addr));
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return 0;
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}
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__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
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static void __init set_hw_addr(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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const u8 *addr;
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void __iomem *regs;
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struct clk *pclk;
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if (!res)
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return;
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if (pdev->id >= ARRAY_SIZE(hw_addr))
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return;
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addr = hw_addr[pdev->id].addr;
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if (!is_valid_ether_addr(addr))
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return;
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/*
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* Since this is board-specific code, we'll cheat and use the
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* physical address directly as we happen to know that it's
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* the same as the virtual address.
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*/
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regs = (void __iomem __force *)res->start;
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pclk = clk_get(&pdev->dev, "pclk");
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if (!pclk)
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return;
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clk_enable(pclk);
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__raw_writel((addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) |
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addr[0], regs + 0x98);
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__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
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clk_disable(pclk);
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clk_put(pclk);
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}
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void __init setup_board(void)
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{
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at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */
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at32_setup_serial_console(0);
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}
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static struct i2c_gpio_platform_data i2c_gpio_data = {
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.sda_pin = GPIO_PIN_PA(6),
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.scl_pin = GPIO_PIN_PA(7),
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.sda_is_open_drain = 1,
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.scl_is_open_drain = 1,
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.udelay = 2, /* close to 100 kHz */
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};
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static struct platform_device i2c_gpio_device = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = { .platform_data = &i2c_gpio_data, },
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};
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static struct i2c_board_info __initdata i2c_info[] = {};
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#ifdef CONFIG_BOARD_HAMMERHEAD_SND
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static struct ac97c_platform_data ac97c_data = {
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.reset_pin = GPIO_PIN_PA(16),
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};
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#endif
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static int __init hammerhead_init(void)
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{
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/*
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* Hammerhead uses 32-bit SDRAM interface. Reserve the
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* SDRAM-specific pins so that nobody messes with them.
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*/
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at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
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at32_add_device_usart(0);
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/* Reserve PB29 (GCLK3). This pin is used as clock source
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* for ETH PHY (25MHz). GCLK3 setup is done by U-Boot.
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*/
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at32_reserve_pin(GPIO_PIOB_BASE, (1<<29));
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/*
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* Hammerhead uses only one ethernet port, so we don't set
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* address of second port
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*/
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
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at32_add_device_hh_fpga();
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#endif
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at32_add_device_mci(0, &mci0_data);
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#ifdef CONFIG_BOARD_HAMMERHEAD_USB
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at32_add_device_usba(0, NULL);
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#endif
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#ifdef CONFIG_BOARD_HAMMERHEAD_LCD
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at32_add_device_lcdc(0, &hammerhead_lcdc_data, fbmem_start,
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fbmem_size, ATMEL_LCDC_PRI_24BIT);
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#endif
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at32_select_gpio(i2c_gpio_data.sda_pin,
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AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT |
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AT32_GPIOF_HIGH);
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at32_select_gpio(i2c_gpio_data.scl_pin,
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AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT |
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AT32_GPIOF_HIGH);
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platform_device_register(&i2c_gpio_device);
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i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
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#ifdef CONFIG_BOARD_HAMMERHEAD_SND
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at32_add_device_ac97c(0, &ac97c_data, AC97C_BOTH);
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#endif
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/* Select the Touchscreen interrupt pin mode */
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at32_select_periph(GPIO_PIOB_BASE, 0x08000000, GPIO_PERIPH_A, 0);
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return 0;
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}
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postcore_initcall(hammerhead_init);
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