d13f7208b2
xics supports only one ipi per cpu, and expects software to use some queue to know why the interrupt was sent. In Linux, we use a an array of bitmaps indexed by cpu to identify the message. Currently the bits are set in smp.c and decoded in xics.c, with the data structure in a header file. Consolidate the code in xics.c similar to mpic and other interrupt controllers. Also, while making the the array static, the message word doesn't need to be volatile as set_bit and test_clear_bit take care of it for us, and put it under ifdef smp. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
23 lines
733 B
C
23 lines
733 B
C
/*
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* arch/powerpc/platforms/pseries/xics.h
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*
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* Copyright 2000 IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _POWERPC_KERNEL_XICS_H
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#define _POWERPC_KERNEL_XICS_H
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extern void xics_init_IRQ(void);
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extern void xics_setup_cpu(void);
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extern void xics_teardown_cpu(void);
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extern void xics_kexec_teardown_cpu(int secondary);
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extern void xics_migrate_irqs_away(void);
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extern int smp_xics_probe(void);
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extern void smp_xics_message_pass(int target, int msg);
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#endif /* _POWERPC_KERNEL_XICS_H */
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