30551c0108
All SPEAr SoC's use ST's Timer module. This patch adds device tree probing capability for that. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
46 lines
1.7 KiB
C
46 lines
1.7 KiB
C
/*
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* arch/arm/mach-spear6xx/include/mach/spear.h
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*
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* SPEAr6xx Machine family specific definition
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*
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* Copyright (C) 2009 ST Microelectronics
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* Rajeev Kumar<rajeev-dlh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __MACH_SPEAR6XX_H
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#define __MACH_SPEAR6XX_H
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#include <asm/memory.h>
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/* ICM1 - Low speed connection */
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#define SPEAR6XX_ICM1_BASE UL(0xD0000000)
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#define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000)
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#define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000)
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#define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE)
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/* ML-1, 2 - Multi Layer CPU Subsystem */
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#define SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
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#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
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/* ICM3 - Basic Subsystem */
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#define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
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#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
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#define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000)
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#define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
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#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE)
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#define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
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#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE)
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/* Debug uart for linux, will be used for debug and uncompress messages */
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#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
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#define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE
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/* Sysctl base for spear platform */
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#define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE
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#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
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#endif /* __MACH_SPEAR6XX_H */
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