8f8f484bf3
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
30 lines
1.1 KiB
Makefile
30 lines
1.1 KiB
Makefile
# common clock types
|
|
obj-$(CONFIG_HAVE_CLK) += clk-devres.o
|
|
obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
|
|
obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \
|
|
clk-mux.o clk-divider.o clk-fixed-factor.o
|
|
# SoCs specific
|
|
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
|
|
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
|
|
obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
|
|
obj-$(CONFIG_ARCH_MXS) += mxs/
|
|
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
|
|
obj-$(CONFIG_PLAT_SPEAR) += spear/
|
|
obj-$(CONFIG_ARCH_U300) += clk-u300.o
|
|
obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
|
|
obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
|
|
obj-$(CONFIG_PLAT_ORION) += mvebu/
|
|
ifeq ($(CONFIG_COMMON_CLK), y)
|
|
obj-$(CONFIG_ARCH_MMP) += mmp/
|
|
endif
|
|
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
|
|
obj-$(CONFIG_ARCH_U8500) += ux500/
|
|
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
|
|
obj-$(CONFIG_ARCH_SUNXI) += clk-sunxi.o
|
|
obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
|
|
obj-$(CONFIG_ARCH_TEGRA) += tegra/
|
|
|
|
# Chip specific
|
|
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
|
|
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
|
|
obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
|