49802967cb
Now that the ColdFire 5272 has full interrupt controller functionality we can remove all the interrupt masking and acking code from the FEC ethernet driver. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
160 lines
3.8 KiB
C
160 lines
3.8 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/5272/config.c
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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/***************************************************************************/
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/*
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* Some platforms need software versions of the GPIO data registers.
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*/
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unsigned short ppdata;
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unsigned char ledbank = 0xff;
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/***************************************************************************/
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static struct mcf_platform_uart m5272_uart_platform[] = {
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{
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.mapbase = MCF_MBAR + MCFUART_BASE1,
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.irq = MCF_IRQ_UART1,
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},
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{
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.mapbase = MCF_MBAR + MCFUART_BASE2,
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.irq = MCF_IRQ_UART2,
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},
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{ },
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};
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static struct platform_device m5272_uart = {
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.name = "mcfuart",
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.id = 0,
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.dev.platform_data = m5272_uart_platform,
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};
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static struct resource m5272_fec_resources[] = {
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{
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.start = MCF_MBAR + 0x840,
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.end = MCF_MBAR + 0x840 + 0x1cf,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MCF_IRQ_ERX,
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.end = MCF_IRQ_ERX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MCF_IRQ_ETX,
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.end = MCF_IRQ_ETX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MCF_IRQ_ENTC,
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.end = MCF_IRQ_ENTC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device m5272_fec = {
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.name = "fec",
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.id = 0,
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.num_resources = ARRAY_SIZE(m5272_fec_resources),
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.resource = m5272_fec_resources,
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};
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static struct platform_device *m5272_devices[] __initdata = {
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&m5272_uart,
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&m5272_fec,
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};
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/***************************************************************************/
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static void __init m5272_uart_init_line(int line, int irq)
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{
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u32 v;
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if ((line >= 0) && (line < 2)) {
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/* Enable the output lines for the serial ports */
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v = readl(MCF_MBAR + MCFSIM_PBCNT);
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v = (v & ~0x000000ff) | 0x00000055;
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writel(v, MCF_MBAR + MCFSIM_PBCNT);
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v = readl(MCF_MBAR + MCFSIM_PDCNT);
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v = (v & ~0x000003fc) | 0x000002a8;
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writel(v, MCF_MBAR + MCFSIM_PDCNT);
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}
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}
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static void __init m5272_uarts_init(void)
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{
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const int nrlines = ARRAY_SIZE(m5272_uart_platform);
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int line;
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for (line = 0; (line < nrlines); line++)
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m5272_uart_init_line(line, m5272_uart_platform[line].irq);
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}
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/***************************************************************************/
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static void m5272_cpu_reset(void)
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{
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local_irq_disable();
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/* Set watchdog to reset, and enabled */
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__raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
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__raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
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__raw_writew(0, MCF_MBAR + MCFSIM_WCR);
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for (;;)
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/* wait for watchdog to timeout */;
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#if defined (CONFIG_MOD5272)
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volatile unsigned char *pivrp;
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/* Set base of device vectors to be 64 */
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pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
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*pivrp = 0x40;
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#endif
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#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0004000, size);
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commandp[size-1] = 0;
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#elif defined(CONFIG_CANCam)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0010000, size);
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commandp[size-1] = 0;
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#endif
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mach_reset = m5272_cpu_reset;
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}
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/***************************************************************************/
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static int __init init_BSP(void)
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{
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m5272_uarts_init();
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platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
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return 0;
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}
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arch_initcall(init_BSP);
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/***************************************************************************/
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