cc50a0df51
This trivial patch updates the nslu2 and nas-100d headers to remove pointless GPIO defines, and updates nslu2-setup.c accordingly. In addition minor style cleanups to some comments are included. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
72 lines
1.6 KiB
C
72 lines
1.6 KiB
C
/*
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* include/asm-arm/arch-ixp4xx/nslu2.h
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*
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* NSLU2 platform specific definitions
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*
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* Author: Mark Rakes <mrakes AT mac.com>
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* Maintainers: http://www.nslu2-linux.org
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*
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* based on ixdp425.h:
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define NSLU2_SDA_PIN 7
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#define NSLU2_SCL_PIN 6
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/*
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* NSLU2 PCI IRQs
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*/
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#define NSLU2_PCI_MAX_DEV 3
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#define NSLU2_PCI_IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define NSLU2_PCI_INTA_PIN 11
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#define NSLU2_PCI_INTB_PIN 10
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#define NSLU2_PCI_INTC_PIN 9
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#define NSLU2_PCI_INTD_PIN 8
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/* NSLU2 Timer */
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#define NSLU2_FREQ 66000000
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/* Buttons */
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#define NSLU2_PB_GPIO 5
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#define NSLU2_PO_GPIO 8 /* power off */
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#define NSLU2_RB_GPIO 12
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#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
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#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
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#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO)
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#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO)
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#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO)
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/* Buzzer */
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#define NSLU2_GPIO_BUZZ 4
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#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ)
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/* LEDs */
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#define NSLU2_LED_RED_GPIO 0
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#define NSLU2_LED_GRN_GPIO 1
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#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
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#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
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#define NSLU2_LED_DISK1_GPIO 3
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#define NSLU2_LED_DISK2_GPIO 2
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#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
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#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)
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