d4a67d9dc8
This patch adds initial support for various Atheros SoCs based on the MIPS 24Kc core. The following models are supported at the moment: - AR7130 - AR7141 - AR7161 - AR9130 - AR9132 - AR7240 - AR7241 - AR7242 The current patch contains minimal support only, but the resulting kernel can boot into user-space with using of an initramfs image on various boards which are using these SoCs. Support for more built-in devices and individual boards will be implemented in further patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
32 lines
890 B
C
32 lines
890 B
C
/*
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* Atheros AR71XX/AR724X/AR913X specific kernel entry setup
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*
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* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#ifndef __ASM_MACH_ATH79_KERNEL_ENTRY_H
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#define __ASM_MACH_ATH79_KERNEL_ENTRY_H
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/*
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* Some bootloaders set the 'Kseg0 coherency algorithm' to
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* 'Cacheable, noncoherent, write-through, no write allocate'
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* and this cause performance issues. Let's go and change it to
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* 'Cacheable, noncoherent, write-back, write allocate'
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*/
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.macro kernel_entry_setup
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mfc0 t0, CP0_CONFIG
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li t1, ~CONF_CM_CMASK
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and t0, t1
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ori t0, CONF_CM_CACHABLE_NONCOHERENT
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mtc0 t0, CP0_CONFIG
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nop
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.endm
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.macro smp_slave_setup
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.endm
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#endif /* __ASM_MACH_ATH79_KERNEL_ENTRY_H */
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