linux/include/asm-blackfin/hardirq.h
Michael Hennerich 34e0fc89bd Blackfin arch: Enable BF54x PIN/GPIO interrupts
Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 16:17:18 +08:00

45 lines
1 KiB
C

#ifndef __BFIN_HARDIRQ_H
#define __BFIN_HARDIRQ_H
#include <linux/cache.h>
#include <linux/threads.h>
#include <asm/irq.h>
typedef struct {
unsigned int __softirq_pending;
unsigned int __syscall_count;
struct task_struct *__ksoftirqd_task;
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
/*
* We put the hardirq and softirq counter into the preemption
* counter. The bitmask has the following meaning:
*
* - bits 0-7 are the preemption count (max preemption depth: 256)
* - bits 8-15 are the softirq count (max # of softirqs: 256)
* - bits 16-23 are the hardirq count (max # of hardirqs: 256)
*
* - ( bit 26 is the PREEMPT_ACTIVE flag. )
*
* PREEMPT_MASK: 0x000000ff
* HARDIRQ_MASK: 0x0000ff00
* SOFTIRQ_MASK: 0x00ff0000
*/
#if NR_IRQS > 256
#define HARDIRQ_BITS 9
#else
#define HARDIRQ_BITS 8
#endif
#ifdef NR_IRQS
# if (1 << HARDIRQ_BITS) < NR_IRQS
# error HARDIRQ_BITS is too low!
# endif
#endif
#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
#endif