b88fb83b13
This patch optimizes the irq handling a bit. Now the base register is only computed once per irq exception instead of at least twice. Moreover the mov+add sequence is simplified to an ldr (which might save some cycles depending on memory timing). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
39 lines
1.2 KiB
ArmAsm
39 lines
1.2 KiB
ArmAsm
/*
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* arch/arm/mach-netx/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for Hilscher netX based platforms
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*
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* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <mach/hardware.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =io_p2v(0x001ff000)
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, [\base, #0]
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clz \irqnr, \irqstat
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rsb \irqnr, \irqnr, #31
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cmp \irqstat, #0
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.endm
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