69c202afa8
Add the SPI controller driver for Freescale i.MX(S/L/1). Main features summary: > Per chip setup via board specific code and/or protocol driver. > Per transfer setup. > PIO transfers. > DMA transfers. > Managing of NULL tx / rx buffer for rd only / wr only transfers. This patch replace patch-2.6.20-rc4-spi_imx with the following changes: > Few cosmetic changes. > Function map_dma_buffers now return 0 for success and -1 for failure. > Solved a bug inside spi_imx_probe function (wrong error path). > Solved a bug inside setup function (bad undo setup for max_speed_hz). > For read-only transfers, always write zero bytes. This is almost the same as the 'BIS' version sent by Andrea, except for updating the 'DUMMY' byte so that read-only transfers shift out zeroes. That part of the API changed recently, since some half duplex peripheral chips require that semantic. Signed-off-by: Andrea Paterniani <a.paterniani@swapp-eng.it> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
72 lines
2.5 KiB
C
72 lines
2.5 KiB
C
/*
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* include/asm-arm/arch-imx/spi_imx.h
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*
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* Copyright (C) 2006 SWAPP
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* Andrea Paterniani <a.paterniani@swapp-eng.it>
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*
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* Initial version inspired by:
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* linux-2.6.17-rc3-mm1/include/asm-arm/arch-pxa/pxa2xx_spi.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef SPI_IMX_H_
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#define SPI_IMX_H_
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/*-------------------------------------------------------------------------*/
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/**
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* struct spi_imx_master - device.platform_data for SPI controller devices.
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* @num_chipselect: chipselects are used to distinguish individual
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* SPI slaves, and are numbered from zero to num_chipselects - 1.
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* each slave has a chipselect signal, but it's common that not
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* every chipselect is connected to a slave.
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* @enable_dma: if true enables DMA driven transfers.
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*/
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struct spi_imx_master {
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u8 num_chipselect;
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u8 enable_dma:1;
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};
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/*-------------------------------------------------------------------------*/
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/*-------------------------------------------------------------------------*/
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/**
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* struct spi_imx_chip - spi_board_info.controller_data for SPI
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* slave devices, copied to spi_device.controller_data.
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* @enable_loopback : used for test purpouse to internally connect RX and TX
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* sections.
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* @enable_dma : enables dma transfer (provided that controller driver has
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* dma enabled too).
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* @ins_ss_pulse : enable /SS pulse insertion between SPI burst.
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* @bclk_wait : number of bclk waits between each bits_per_word SPI burst.
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* @cs_control : function pointer to board-specific function to assert/deassert
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* I/O port to control HW generation of devices chip-select.
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*/
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struct spi_imx_chip {
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u8 enable_loopback:1;
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u8 enable_dma:1;
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u8 ins_ss_pulse:1;
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u16 bclk_wait:15;
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void (*cs_control)(u32 control);
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};
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/* Chip-select state */
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#define SPI_CS_ASSERT (1 << 0)
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#define SPI_CS_DEASSERT (1 << 1)
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/*-------------------------------------------------------------------------*/
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#endif /* SPI_IMX_H_*/
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