db0fefc511
This patch moves the setup code for GPIO's and Voltage Regulators from the board file mmc-twl4030.c to the driver omap_hsmmc.c. PBIAS and other system control configuration remains in the board file. Moving GPIO code to the driver makes the board initialisation code independent of when GPIO's are defined. That makes the board initialisation now entirely independent of its original twl4030 roots. Moving Voltage Regulator code to the driver allows for further development of regulator support in the core MMC code. It also permits the MMC core to be compiled as a module, because the board code no longer calls MMC core functions. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
165 lines
4.6 KiB
C
165 lines
4.6 KiB
C
/*
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* MMC definitions for OMAP2
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*
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* Copyright (C) 2006 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __OMAP2_MMC_H
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#define __OMAP2_MMC_H
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/mmc/host.h>
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#include <plat/board.h>
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#define OMAP15XX_NR_MMC 1
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#define OMAP16XX_NR_MMC 2
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#define OMAP1_MMC_SIZE 0x080
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#define OMAP1_MMC1_BASE 0xfffb7800
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#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
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#define OMAP24XX_NR_MMC 2
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#define OMAP34XX_NR_MMC 3
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#define OMAP44XX_NR_MMC 5
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#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
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#define OMAP3_HSMMC_SIZE 0x200
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#define OMAP4_HSMMC_SIZE 0x1000
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#define OMAP2_MMC1_BASE 0x4809c000
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#define OMAP2_MMC2_BASE 0x480b4000
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#define OMAP3_MMC3_BASE 0x480ad000
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#define OMAP4_MMC4_BASE 0x480d1000
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#define OMAP4_MMC5_BASE 0x480d5000
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#define OMAP4_MMC_REG_OFFSET 0x100
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#define HSMMC5 (1 << 4)
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#define HSMMC4 (1 << 3)
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#define HSMMC3 (1 << 2)
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#define HSMMC2 (1 << 1)
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#define HSMMC1 (1 << 0)
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#define OMAP_MMC_MAX_SLOTS 2
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struct omap_mmc_platform_data {
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/* back-link to device */
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struct device *dev;
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/* number of slots per controller */
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unsigned nr_slots:2;
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/* set if your board has components or wiring that limits the
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* maximum frequency on the MMC bus */
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unsigned int max_freq;
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/* switch the bus to a new slot */
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int (*switch_slot)(struct device *dev, int slot);
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/* initialize board-specific MMC functionality, can be NULL if
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* not supported */
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int (*init)(struct device *dev);
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void (*cleanup)(struct device *dev);
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void (*shutdown)(struct device *dev);
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/* To handle board related suspend/resume functionality for MMC */
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int (*suspend)(struct device *dev, int slot);
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int (*resume)(struct device *dev, int slot);
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/* Return context loss count due to PM states changing */
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int (*get_context_loss_count)(struct device *dev);
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u64 dma_mask;
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struct omap_mmc_slot_data {
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/* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC;
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* 8 wire signaling is also optional, and is used with HSMMC
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*/
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u8 wires;
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/*
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* nomux means "standard" muxing is wrong on this board, and
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* that board-specific code handled it before common init logic.
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*/
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unsigned nomux:1;
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/* switch pin can be for card detect (default) or card cover */
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unsigned cover:1;
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/* use the internal clock */
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unsigned internal_clock:1;
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/* nonremovable e.g. eMMC */
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unsigned nonremovable:1;
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/* Try to sleep or power off when possible */
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unsigned power_saving:1;
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int switch_pin; /* gpio (card detect) */
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int gpio_wp; /* gpio (write protect) */
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int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
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int (*set_power)(struct device *dev, int slot,
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int power_on, int vdd);
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int (*get_ro)(struct device *dev, int slot);
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int (*set_sleep)(struct device *dev, int slot, int sleep,
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int vdd, int cardsleep);
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/* Call back before enabling / disabling regulators */
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void (*before_set_reg)(struct device *dev, int slot,
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int power_on, int vdd);
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/* Call back after enabling / disabling regulators */
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void (*after_set_reg)(struct device *dev, int slot,
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int power_on, int vdd);
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/* return MMC cover switch state, can be NULL if not supported.
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*
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* possible return values:
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* 0 - closed
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* 1 - open
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*/
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int (*get_cover_state)(struct device *dev, int slot);
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const char *name;
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u32 ocr_mask;
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/* Card detection IRQs */
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int card_detect_irq;
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int (*card_detect)(struct device *dev, int slot);
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unsigned int ban_openended:1;
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} slots[OMAP_MMC_MAX_SLOTS];
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};
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/* called from board-specific card detection service routine */
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extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
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int is_closed);
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
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defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
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void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers);
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void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers);
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int omap_mmc_add(const char *name, int id, unsigned long base,
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unsigned long size, unsigned int irq,
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struct omap_mmc_platform_data *data);
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#else
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static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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}
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static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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}
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static inline int omap_mmc_add(const char *name, int id, unsigned long base,
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unsigned long size, unsigned int irq,
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struct omap_mmc_platform_data *data)
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{
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return 0;
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}
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#endif
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#endif
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