b7f5e3c774
Lockdep can call the dwarf2 unwinder early, and the dwarf2 code uses safe_smp_processor_id which tries to access the local APIC page. But that doesn't work before the APIC code has set up its fixmap. Check for this case and always return boot cpu then. Cc: jbeulich@novell.com Cc: mingo@elte.hu Signed-off-by: Andi Kleen <ak@suse.de>
106 lines
2.7 KiB
C
106 lines
2.7 KiB
C
#ifndef __ASM_APIC_H
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#define __ASM_APIC_H
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#include <linux/pm.h>
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#include <asm/fixmap.h>
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#include <asm/apicdef.h>
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#include <asm/system.h>
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#define Dprintk(x...)
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/*
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* Debugging macros
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*/
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#define APIC_QUIET 0
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#define APIC_VERBOSE 1
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#define APIC_DEBUG 2
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extern int apic_verbosity;
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extern int apic_runs_main_timer;
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extern int ioapic_force;
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extern int apic_mapped;
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/*
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* Define the default level of output to be very little
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* This can be turned up by using apic=verbose for more
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* information and apic=debug for _lots_ of information.
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* apic_verbosity is defined in apic.c
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*/
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#define apic_printk(v, s, a...) do { \
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if ((v) <= apic_verbosity) \
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printk(s, ##a); \
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} while (0)
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struct pt_regs;
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/*
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* Basic functions accessing APICs.
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*/
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static __inline void apic_write(unsigned long reg, unsigned int v)
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{
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*((volatile unsigned int *)(APIC_BASE+reg)) = v;
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}
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static __inline unsigned int apic_read(unsigned long reg)
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{
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return *((volatile unsigned int *)(APIC_BASE+reg));
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}
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static __inline__ void apic_wait_icr_idle(void)
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{
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while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
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cpu_relax();
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}
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static inline void ack_APIC_irq(void)
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{
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/*
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* ack_APIC_irq() actually gets compiled as a single instruction:
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* - a single rmw on Pentium/82489DX
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* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
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* ... yummie.
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*/
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/* Docs say use 0 for future compatibility */
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apic_write(APIC_EOI, 0);
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}
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extern int get_maxlvt (void);
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extern void clear_local_APIC (void);
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extern void connect_bsp_APIC (void);
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extern void disconnect_bsp_APIC (int virt_wire_setup);
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extern void disable_local_APIC (void);
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extern int verify_local_APIC (void);
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extern void cache_APIC_registers (void);
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extern void sync_Arb_IDs (void);
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extern void init_bsp_APIC (void);
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extern void setup_local_APIC (void);
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extern void init_apic_mappings (void);
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extern void smp_local_timer_interrupt (struct pt_regs * regs);
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extern void setup_boot_APIC_clock (void);
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extern void setup_secondary_APIC_clock (void);
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extern int APIC_init_uniprocessor (void);
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extern void disable_APIC_timer(void);
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extern void enable_APIC_timer(void);
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extern void clustered_apic_check(void);
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extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
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unsigned char msg_type, unsigned char mask);
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#define K8_APIC_EXT_LVT_BASE 0x500
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#define K8_APIC_EXT_INT_MSG_FIX 0x0
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#define K8_APIC_EXT_INT_MSG_SMI 0x2
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#define K8_APIC_EXT_INT_MSG_NMI 0x4
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#define K8_APIC_EXT_INT_MSG_EXT 0x7
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#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0
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void smp_send_timer_broadcast_ipi(void);
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void switch_APIC_timer_to_ipi(void *cpumask);
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void switch_ipi_to_APIC_timer(void *cpumask);
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#define ARCH_APICTIMER_STOPS_ON_C3 1
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extern unsigned boot_cpu_id;
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#endif /* __ASM_APIC_H */
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