74d02fb954
FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the memory region to be setup. Move these definitions from asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm stuff can see them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/*
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* linux/include/asm-arm/arch-ebsa110/hardware.h
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*
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* Copyright (C) 1996-2000 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the hardware definitions of the EBSA-110.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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/*
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* The EBSA110 has a weird "ISA IO" region:
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*
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* Region 0 (addr = 0xf0000000 + io << 2)
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* --------------------------------------------------------
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* Physical region IO region
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* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
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* f0000e60 - f0000e64 398 - 399
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* f0000de0 - f0000dfc 378 - 37f lp0
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* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
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*
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* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
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* --------------------------------------------------------
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* Physical region IO region
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* f00014f1 a79 pnp write data
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* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
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* f00004f1 279 pnp address
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* f0000440 - f000046c 220 - 236 eth0
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* f0000405 203 pnp read data
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*/
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#define ISAMEM_PHYS 0xe0000000
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#define ISAMEM_SIZE 0x10000000
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#define ISAIO_PHYS 0xf0000000
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#define ISAIO_SIZE PGDIR_SIZE
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#define TRICK0_PHYS 0xf2000000
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#define TRICK1_PHYS 0xf2400000
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#define TRICK2_PHYS 0xf2800000
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#define TRICK3_PHYS 0xf2c00000
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#define TRICK4_PHYS 0xf3000000
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#define TRICK5_PHYS 0xf3400000
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#define TRICK6_PHYS 0xf3800000
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#define TRICK7_PHYS 0xf3c00000
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#define ISAMEM_BASE 0xe0000000
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#define ISAIO_BASE 0xf0000000
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#define PIT_BASE 0xfc000000
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#define SOFT_BASE 0xfd000000
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/*
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* RAM definitions
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*/
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#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
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#endif
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