linux/arch/x86/include/asm/uv
Jack Steiner c4ed3f04ba x86, UV: Fix macros for multiple coherency domains
Fix bug in the SGI UV macros that support systems with multiple
coherency domains.  The macros used for referencing global MMR
(chipset registers) are failing to correctly "or" the NASID
(node identifier) bits that reside above M+N. These high bits
are supplied automatically by the chipset for memory accesses
coming from the processor socket.

However, the bits must be present for references to the special
global MMR space used to map chipset registers. (See uv_hub.h
for more details ...)

The bug results in references to invalid/incorrect nodes.

Signed-off-by: Jack Steiner <steiner@sgi.com>
Cc: <stable@kernel.org>
LKML-Reference: <20090608154405.GA16395@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-06-08 18:57:47 +02:00
..
bios.h sgi-xp: xpc needs to pass the physical address, not virtual 2008-12-16 23:04:24 +01:00
uv.h x86: remove update_apic from x86_quirks 2009-02-26 06:32:25 +01:00
uv_bau.h x86: Fix UV BAU activation descriptor init 2009-06-03 13:07:31 +02:00
uv_hub.h x86, UV: Fix macros for multiple coherency domains 2009-06-08 18:57:47 +02:00
uv_irq.h x86: drop double underscores from header guards 2008-10-23 00:01:39 -07:00
uv_mmrs.h x86: UV BAU messaging timeouts 2009-04-03 18:25:27 +02:00