dc2eb76c40
This patch adopts a debug uart selection similar to the OMAP model. During the boot process, the uncompress code determines the physical and virtual base addresses of the board-specific debug uart. These addresses are then passed on to the in-kernel debug macros through a small chunk of memory placed just below the page tables (@0x80003ff8). Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
84 lines
2 KiB
ArmAsm
84 lines
2 KiB
ArmAsm
/*
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* Debugging macro for DaVinci
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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/* Modifications
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* Jan 2009 Chaithrika U S Added senduart, busyuart, waituart
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* macros, based on debug-8250.S file
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* but using 32-bit accesses required for
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* some davinci devices.
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*/
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#include <linux/serial_reg.h>
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#include <asm/memory.h>
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#include <mach/serial.h>
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#define UART_SHIFT 2
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.pushsection .data
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davinci_uart_phys: .word 0
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davinci_uart_virt: .word 0
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.popsection
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.macro addruart, rx, tmp
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/* Use davinci_uart_phys/virt if already configured */
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10: mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =__virt_to_phys(davinci_uart_phys)
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ldrne \rx, =davinci_uart_virt
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ldr \rx, [\rx]
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cmp \rx, #0 @ is port configured?
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bne 99f @ already configured
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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/* Copy uart phys address from decompressor uart info */
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ldreq \tmp, =__virt_to_phys(davinci_uart_phys)
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ldrne \tmp, =davinci_uart_phys
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ldreq \rx, =DAVINCI_UART_INFO
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ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO)
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ldr \rx, [\rx, #0]
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str \rx, [\tmp]
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/* Copy uart virt address from decompressor uart info */
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ldreq \tmp, =__virt_to_phys(davinci_uart_virt)
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ldrne \tmp, =davinci_uart_virt
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ldreq \rx, =DAVINCI_UART_INFO
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ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO)
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ldr \rx, [\rx, #4]
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str \rx, [\tmp]
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b 10b
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99:
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.endm
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.macro senduart,rd,rx
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str \rd, [\rx, #UART_TX << UART_SHIFT]
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.endm
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.macro busyuart,rd,rx
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1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
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and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
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teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
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bne 1002b
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.endm
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.macro waituart,rd,rx
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#ifdef FLOW_CONTROL
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1001: ldr \rd, [\rx, #UART_MSR << UART_SHIFT]
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tst \rd, #UART_MSR_CTS
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beq 1001b
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#endif
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.endm
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