7230c56441
The current implementation of lazy interrupts handling has some issues that this tries to address. We don't do the various workarounds we need to do when re-enabling interrupts in some cases such as when returning from an interrupt and thus we may still lose or get delayed decrementer or doorbell interrupts. The current scheme also makes it much harder to handle the external "edge" interrupts provided by some BookE processors when using the EPR facility (External Proxy) and the Freescale Hypervisor. Additionally, we tend to keep interrupts hard disabled in a number of cases, such as decrementer interrupts, external interrupts, or when a masked decrementer interrupt is pending. This is sub-optimal. This is an attempt at fixing it all in one go by reworking the way we do the lazy interrupt disabling from the ground up. The base idea is to replace the "hard_enabled" field with a "irq_happened" field in which we store a bit mask of what interrupt occurred while soft-disabled. When re-enabling, either via arch_local_irq_restore() or when returning from an interrupt, we can now decide what to do by testing bits in that field. We then implement replaying of the missed interrupts either by re-using the existing exception frame (in exception exit case) or via the creation of a new one from an assembly trampoline (in the arch_local_irq_enable case). This removes the need to play with the decrementer to try to create fake interrupts, among others. In addition, this adds a few refinements: - We no longer hard disable decrementer interrupts that occur while soft-disabled. We now simply bump the decrementer back to max (on BookS) or leave it stopped (on BookE) and continue with hard interrupts enabled, which means that we'll potentially get better sample quality from performance monitor interrupts. - Timer, decrementer and doorbell interrupts now hard-enable shortly after removing the source of the interrupt, which means they no longer run entirely hard disabled. Again, this will improve perf sample quality. - On Book3E 64-bit, we now make the performance monitor interrupt act as an NMI like Book3S (the necessary C code for that to work appear to already be present in the FSL perf code, notably calling nmi_enter instead of irq_enter). (This also fixes a bug where BookE perfmon interrupts could clobber r14 ... oops) - We could make "masked" decrementer interrupts act as NMIs when doing timer-based perf sampling to improve the sample quality. Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org> --- v2: - Add hard-enable to decrementer, timer and doorbells - Fix CR clobber in masked irq handling on BookE - Make embedded perf interrupt act as an NMI - Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want to retrigger an interrupt without preventing hard-enable v3: - Fix or vs. ori bug on Book3E - Fix enabling of interrupts for some exceptions on Book3E v4: - Fix resend of doorbells on return from interrupt on Book3E v5: - Rebased on top of my latest series, which involves some significant rework of some aspects of the patch. v6: - 32-bit compile fix - more compile fixes with various .config combos - factor out the asm code to soft-disable interrupts - remove the C wrapper around preempt_schedule_irq v7: - Fix a bug with hard irq state tracking on native power7
183 lines
6 KiB
C
183 lines
6 KiB
C
/*
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* This control block defines the PACA which defines the processor
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* specific data for each logical processor on the system.
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* There are some pointers defined that are utilized by PLIC.
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*
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* C 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_PACA_H
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#define _ASM_POWERPC_PACA_H
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#ifdef __KERNEL__
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#ifdef CONFIG_PPC64
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#include <linux/init.h>
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#include <asm/types.h>
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#include <asm/lppaca.h>
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#include <asm/mmu.h>
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#include <asm/page.h>
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#include <asm/exception-64e.h>
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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#include <asm/kvm_book3s_asm.h>
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#endif
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register struct paca_struct *local_paca asm("r13");
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#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
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extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
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/*
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* Add standard checks that preemption cannot occur when using get_paca():
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* otherwise the paca_struct it points to may be the wrong one just after.
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*/
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#define get_paca() ((void) debug_smp_processor_id(), local_paca)
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#else
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#define get_paca() local_paca
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#endif
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#define get_lppaca() (get_paca()->lppaca_ptr)
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#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
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struct task_struct;
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struct opal_machine_check_event;
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/*
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* Defines the layout of the paca.
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*
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* This structure is not directly accessed by firmware or the service
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* processor.
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*/
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struct paca_struct {
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#ifdef CONFIG_PPC_BOOK3S
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/*
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* Because hw_cpu_id, unlike other paca fields, is accessed
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* routinely from other CPUs (from the IRQ code), we stick to
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* read-only (after boot) fields in the first cacheline to
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* avoid cacheline bouncing.
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*/
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struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
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#endif /* CONFIG_PPC_BOOK3S */
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/*
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* MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
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* load lock_token and paca_index with a single lwz
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* instruction. They must travel together and be properly
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* aligned.
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*/
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u16 lock_token; /* Constant 0x8000, used in locks */
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u16 paca_index; /* Logical processor number */
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u64 kernel_toc; /* Kernel TOC address */
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u64 kernelbase; /* Base address of kernel */
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u64 kernel_msr; /* MSR while running in kernel */
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#ifdef CONFIG_PPC_STD_MMU_64
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u64 stab_real; /* Absolute address of segment table */
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u64 stab_addr; /* Virtual address of segment table */
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#endif /* CONFIG_PPC_STD_MMU_64 */
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void *emergency_sp; /* pointer to emergency stack */
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u64 data_offset; /* per cpu data offset */
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s16 hw_cpu_id; /* Physical processor number */
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u8 cpu_start; /* At startup, processor spins until */
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/* this becomes non-zero. */
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u8 kexec_state; /* set when kexec down has irqs off */
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#ifdef CONFIG_PPC_STD_MMU_64
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struct slb_shadow *slb_shadow_ptr;
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struct dtl_entry *dispatch_log;
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struct dtl_entry *dispatch_log_end;
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/*
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* Now, starting in cacheline 2, the exception save areas
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*/
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/* used for most interrupts/exceptions */
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u64 exgen[11] __attribute__((aligned(0x80)));
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u64 exmc[11]; /* used for machine checks */
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u64 exslb[11]; /* used for SLB/segment table misses
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* on the linear mapping */
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/* SLB related definitions */
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u16 vmalloc_sllp;
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u16 slb_cache_ptr;
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u16 slb_cache[SLB_CACHE_ENTRIES];
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#endif /* CONFIG_PPC_STD_MMU_64 */
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#ifdef CONFIG_PPC_BOOK3E
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u64 exgen[8] __attribute__((aligned(0x80)));
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/* Keep pgd in the same cacheline as the start of extlb */
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pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */
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pgd_t *kernel_pgd; /* Kernel PGD */
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/* We can have up to 3 levels of reentrancy in the TLB miss handler */
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u64 extlb[3][EX_TLB_SIZE / sizeof(u64)];
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u64 exmc[8]; /* used for machine checks */
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u64 excrit[8]; /* used for crit interrupts */
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u64 exdbg[8]; /* used for debug interrupts */
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/* Kernel stack pointers for use by special exceptions */
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void *mc_kstack;
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void *crit_kstack;
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void *dbg_kstack;
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#endif /* CONFIG_PPC_BOOK3E */
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mm_context_t context;
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/*
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* then miscellaneous read-write fields
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*/
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struct task_struct *__current; /* Pointer to current */
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u64 kstack; /* Saved Kernel stack addr */
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u64 stab_rr; /* stab/slb round-robin counter */
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u64 saved_r1; /* r1 save for RTAS calls or PM */
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u64 saved_msr; /* MSR saved here by enter_rtas */
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u16 trap_save; /* Used when bad stack is encountered */
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u8 soft_enabled; /* irq soft-enable flag */
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u8 irq_happened; /* irq happened while soft-disabled */
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u8 io_sync; /* writel() needs spin_unlock sync */
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u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
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u8 nap_state_lost; /* NV GPR values lost in power7_idle */
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#ifdef CONFIG_PPC_POWERNV
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/* Pointer to OPAL machine check event structure set by the
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* early exception handler for use by high level C handler
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*/
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struct opal_machine_check_event *opal_mc_evt;
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#endif
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/* Stuff for accurate time accounting */
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u64 user_time; /* accumulated usermode TB ticks */
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u64 system_time; /* accumulated system TB ticks */
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u64 user_time_scaled; /* accumulated usermode SPURR ticks */
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u64 starttime; /* TB value snapshot */
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u64 starttime_user; /* TB value on exit to usermode */
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u64 startspurr; /* SPURR value snapshot */
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u64 utime_sspurr; /* ->user_time when ->startspurr set */
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u64 stolen_time; /* TB ticks taken by hypervisor */
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u64 dtl_ridx; /* read index in dispatch log */
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struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
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#ifdef CONFIG_KVM_BOOK3S_HANDLER
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#ifdef CONFIG_KVM_BOOK3S_PR
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/* We use this to store guest state in */
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struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
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#endif
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struct kvmppc_host_state kvm_hstate;
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#endif
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};
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extern struct paca_struct *paca;
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extern __initdata struct paca_struct boot_paca;
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extern void initialise_paca(struct paca_struct *new_paca, int cpu);
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extern void setup_paca(struct paca_struct *new_paca);
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extern void allocate_pacas(void);
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extern void free_unused_pacas(void);
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#else /* CONFIG_PPC64 */
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static inline void allocate_pacas(void) { };
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static inline void free_unused_pacas(void) { };
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#endif /* CONFIG_PPC64 */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PACA_H */
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