64 lines
1.4 KiB
Plaintext
64 lines
1.4 KiB
Plaintext
/*
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* P1020 RDB Core0 Device Tree Source in CAMP mode.
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*
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* In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
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* can be shared, all the other devices must be assigned to one core only.
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* This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
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* eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
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*
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* Please note to add "-b 0" for core0's dts compiling.
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "p1020rdb.dts"
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/ {
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model = "fsl,P1020RDB";
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compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
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aliases {
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ethernet1 = &enet1;
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ethernet2 = &enet2;
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serial0 = &serial0;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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PowerPC,P1020@1 {
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status = "disabled";
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};
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};
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memory {
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device_type = "memory";
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};
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localbus@ffe05000 {
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status = "disabled";
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};
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soc@ffe00000 {
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serial1: serial@4600 {
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status = "disabled";
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};
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enet0: ethernet@b0000 {
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status = "disabled";
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};
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mpic: pic@40000 {
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protected-sources = <
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42 29 30 34 /* serial1, enet0-queue-group0 */
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17 18 24 45 /* enet0-queue-group1, crypto */
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>;
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};
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};
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};
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