c58c2140f0
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
851 lines
20 KiB
C
851 lines
20 KiB
C
/*
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* File: arch/blackfin/kernel/bfin_gpio.c
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* Based on:
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* Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
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*
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* Created:
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* Description: GPIO Abstraction Layer
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*
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* Modified:
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* Copyright 2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Number BF537/6/4 BF561 BF533/2/1
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*
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* GPIO_0 PF0 PF0 PF0
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* GPIO_1 PF1 PF1 PF1
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* GPIO_2 PF2 PF2 PF2
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* GPIO_3 PF3 PF3 PF3
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* GPIO_4 PF4 PF4 PF4
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* GPIO_5 PF5 PF5 PF5
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* GPIO_6 PF6 PF6 PF6
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* GPIO_7 PF7 PF7 PF7
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* GPIO_8 PF8 PF8 PF8
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* GPIO_9 PF9 PF9 PF9
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* GPIO_10 PF10 PF10 PF10
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* GPIO_11 PF11 PF11 PF11
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* GPIO_12 PF12 PF12 PF12
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* GPIO_13 PF13 PF13 PF13
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* GPIO_14 PF14 PF14 PF14
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* GPIO_15 PF15 PF15 PF15
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* GPIO_16 PG0 PF16
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* GPIO_17 PG1 PF17
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* GPIO_18 PG2 PF18
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* GPIO_19 PG3 PF19
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* GPIO_20 PG4 PF20
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* GPIO_21 PG5 PF21
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* GPIO_22 PG6 PF22
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* GPIO_23 PG7 PF23
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* GPIO_24 PG8 PF24
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* GPIO_25 PG9 PF25
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* GPIO_26 PG10 PF26
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* GPIO_27 PG11 PF27
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* GPIO_28 PG12 PF28
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* GPIO_29 PG13 PF29
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* GPIO_30 PG14 PF30
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* GPIO_31 PG15 PF31
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* GPIO_32 PH0 PF32
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* GPIO_33 PH1 PF33
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* GPIO_34 PH2 PF34
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* GPIO_35 PH3 PF35
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* GPIO_36 PH4 PF36
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* GPIO_37 PH5 PF37
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* GPIO_38 PH6 PF38
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* GPIO_39 PH7 PF39
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* GPIO_40 PH8 PF40
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* GPIO_41 PH9 PF41
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* GPIO_42 PH10 PF42
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* GPIO_43 PH11 PF43
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* GPIO_44 PH12 PF44
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* GPIO_45 PH13 PF45
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* GPIO_46 PH14 PF46
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* GPIO_47 PH15 PF47
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*/
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#include <linux/module.h>
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#include <linux/err.h>
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#include <asm/blackfin.h>
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#include <asm/gpio.h>
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#include <asm/portmux.h>
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#include <linux/irq.h>
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#ifdef BF533_FAMILY
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static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
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(struct gpio_port_t *) FIO_FLAG_D,
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};
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#endif
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#ifdef BF537_FAMILY
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static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
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(struct gpio_port_t *) PORTFIO,
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(struct gpio_port_t *) PORTGIO,
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(struct gpio_port_t *) PORTHIO,
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};
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static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
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(unsigned short *) PORTF_FER,
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(unsigned short *) PORTG_FER,
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(unsigned short *) PORTH_FER,
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};
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#endif
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#ifdef BF561_FAMILY
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static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
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(struct gpio_port_t *) FIO0_FLAG_D,
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(struct gpio_port_t *) FIO1_FLAG_D,
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(struct gpio_port_t *) FIO2_FLAG_D,
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};
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#endif
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static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
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char *str_ident = NULL;
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#define RESOURCE_LABEL_SIZE 16
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#ifdef CONFIG_PM
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static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
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static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
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#ifdef BF533_FAMILY
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static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
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#endif
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#ifdef BF537_FAMILY
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static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
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#endif
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#ifdef BF561_FAMILY
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static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
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#endif
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#endif /* CONFIG_PM */
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inline int check_gpio(unsigned short gpio)
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{
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if (gpio >= MAX_BLACKFIN_GPIOS)
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return -EINVAL;
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return 0;
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}
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static void set_label(unsigned short ident, const char *label)
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{
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if (label && str_ident) {
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strncpy(str_ident + ident * RESOURCE_LABEL_SIZE, label,
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RESOURCE_LABEL_SIZE);
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str_ident[ident * RESOURCE_LABEL_SIZE +
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RESOURCE_LABEL_SIZE - 1] = 0;
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}
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}
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static char *get_label(unsigned short ident)
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{
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if (!str_ident)
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return "UNKNOWN";
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return (str_ident[ident * RESOURCE_LABEL_SIZE] ?
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(str_ident + ident * RESOURCE_LABEL_SIZE) : "UNKNOWN");
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}
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static int cmp_label(unsigned short ident, const char *label)
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{
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if (label && str_ident)
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return strncmp(str_ident + ident * RESOURCE_LABEL_SIZE,
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label, strlen(label));
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else
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return -EINVAL;
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}
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#ifdef BF537_FAMILY
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static void port_setup(unsigned short gpio, unsigned short usage)
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{
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if (usage == GPIO_USAGE) {
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*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
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} else
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*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
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SSYNC();
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}
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#else
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# define port_setup(...) do { } while (0)
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#endif
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#ifdef BF537_FAMILY
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#define PMUX_LUT_RES 0
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#define PMUX_LUT_OFFSET 1
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#define PMUX_LUT_ENTRIES 41
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#define PMUX_LUT_SIZE 2
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static unsigned short port_mux_lut[PMUX_LUT_ENTRIES][PMUX_LUT_SIZE] = {
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{P_PPI0_D13, 11}, {P_PPI0_D14, 11}, {P_PPI0_D15, 11},
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{P_SPORT1_TFS, 11}, {P_SPORT1_TSCLK, 11}, {P_SPORT1_DTPRI, 11},
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{P_PPI0_D10, 10}, {P_PPI0_D11, 10}, {P_PPI0_D12, 10},
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{P_SPORT1_RSCLK, 10}, {P_SPORT1_RFS, 10}, {P_SPORT1_DRPRI, 10},
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{P_PPI0_D8, 9}, {P_PPI0_D9, 9}, {P_SPORT1_DRSEC, 9},
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{P_SPORT1_DTSEC, 9}, {P_TMR2, 8}, {P_PPI0_FS3, 8}, {P_TMR3, 7},
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{P_SPI0_SSEL4, 7}, {P_TMR4, 6}, {P_SPI0_SSEL5, 6}, {P_TMR5, 5},
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{P_SPI0_SSEL6, 5}, {P_UART1_RX, 4}, {P_UART1_TX, 4}, {P_TMR6, 4},
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{P_TMR7, 4}, {P_UART0_RX, 3}, {P_UART0_TX, 3}, {P_DMAR0, 3},
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{P_DMAR1, 3}, {P_SPORT0_DTSEC, 1}, {P_SPORT0_DRSEC, 1},
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{P_CAN0_RX, 1}, {P_CAN0_TX, 1}, {P_SPI0_SSEL7, 1},
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{P_SPORT0_TFS, 0}, {P_SPORT0_DTPRI, 0}, {P_SPI0_SSEL2, 0},
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{P_SPI0_SSEL3, 0}
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};
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static void portmux_setup(unsigned short per, unsigned short function)
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{
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u16 y, muxreg, offset;
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for (y = 0; y < PMUX_LUT_ENTRIES; y++) {
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if (port_mux_lut[y][PMUX_LUT_RES] == per) {
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/* SET PORTMUX REG */
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offset = port_mux_lut[y][PMUX_LUT_OFFSET];
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muxreg = bfin_read_PORT_MUX();
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if (offset != 1) {
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muxreg &= ~(1 << offset);
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} else {
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muxreg &= ~(3 << 1);
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}
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muxreg |= (function << offset);
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bfin_write_PORT_MUX(muxreg);
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}
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}
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}
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#else
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# define portmux_setup(...) do { } while (0)
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#endif
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static void default_gpio(unsigned short gpio)
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{
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unsigned short bank, bitmask;
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bank = gpio_bank(gpio);
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bitmask = gpio_bit(gpio);
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gpio_bankb[bank]->maska_clear = bitmask;
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gpio_bankb[bank]->maskb_clear = bitmask;
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SSYNC();
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gpio_bankb[bank]->inen &= ~bitmask;
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gpio_bankb[bank]->dir &= ~bitmask;
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gpio_bankb[bank]->polar &= ~bitmask;
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gpio_bankb[bank]->both &= ~bitmask;
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gpio_bankb[bank]->edge &= ~bitmask;
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}
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static int __init bfin_gpio_init(void)
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{
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str_ident = kzalloc(RESOURCE_LABEL_SIZE * 256, GFP_KERNEL);
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if (!str_ident)
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return -ENOMEM;
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printk(KERN_INFO "Blackfin GPIO Controller\n");
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return 0;
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}
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arch_initcall(bfin_gpio_init);
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/***********************************************************
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*
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* FUNCTIONS: Blackfin General Purpose Ports Access Functions
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*
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* INPUTS/OUTPUTS:
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* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
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*
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*
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* DESCRIPTION: These functions abstract direct register access
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* to Blackfin processor General Purpose
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* Ports Regsiters
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*
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* CAUTION: These functions do not belong to the GPIO Driver API
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*************************************************************
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* MODIFICATION HISTORY :
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**************************************************************/
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/* Set a specific bit */
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#define SET_GPIO(name) \
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void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
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{ \
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unsigned long flags; \
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
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local_irq_save(flags); \
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if (arg) \
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gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
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else \
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gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
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local_irq_restore(flags); \
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} \
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EXPORT_SYMBOL(set_gpio_ ## name);
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SET_GPIO(dir)
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SET_GPIO(inen)
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SET_GPIO(polar)
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SET_GPIO(edge)
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SET_GPIO(both)
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#define SET_GPIO_SC(name) \
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void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
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{ \
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
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if (arg) \
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gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
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else \
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gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
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} \
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EXPORT_SYMBOL(set_gpio_ ## name);
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SET_GPIO_SC(maska)
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SET_GPIO_SC(maskb)
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#if defined(ANOMALY_05000311)
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void set_gpio_data(unsigned short gpio, unsigned short arg)
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{
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unsigned long flags;
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
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local_irq_save(flags);
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if (arg)
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gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
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else
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gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
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bfin_read_CHIPID();
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(set_gpio_data);
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#else
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SET_GPIO_SC(data)
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#endif
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#if defined(ANOMALY_05000311)
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void set_gpio_toggle(unsigned short gpio)
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{
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unsigned long flags;
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
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local_irq_save(flags);
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gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
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bfin_read_CHIPID();
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local_irq_restore(flags);
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}
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#else
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void set_gpio_toggle(unsigned short gpio)
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{
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
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gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
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}
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#endif
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EXPORT_SYMBOL(set_gpio_toggle);
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/*Set current PORT date (16-bit word)*/
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#define SET_GPIO_P(name) \
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void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
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{ \
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gpio_bankb[gpio_bank(gpio)]->name = arg; \
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} \
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EXPORT_SYMBOL(set_gpiop_ ## name);
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SET_GPIO_P(dir)
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SET_GPIO_P(inen)
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SET_GPIO_P(polar)
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SET_GPIO_P(edge)
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SET_GPIO_P(both)
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SET_GPIO_P(maska)
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SET_GPIO_P(maskb)
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#if defined(ANOMALY_05000311)
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void set_gpiop_data(unsigned short gpio, unsigned short arg)
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{
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unsigned long flags;
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local_irq_save(flags);
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gpio_bankb[gpio_bank(gpio)]->data = arg;
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bfin_read_CHIPID();
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(set_gpiop_data);
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#else
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SET_GPIO_P(data)
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#endif
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/* Get a specific bit */
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#define GET_GPIO(name) \
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unsigned short get_gpio_ ## name(unsigned short gpio) \
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{ \
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return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
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} \
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EXPORT_SYMBOL(get_gpio_ ## name);
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GET_GPIO(dir)
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GET_GPIO(inen)
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GET_GPIO(polar)
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GET_GPIO(edge)
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GET_GPIO(both)
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GET_GPIO(maska)
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GET_GPIO(maskb)
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#if defined(ANOMALY_05000311)
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unsigned short get_gpio_data(unsigned short gpio)
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{
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unsigned long flags;
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unsigned short ret;
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BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
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local_irq_save(flags);
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ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->data >> gpio_sub_n(gpio));
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bfin_read_CHIPID();
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local_irq_restore(flags);
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return ret;
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}
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EXPORT_SYMBOL(get_gpio_data);
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#else
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GET_GPIO(data)
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#endif
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/*Get current PORT date (16-bit word)*/
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#define GET_GPIO_P(name) \
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unsigned short get_gpiop_ ## name(unsigned short gpio) \
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{ \
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return (gpio_bankb[gpio_bank(gpio)]->name);\
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} \
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EXPORT_SYMBOL(get_gpiop_ ## name);
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GET_GPIO_P(dir)
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GET_GPIO_P(inen)
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GET_GPIO_P(polar)
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GET_GPIO_P(edge)
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GET_GPIO_P(both)
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GET_GPIO_P(maska)
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GET_GPIO_P(maskb)
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#if defined(ANOMALY_05000311)
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unsigned short get_gpiop_data(unsigned short gpio)
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{
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unsigned long flags;
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unsigned short ret;
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local_irq_save(flags);
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ret = gpio_bankb[gpio_bank(gpio)]->data;
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bfin_read_CHIPID();
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local_irq_restore(flags);
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return ret;
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}
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EXPORT_SYMBOL(get_gpiop_data);
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#else
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GET_GPIO_P(data)
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#endif
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#ifdef CONFIG_PM
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/***********************************************************
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*
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* FUNCTIONS: Blackfin PM Setup API
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*
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* INPUTS/OUTPUTS:
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* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
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* type -
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* PM_WAKE_RISING
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* PM_WAKE_FALLING
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* PM_WAKE_HIGH
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* PM_WAKE_LOW
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* PM_WAKE_BOTH_EDGES
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*
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* DESCRIPTION: Blackfin PM Driver API
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*
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* CAUTION:
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*************************************************************
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* MODIFICATION HISTORY :
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**************************************************************/
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int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
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{
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unsigned long flags;
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if ((check_gpio(gpio) < 0) || !type)
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return -EINVAL;
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local_irq_save(flags);
|
|
|
|
wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
|
|
wakeup_flags_map[gpio] = type;
|
|
local_irq_restore(flags);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(gpio_pm_wakeup_request);
|
|
|
|
void gpio_pm_wakeup_free(unsigned short gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
return;
|
|
|
|
local_irq_save(flags);
|
|
|
|
wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(gpio_pm_wakeup_free);
|
|
|
|
static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
|
|
{
|
|
port_setup(gpio, GPIO_USAGE);
|
|
set_gpio_dir(gpio, 0);
|
|
set_gpio_inen(gpio, 1);
|
|
|
|
if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
|
|
set_gpio_edge(gpio, 1);
|
|
else
|
|
set_gpio_edge(gpio, 0);
|
|
|
|
if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
|
|
set_gpio_both(gpio, 1);
|
|
else
|
|
set_gpio_both(gpio, 0);
|
|
|
|
if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
|
|
set_gpio_polar(gpio, 1);
|
|
else
|
|
set_gpio_polar(gpio, 0);
|
|
|
|
SSYNC();
|
|
|
|
return 0;
|
|
}
|
|
|
|
u32 gpio_pm_setup(void)
|
|
{
|
|
u32 sic_iwr = 0;
|
|
u16 bank, mask, i, gpio;
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
|
mask = wakeup_map[gpio_bank(i)];
|
|
bank = gpio_bank(i);
|
|
|
|
gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
|
|
gpio_bankb[bank]->maskb = 0;
|
|
|
|
if (mask) {
|
|
#ifdef BF537_FAMILY
|
|
gpio_bank_saved[bank].fer = *port_fer[bank];
|
|
#endif
|
|
gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
|
|
gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
|
|
gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
|
|
gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
|
|
gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
|
|
gpio_bank_saved[bank].reserved =
|
|
reserved_gpio_map[bank];
|
|
|
|
gpio = i;
|
|
|
|
while (mask) {
|
|
if (mask & 1) {
|
|
reserved_gpio_map[gpio_bank(gpio)] |=
|
|
gpio_bit(gpio);
|
|
bfin_gpio_wakeup_type(gpio,
|
|
wakeup_flags_map[gpio]);
|
|
set_gpio_data(gpio, 0); /*Clear*/
|
|
}
|
|
gpio++;
|
|
mask >>= 1;
|
|
}
|
|
|
|
sic_iwr |= 1 <<
|
|
(sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
|
|
gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
|
|
}
|
|
}
|
|
|
|
if (sic_iwr)
|
|
return sic_iwr;
|
|
else
|
|
return IWR_ENABLE_ALL;
|
|
}
|
|
|
|
void gpio_pm_restore(void)
|
|
{
|
|
u16 bank, mask, i;
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
|
mask = wakeup_map[gpio_bank(i)];
|
|
bank = gpio_bank(i);
|
|
|
|
if (mask) {
|
|
#ifdef BF537_FAMILY
|
|
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
|
#endif
|
|
gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
|
|
gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
|
|
gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
|
|
gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
|
|
gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
|
|
|
|
reserved_gpio_map[bank] =
|
|
gpio_bank_saved[bank].reserved;
|
|
|
|
}
|
|
|
|
gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
|
|
}
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
int peripheral_request(unsigned short per, const char *label)
|
|
{
|
|
unsigned long flags;
|
|
unsigned short ident = P_IDENT(per);
|
|
|
|
/*
|
|
* Don't cares are pins with only one dedicated function
|
|
*/
|
|
|
|
if (per & P_DONTCARE)
|
|
return 0;
|
|
|
|
if (!(per & P_DEFINED))
|
|
return -ENODEV;
|
|
|
|
if (check_gpio(ident) < 0)
|
|
return -EINVAL;
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
|
printk(KERN_ERR
|
|
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
|
|
__FUNCTION__, ident, get_label(ident));
|
|
dump_stack();
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
|
|
|
/*
|
|
* Pin functions like AMC address strobes my
|
|
* be requested and used by several drivers
|
|
*/
|
|
|
|
if (!(per & P_MAYSHARE)) {
|
|
|
|
/*
|
|
* Allow that the identical pin function can
|
|
* be requested from the same driver twice
|
|
*/
|
|
|
|
if (cmp_label(ident, label) == 0)
|
|
goto anyway;
|
|
|
|
printk(KERN_ERR
|
|
"%s: Peripheral %d function %d is already"
|
|
"reserved by %s !\n",
|
|
__FUNCTION__, ident, P_FUNCT2MUX(per),
|
|
get_label(ident));
|
|
dump_stack();
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
|
|
}
|
|
|
|
anyway:
|
|
|
|
|
|
portmux_setup(per, P_FUNCT2MUX(per));
|
|
|
|
port_setup(ident, PERIPHERAL_USAGE);
|
|
|
|
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
|
|
local_irq_restore(flags);
|
|
set_label(ident, label);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(peripheral_request);
|
|
|
|
int peripheral_request_list(unsigned short per[], const char *label)
|
|
{
|
|
u16 cnt;
|
|
int ret;
|
|
|
|
for (cnt = 0; per[cnt] != 0; cnt++) {
|
|
ret = peripheral_request(per[cnt], label);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(peripheral_request_list);
|
|
|
|
void peripheral_free(unsigned short per)
|
|
{
|
|
unsigned long flags;
|
|
unsigned short ident = P_IDENT(per);
|
|
|
|
if (per & P_DONTCARE)
|
|
return;
|
|
|
|
if (!(per & P_DEFINED))
|
|
return;
|
|
|
|
if (check_gpio(ident) < 0)
|
|
return;
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
|
|
& gpio_bit(ident)))) {
|
|
local_irq_restore(flags);
|
|
return;
|
|
}
|
|
|
|
if (!(per & P_MAYSHARE)) {
|
|
port_setup(ident, GPIO_USAGE);
|
|
}
|
|
|
|
reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(peripheral_free);
|
|
|
|
void peripheral_free_list(unsigned short per[])
|
|
{
|
|
u16 cnt;
|
|
|
|
for (cnt = 0; per[cnt] != 0; cnt++) {
|
|
peripheral_free(per[cnt]);
|
|
}
|
|
|
|
}
|
|
EXPORT_SYMBOL(peripheral_free_list);
|
|
|
|
/***********************************************************
|
|
*
|
|
* FUNCTIONS: Blackfin GPIO Driver
|
|
*
|
|
* INPUTS/OUTPUTS:
|
|
* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
*
|
|
*
|
|
* DESCRIPTION: Blackfin GPIO Driver API
|
|
*
|
|
* CAUTION:
|
|
*************************************************************
|
|
* MODIFICATION HISTORY :
|
|
**************************************************************/
|
|
|
|
int gpio_request(unsigned short gpio, const char *label)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
return -EINVAL;
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
|
printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);
|
|
dump_stack();
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(gpio_request);
|
|
|
|
void gpio_free(unsigned short gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
return;
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
|
|
printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
|
|
dump_stack();
|
|
local_irq_restore(flags);
|
|
return;
|
|
}
|
|
|
|
default_gpio(gpio);
|
|
|
|
reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(gpio_free);
|
|
|
|
void gpio_direction_input(unsigned short gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
|
|
|
|
local_irq_save(flags);
|
|
gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
|
|
gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(gpio_direction_input);
|
|
|
|
void gpio_direction_output(unsigned short gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
|
|
|
|
local_irq_save(flags);
|
|
gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
|
|
gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(gpio_direction_output);
|