Zhenyu Wang c038e51e84 drm/i915: fix to setup display reference clock control on Ironlake ... For new stepping of PCH, the display reference clock is fully under driver's control. This one trys to setup all needed reference clock for different outputs. Older stepping of PCH chipset should be ignoring this. This fixes output failure issue on newer PCH which requires driver to take control of reference clock enabling. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>		2009-10-19 11:03:37 -07:00
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drm	drm/i915: fix to setup display reference clock control on Ironlake	2009-10-19 11:03:37 -07:00
vga	PCI/vgaarb: cleanup some warnings + cleanup some comments.	2009-09-09 13:29:41 -07:00
Makefile	PCI/GPU: implement VGA arbitration on Linux	2009-09-09 13:29:36 -07:00