9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
36 lines
700 B
C
36 lines
700 B
C
/*
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* include/asm-xtensa/ide.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 1996 Linus Torvalds & authors
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_IDE_H
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#define _XTENSA_IDE_H
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#ifdef __KERNEL__
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#include <linux/config.h>
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#ifndef MAX_HWIFS
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# define MAX_HWIFS 1
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#endif
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static __inline__ int ide_default_irq(unsigned long base)
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{
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/* Unsupported! */
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return 0;
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}
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static __inline__ unsigned long ide_default_io_base(int index)
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{
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/* Unsupported! */
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return 0;
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}
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_IDE_H */
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