230f984662
Now that most platforms don't need disable_fiq and arch_ret_to_user macros, we can remove the empty macros or empty entry-macro.S files. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ryan Mallon <rmallon@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
27 lines
959 B
ArmAsm
27 lines
959 B
ArmAsm
/*
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* arch/arm/mach-at91/include/mach/entry-macro.S
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*
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* Copyright (C) 2003-2005 SAN People
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*
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* Low-level IRQ helper macros for AT91RM9200 platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <mach/hardware.h>
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#include <mach/at91_aic.h>
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
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ldr \base, [\base]
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
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ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
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teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
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streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
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.endm
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