d052d1beff
Convert everyone who uses platform_bus_type to include linux/platform_device.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
410 lines
9.9 KiB
C
410 lines
9.9 KiB
C
/*
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* linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
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*
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* Author: Nicolas Pitre
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* Created: Dec 02, 2004
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/wait.h>
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#include <linux/delay.h>
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#include <sound/driver.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/ac97_codec.h>
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#include <sound/initval.h>
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#include <asm/irq.h>
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#include <asm/semaphore.h>
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#include <asm/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/audio.h>
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#include "pxa2xx-pcm.h"
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static DECLARE_MUTEX(car_mutex);
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static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
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static volatile long gsr_bits;
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static unsigned short pxa2xx_ac97_read(ac97_t *ac97, unsigned short reg)
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{
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unsigned short val = -1;
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volatile u32 *reg_addr;
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down(&car_mutex);
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if (CAR & CAR_CAIP) {
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printk(KERN_CRIT"%s: CAR_CAIP already set\n", __FUNCTION__);
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goto out;
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}
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/* set up primary or secondary codec space */
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reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
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reg_addr += (reg >> 1);
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/* start read access across the ac97 link */
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gsr_bits = 0;
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val = *reg_addr;
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if (reg == AC97_GPIO_STATUS)
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goto out;
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wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
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if (!gsr_bits & GSR_SDONE) {
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printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
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__FUNCTION__, reg, gsr_bits);
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val = -1;
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goto out;
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}
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/* valid data now */
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gsr_bits = 0;
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val = *reg_addr;
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/* but we've just started another cycle... */
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wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
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out: up(&car_mutex);
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return val;
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}
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static void pxa2xx_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
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{
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volatile u32 *reg_addr;
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down(&car_mutex);
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if (CAR & CAR_CAIP) {
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printk(KERN_CRIT "%s: CAR_CAIP already set\n", __FUNCTION__);
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goto out;
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}
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/* set up primary or secondary codec space */
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reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
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reg_addr += (reg >> 1);
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gsr_bits = 0;
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*reg_addr = val;
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wait_event_timeout(gsr_wq, gsr_bits & GSR_CDONE, 1);
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if (!gsr_bits & GSR_SDONE)
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printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
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__FUNCTION__, reg, gsr_bits);
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out: up(&car_mutex);
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}
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static void pxa2xx_ac97_reset(ac97_t *ac97)
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{
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/* First, try cold reset */
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GCR &= GCR_COLD_RST; /* clear everything but nCRST */
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GCR &= ~GCR_COLD_RST; /* then assert nCRST */
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gsr_bits = 0;
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#ifdef CONFIG_PXA27x
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/* PXA27x Developers Manual section 13.5.2.2.1 */
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pxa_set_cken(1 << 31, 1);
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udelay(5);
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pxa_set_cken(1 << 31, 0);
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GCR = GCR_COLD_RST;
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udelay(50);
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#else
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GCR = GCR_COLD_RST;
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GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
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wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
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#endif
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if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
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printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
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__FUNCTION__, gsr_bits);
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/* let's try warm reset */
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gsr_bits = 0;
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#ifdef CONFIG_PXA27x
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/* warm reset broken on Bulverde,
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so manually keep AC97 reset high */
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pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
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udelay(10);
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GCR |= GCR_WARM_RST;
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pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
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udelay(500);
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#else
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GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
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wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
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#endif
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if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
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printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
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__FUNCTION__, gsr_bits);
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}
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GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
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GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
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}
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static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs)
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{
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long status;
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status = GSR;
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if (status) {
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GSR = status;
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gsr_bits |= status;
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wake_up(&gsr_wq);
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#ifdef CONFIG_PXA27x
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/* Although we don't use those we still need to clear them
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since they tend to spuriously trigger when MMC is used
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(hardware bug? go figure)... */
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MISR = MISR_EOC;
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PISR = PISR_EOC;
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MCSR = MCSR_EOC;
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#endif
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static ac97_bus_ops_t pxa2xx_ac97_ops = {
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.read = pxa2xx_ac97_read,
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.write = pxa2xx_ac97_write,
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.reset = pxa2xx_ac97_reset,
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};
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static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_out = {
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.name = "AC97 PCM out",
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.dev_addr = __PREG(PCDR),
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.drcmr = &DRCMRTXPCDR,
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.dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
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DCMD_BURST32 | DCMD_WIDTH4,
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};
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static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_in = {
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.name = "AC97 PCM in",
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.dev_addr = __PREG(PCDR),
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.drcmr = &DRCMRRXPCDR,
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.dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
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DCMD_BURST32 | DCMD_WIDTH4,
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};
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static snd_pcm_t *pxa2xx_ac97_pcm;
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static ac97_t *pxa2xx_ac97_ac97;
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static int pxa2xx_ac97_pcm_startup(snd_pcm_substream_t *substream)
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{
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snd_pcm_runtime_t *runtime = substream->runtime;
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pxa2xx_audio_ops_t *platform_ops;
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int r;
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runtime->hw.channels_min = 2;
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runtime->hw.channels_max = 2;
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r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
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AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
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runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
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snd_pcm_limit_hw_rates(runtime);
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platform_ops = substream->pcm->card->dev->platform_data;
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if (platform_ops && platform_ops->startup)
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return platform_ops->startup(substream, platform_ops->priv);
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else
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return 0;
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}
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static void pxa2xx_ac97_pcm_shutdown(snd_pcm_substream_t *substream)
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{
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pxa2xx_audio_ops_t *platform_ops;
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platform_ops = substream->pcm->card->dev->platform_data;
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if (platform_ops && platform_ops->shutdown)
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platform_ops->shutdown(substream, platform_ops->priv);
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}
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static int pxa2xx_ac97_pcm_prepare(snd_pcm_substream_t *substream)
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{
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snd_pcm_runtime_t *runtime = substream->runtime;
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int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
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AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
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return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
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}
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static pxa2xx_pcm_client_t pxa2xx_ac97_pcm_client = {
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.playback_params = &pxa2xx_ac97_pcm_out,
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.capture_params = &pxa2xx_ac97_pcm_in,
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.startup = pxa2xx_ac97_pcm_startup,
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.shutdown = pxa2xx_ac97_pcm_shutdown,
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.prepare = pxa2xx_ac97_pcm_prepare,
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};
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#ifdef CONFIG_PM
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static int pxa2xx_ac97_do_suspend(snd_card_t *card, pm_message_t state)
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{
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if (card->power_state != SNDRV_CTL_POWER_D3cold) {
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pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
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snd_pcm_suspend_all(pxa2xx_ac97_pcm);
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snd_ac97_suspend(pxa2xx_ac97_ac97);
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snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
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if (platform_ops && platform_ops->suspend)
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platform_ops->suspend(platform_ops->priv);
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GCR |= GCR_ACLINK_OFF;
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pxa_set_cken(CKEN2_AC97, 0);
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}
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return 0;
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}
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static int pxa2xx_ac97_do_resume(snd_card_t *card)
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{
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if (card->power_state != SNDRV_CTL_POWER_D0) {
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pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
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pxa_set_cken(CKEN2_AC97, 1);
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if (platform_ops && platform_ops->resume)
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platform_ops->resume(platform_ops->priv);
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snd_ac97_resume(pxa2xx_ac97_ac97);
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snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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}
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return 0;
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}
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static int pxa2xx_ac97_suspend(struct device *_dev, pm_message_t state)
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{
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snd_card_t *card = dev_get_drvdata(_dev);
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int ret = 0;
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if (card)
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ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
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return ret;
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}
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static int pxa2xx_ac97_resume(struct device *_dev)
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{
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snd_card_t *card = dev_get_drvdata(_dev);
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int ret = 0;
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if (card)
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ret = pxa2xx_ac97_do_resume(card);
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return ret;
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}
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#else
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#define pxa2xx_ac97_suspend NULL
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#define pxa2xx_ac97_resume NULL
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#endif
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static int pxa2xx_ac97_probe(struct device *dev)
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{
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snd_card_t *card;
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ac97_bus_t *ac97_bus;
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ac97_template_t ac97_template;
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int ret;
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ret = -ENOMEM;
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card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
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THIS_MODULE, 0);
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if (!card)
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goto err;
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card->dev = dev;
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strncpy(card->driver, dev->driver->name, sizeof(card->driver));
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ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
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if (ret)
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goto err;
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ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
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if (ret < 0)
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goto err;
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pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
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pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
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pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
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pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
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#ifdef CONFIG_PXA27x
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/* Use GPIO 113 as AC97 Reset on Bulverde */
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pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
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#endif
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pxa_set_cken(CKEN2_AC97, 1);
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ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
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if (ret)
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goto err;
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memset(&ac97_template, 0, sizeof(ac97_template));
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ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
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if (ret)
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goto err;
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snprintf(card->shortname, sizeof(card->shortname),
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"%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
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snprintf(card->longname, sizeof(card->longname),
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"%s (%s)", dev->driver->name, card->mixername);
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snd_card_set_pm_callback(card, pxa2xx_ac97_do_suspend,
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pxa2xx_ac97_do_resume, NULL);
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ret = snd_card_register(card);
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if (ret == 0) {
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dev_set_drvdata(dev, card);
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return 0;
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}
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err:
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if (card)
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snd_card_free(card);
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if (CKEN & CKEN2_AC97) {
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GCR |= GCR_ACLINK_OFF;
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free_irq(IRQ_AC97, NULL);
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pxa_set_cken(CKEN2_AC97, 0);
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}
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return ret;
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}
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static int pxa2xx_ac97_remove(struct device *dev)
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{
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snd_card_t *card = dev_get_drvdata(dev);
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if (card) {
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snd_card_free(card);
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dev_set_drvdata(dev, NULL);
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GCR |= GCR_ACLINK_OFF;
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free_irq(IRQ_AC97, NULL);
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pxa_set_cken(CKEN2_AC97, 0);
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}
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return 0;
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}
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static struct device_driver pxa2xx_ac97_driver = {
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.name = "pxa2xx-ac97",
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.bus = &platform_bus_type,
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.probe = pxa2xx_ac97_probe,
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.remove = pxa2xx_ac97_remove,
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.suspend = pxa2xx_ac97_suspend,
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.resume = pxa2xx_ac97_resume,
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};
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static int __init pxa2xx_ac97_init(void)
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{
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return driver_register(&pxa2xx_ac97_driver);
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}
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static void __exit pxa2xx_ac97_exit(void)
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{
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driver_unregister(&pxa2xx_ac97_driver);
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}
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module_init(pxa2xx_ac97_init);
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module_exit(pxa2xx_ac97_exit);
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MODULE_AUTHOR("Nicolas Pitre");
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MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
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MODULE_LICENSE("GPL");
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