linux/arch/i386
Kimball Murray e0c1e9bf81 [PATCH] x86_64: avoid IRQ0 ioapic pin collision
The patch addresses a problem with ACPI SCI interrupt entry, which gets
re-used, and the IRQ is assigned to another unrelated device.  The patch
corrects the code such that SCI IRQ is skipped and duplicate entry is
avoided.  Second issue came up with VIA chipset, the problem was caused by
original patch assigning IRQs starting 16 and up.  The VIA chipset uses
4-bit IRQ register for internal interrupt routing, and therefore cannot
handle IRQ numbers assigned to its devices.  The patch corrects this
problem by allowing PCI IRQs below 16.

Cc: len.brown@intel.com

Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-05-08 09:34:56 -07:00
..
boot
crypto
kernel [PATCH] x86_64: avoid IRQ0 ioapic pin collision 2006-05-08 09:34:56 -07:00
lib
mach-default
mach-es7000
mach-generic
mach-visws
mach-voyager [PATCH] voyager: no need to define BITS_PER_BYTE when it's already in types.h 2006-04-19 09:13:51 -07:00
math-emu
mm
oprofile
pci [PATCH] PCI: fix via irq SATA patch 2006-04-27 13:00:51 -07:00
power
defconfig
Kconfig [PATCH] Mark VMSPLIT EMBEDDED 2006-04-28 08:33:47 -07:00
Kconfig.cpu
Kconfig.debug [PATCH] i386: Move CONFIG_DOUBLEFAULT into arch/i386 where it belongs. 2006-04-18 10:39:20 -07:00
Makefile
Makefile.cpu