19df0c2fef
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
76 lines
1.5 KiB
ArmAsm
76 lines
1.5 KiB
ArmAsm
/* ld script to make M32R Linux kernel
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*/
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/addrspace.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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OUTPUT_ARCH(m32r)
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#if defined(__LITTLE_ENDIAN__)
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jiffies = jiffies_64;
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#else
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jiffies = jiffies_64 + 4;
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#endif
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kernel_entry = boot - 0x80000000;
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ENTRY(kernel_entry)
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SECTIONS
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{
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. = CONFIG_MEMORY_START + __PAGE_OFFSET;
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eit_vector = .;
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. = . + 0x1000;
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.empty_zero_page : { *(.empty_zero_page) } = 0
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/* read-only */
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_text = .; /* Text and read-only data */
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.boot : { *(.boot) } = 0
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.text : {
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HEAD_TEXT
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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*(.fixup)
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*(.gnu.warning)
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} = 0x9090
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#ifdef CONFIG_SMP
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. = ALIGN(65536);
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.eit_vector4 : { *(.eit_vector4) }
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#endif
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_etext = .; /* End of text section */
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EXCEPTION_TABLE(16)
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NOTES
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RODATA
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RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
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_edata = .; /* End of data section */
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/* will be freed after init */
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. = ALIGN(PAGE_SIZE); /* Init code and data */
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(16)
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PERCPU(32, PAGE_SIZE)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/* freed after init ends here */
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BSS_SECTION(0, 0, 4)
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_end = . ;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* Sections to be discarded */
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DISCARDS
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}
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