a8237fc410
This patch introduces a struct subchannel_id containing the subchannel number (formerly referred to as "irq") and switches code formerly relying on the subchannel number over to it. While we're touching inline assemblies anyway, make sure they have correct memory constraints. Signed-off-by: Cornelia Huck <cohuck@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
235 lines
3.9 KiB
C
235 lines
3.9 KiB
C
#ifndef S390_CIO_IOASM_H
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#define S390_CIO_IOASM_H
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#include "schid.h"
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/*
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* TPI info structure
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*/
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struct tpi_info {
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struct subchannel_id schid;
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__u32 intparm; /* interruption parameter */
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__u32 adapter_IO : 1;
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__u32 reserved2 : 1;
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__u32 isc : 3;
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__u32 reserved3 : 12;
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__u32 int_type : 3;
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__u32 reserved4 : 12;
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} __attribute__ ((packed));
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/*
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* Some S390 specific IO instructions as inline
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*/
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static inline int stsch(struct subchannel_id schid,
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volatile struct schib *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" stsch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid), "a" (addr), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int msch(struct subchannel_id schid,
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volatile struct schib *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" msch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid), "a" (addr), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int msch_err(struct subchannel_id schid,
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volatile struct schib *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" lhi %0,%3\n"
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" lr 1,%1\n"
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" msch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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#ifdef CONFIG_ARCH_S390X
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".section __ex_table,\"a\"\n"
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" .align 8\n"
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" .quad 0b,1b\n"
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".previous"
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#else
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".section __ex_table,\"a\"\n"
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" .align 4\n"
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" .long 0b,1b\n"
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".previous"
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#endif
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: "=&d" (ccode)
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: "d" (schid), "a" (addr), "K" (-EIO), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int tsch(struct subchannel_id schid,
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volatile struct irb *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" tsch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid), "a" (addr), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int tpi( volatile struct tpi_info *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" tpi 0(%1)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "a" (addr), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int ssch(struct subchannel_id schid,
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volatile struct orb *addr)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" ssch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid), "a" (addr), "m" (*addr)
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: "cc", "1" );
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return ccode;
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}
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static inline int rsch(struct subchannel_id schid)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid)
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: "cc", "1" );
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return ccode;
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}
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static inline int csch(struct subchannel_id schid)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid)
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: "cc", "1" );
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return ccode;
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}
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static inline int hsch(struct subchannel_id schid)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid)
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: "cc", "1" );
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return ccode;
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}
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static inline int xsch(struct subchannel_id schid)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" .insn rre,0xb2760000,%1,0\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (schid)
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: "cc", "1" );
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return ccode;
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}
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static inline int chsc(void *chsc_area)
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{
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typedef struct { char _[4096]; } addr_type;
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int cc;
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__asm__ __volatile__ (
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".insn rre,0xb25f0000,%2,0 \n\t"
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"ipm %0 \n\t"
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"srl %0,28 \n\t"
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: "=d" (cc), "=m" (*(addr_type *) chsc_area)
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: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
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: "cc" );
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return cc;
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}
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static inline int iac( void)
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{
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int ccode;
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__asm__ __volatile__(
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" iac 1\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode) : : "cc", "1" );
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return ccode;
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}
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static inline int rchp(int chpid)
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{
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int ccode;
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__asm__ __volatile__(
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" lr 1,%1\n"
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" rchp\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (chpid)
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: "cc", "1" );
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return ccode;
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}
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#endif
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