![]() This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> |
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.. | ||
bestcomm | ||
qe_lib | ||
Kconfig | ||
Makefile | ||
axonram.c | ||
cpm1.c | ||
cpm2.c | ||
cpm2_pic.c | ||
cpm2_pic.h | ||
cpm_common.c | ||
dart.h | ||
dart_iommu.c | ||
dcr-low.S | ||
dcr.c | ||
fsl_pci.c | ||
fsl_pci.h | ||
fsl_rio.c | ||
fsl_rio.h | ||
fsl_soc.c | ||
fsl_soc.h | ||
grackle.c | ||
i8259.c | ||
indirect_pci.c | ||
ipic.c | ||
ipic.h | ||
micropatch.c | ||
mmio_nvram.c | ||
mpc8xx_pic.c | ||
mpc8xx_pic.h | ||
mpic.c | ||
mpic.h | ||
mpic_msi.c | ||
mpic_pasemi_msi.c | ||
mpic_u3msi.c | ||
mv64x60.h | ||
mv64x60_dev.c | ||
mv64x60_pci.c | ||
mv64x60_pic.c | ||
mv64x60_udbg.c | ||
of_rtc.c | ||
pmi.c | ||
ppc4xx_pci.c | ||
ppc4xx_pci.h | ||
ppc4xx_soc.c | ||
rtc_cmos_setup.c | ||
tsi108_dev.c | ||
tsi108_pci.c | ||
uic.c | ||
xilinx_intc.c |